Lines Matching refs:dmap
9827 dmaxref_mem_map_t *dmap = NULL; local
9829 dmap = MALLOCZ(dhdp->osh, sizeof(dmaxref_mem_map_t));
9830 if (!dmap) {
9834 dmap->srcmem = &(dmaxfer->srcmem);
9835 dmap->dstmem = &(dmaxfer->dstmem);
9837 DMAXFER_FREE(dhdp, dmap);
9841 if (dmap) {
9842 MFREE(dhdp->osh, dmap, sizeof(dmaxref_mem_map_t));
10030 pcie_dma_xfer_params_t *dmap; local
10063 dmap = (pcie_dma_xfer_params_t *)
10066 if (dmap == NULL) {
10077 dmap->cmn_hdr.msg_type = MSG_TYPE_LPBK_DMAXFER;
10078 dmap->cmn_hdr.request_id = htol32(DHD_FAKE_PKTID);
10079 dmap->cmn_hdr.epoch = ring->seqnum % H2D_EPOCH_MODULO;
10080 dmap->cmn_hdr.flags = ring->current_phase;
10083 dmap->host_input_buf_addr.high = htol32(PHYSADDRHI(prot->dmaxfer.srcmem.pa));
10084 dmap->host_input_buf_addr.low = htol32(PHYSADDRLO(prot->dmaxfer.srcmem.pa));
10085 dmap->host_ouput_buf_addr.high = htol32(PHYSADDRHI(prot->dmaxfer.dstmem.pa));
10086 dmap->host_ouput_buf_addr.low = htol32(PHYSADDRLO(prot->dmaxfer.dstmem.pa));
10087 dmap->xfer_len = htol32(prot->dmaxfer.len);
10088 dmap->srcdelay = htol32(prot->dmaxfer.srcdelay);
10089 dmap->destdelay = htol32(prot->dmaxfer.destdelay);
10092 dmap->host_ouput_buf_addr.high = 0x0;
10093 dmap->host_ouput_buf_addr.low = mem_addr;
10095 dmap->host_input_buf_addr.high = 0x0;
10096 dmap->host_input_buf_addr.low = mem_addr;
10098 dmap->host_ouput_buf_addr.high = 0x0;
10099 dmap->host_ouput_buf_addr.low = mem_addr;
10101 dmap->host_input_buf_addr.high = 0x0;
10102 dmap->host_input_buf_addr.low = mem_addr;
10104 dmap->flags = (((core_num & PCIE_DMA_XFER_FLG_CORE_NUMBER_MASK)
10111 dhd_prot_ring_write_complete(dhd, ring, dmap, 1);