Lines Matching defs:dhd_prot
592 typedef struct dhd_prot { struct
593 osl_t *osh; /* OSL handle */
594 uint16 rxbufpost_sz;
595 uint16 rxbufpost;
596 uint16 max_rxbufpost;
597 uint32 tot_rxbufpost;
598 uint32 tot_rxcpl;
599 uint16 max_eventbufpost;
600 uint16 max_ioctlrespbufpost;
601 uint16 max_tsbufpost;
602 uint16 max_infobufpost;
603 uint16 infobufpost;
604 uint16 cur_event_bufs_posted;
605 uint16 cur_ioctlresp_bufs_posted;
606 uint16 cur_ts_bufs_posted;
609 osl_atomic_t active_tx_count; /* increments/decrements on every packet tx/tx_status */
610 uint16 h2d_max_txpost;
612 uint16 h2d_htput_max_txpost;
614 uint16 txp_threshold; /* optimization to write "n" tx items at a time to ring */
617 msgbuf_ring_t h2dring_ctrl_subn; /* H2D ctrl message submission ring */
618 msgbuf_ring_t h2dring_rxp_subn; /* H2D RxBuf post ring */
619 msgbuf_ring_t d2hring_ctrl_cpln; /* D2H ctrl completion ring */
620 msgbuf_ring_t d2hring_tx_cpln; /* D2H Tx complete message ring */
621 msgbuf_ring_t d2hring_rx_cpln; /* D2H Rx complete message ring */
622 msgbuf_ring_t *h2dring_info_subn; /* H2D info submission ring */
623 msgbuf_ring_t *d2hring_info_cpln; /* D2H info completion ring */
624 msgbuf_ring_t *d2hring_edl; /* D2H Enhanced Debug Lane (EDL) ring */
626 msgbuf_ring_t *h2d_flowrings_pool; /* Pool of preallocated flowings */
627 dhd_dma_buf_t flowrings_dma_buf; /* Contiguous DMA buffer for flowrings */
628 uint16 h2d_rings_total; /* total H2D (common rings + flowrings) */
630 uint32 rx_dataoffset;
632 dhd_mb_ring_t mb_ring_fn; /* called when dongle needs to be notified of new msg */
633 dhd_mb_ring_2_t mb_2_ring_fn; /* called when dongle needs to be notified of new msg */
636 uint8 ioctl_state;
637 int16 ioctl_status; /* status returned from dongle */
638 uint16 ioctl_resplen;
639 dhd_ioctl_recieved_status_t ioctl_received;
640 uint curr_ioctl_cmd;
641 dhd_dma_buf_t retbuf; /* For holding ioctl response */
642 dhd_dma_buf_t ioctbuf; /* For holding ioctl request */
644 dhd_dma_buf_t d2h_dma_scratch_buf; /* For holding d2h scratch */
647 uint32 rw_index_sz; /* Size of a RD or WR index in dongle */
648 dhd_dma_buf_t h2d_dma_indx_wr_buf; /* Array of H2D WR indices */
649 dhd_dma_buf_t h2d_dma_indx_rd_buf; /* Array of H2D RD indices */
650 dhd_dma_buf_t d2h_dma_indx_wr_buf; /* Array of D2H WR indices */
651 dhd_dma_buf_t d2h_dma_indx_rd_buf; /* Array of D2H RD indices */
652 dhd_dma_buf_t h2d_ifrm_indx_wr_buf; /* Array of H2D WR indices for ifrm */
654 dhd_dma_buf_t host_bus_throughput_buf; /* bus throughput measure buffer */
656 dhd_dma_buf_t *flowring_buf; /* pool of flow ring buf */
658 char *h2d_dma_indx_rd_copy_buf; /* Local copy of H2D WR indices array */
659 char *d2h_dma_indx_wr_copy_buf; /* Local copy of D2H WR indices array */
660 uint32 h2d_dma_indx_rd_copy_bufsz; /* H2D WR indices array size */
661 uint32 d2h_dma_indx_wr_copy_bufsz; /* D2H WR indices array size */
662 uint32 host_seqnum; /* Seqence number for D2H DMA Indices sync */
664 uint32 flowring_num;
666 d2h_sync_cb_t d2h_sync_cb; /* Sync on D2H DMA done: SEQNUM or XORCSUM */
668 d2h_edl_sync_cb_t d2h_edl_sync_cb; /* Sync on EDL D2H DMA done: SEQNUM or XORCSUM */
670 ulong d2h_sync_wait_max; /* max number of wait loops to receive one msg */
671 ulong d2h_sync_wait_tot; /* total wait loops */
673 dhd_dmaxfer_t dmaxfer; /* for test/DMA loopback */
675 uint16 ioctl_seq_no;
676 uint16 data_seq_no; /* XXX this field is obsolete */
677 uint16 ioctl_trans_id;
678 void *pktid_ctrl_map; /* a pktid maps to a packet and its metadata */
679 void *pktid_rx_map; /* pktid map for rx path */
680 void *pktid_tx_map; /* pktid map for tx path */
681 bool metadata_dbg;
682 void *pktid_map_handle_ioctl;
684 void *pktid_dma_map; /* pktid map for DMA MAP */
685 void *pktid_dma_unmap; /* pktid map for DMA UNMAP */
687 uint32 pktid_depleted_cnt; /* pktid depleted count */
689 uint8 pktid_txq_stop_cnt;
691 uint8 pktid_txq_start_cnt;
692 uint64 ioctl_fillup_time; /* timestamp for ioctl fillup */
693 uint64 ioctl_ack_time; /* timestamp for ioctl ack */
694 uint64 ioctl_cmplt_time; /* timestamp for ioctl completion */
697 uint16 rx_metadata_offset;
698 uint16 tx_metadata_offset;
701 rxchain_info_t rxchain; /* chain of rx packets */
706 bcmpcie_soft_doorbell_t soft_doorbell[BCMPCIE_D2H_COMMON_MSGRINGS];
712 dhd_dma_buf_t fw_trap_buf; /* firmware trap buffer */
714 uint32 host_ipc_version; /* Host sypported IPC rev */
715 uint32 device_ipc_version; /* FW supported IPC rev */
716 uint32 active_ipc_version; /* Host advertised IPC rev */
718 dhd_ioctl_trace_t ioctl_trace[MAX_IOCTL_TRACE_SIZE];
719 uint32 ioctl_trace_count;
721 dhd_dma_buf_t hostts_req_buf; /* For holding host timestamp request buf */
722 bool hostts_req_buf_inuse;
723 bool rx_ts_log_enabled;
724 bool tx_ts_log_enabled;
726 msgbuf_ring_t *h2dring_btlog_subn; /* H2D btlog submission ring */
727 msgbuf_ring_t *d2hring_btlog_cpln; /* D2H btlog completion ring */
728 uint16 btlogbufpost;
729 uint16 max_btlogbufpost;
732 uint32 hmaptest_rx_active;
733 uint32 hmaptest_rx_pktid;
734 char *hmap_rx_buf_va;
735 dmaaddr_t hmap_rx_buf_pa;
736 uint32 hmap_rx_buf_len;
738 uint32 hmaptest_tx_active;
739 uint32 hmaptest_tx_pktid;
740 char *hmap_tx_buf_va;
741 dmaaddr_t hmap_tx_buf_pa;
742 uint32 hmap_tx_buf_len;
766 } dhd_prot_t; argument