Lines Matching full:srom
2 * Routines to access SPROM and to parse SROM/CIS variables.
30 * When host may supply nvram vars in addition to the ones in OTP/SROM:
140 static void _initvars_srom_pci(uint8 sromrev, uint16 *srom, uint off, varbuf_t *b);
187 /* FIXME: Fake 4331 SROM to boot 4331 driver on QT w/o SPROM/OTP */
971 static bool srvars_inited = FALSE; /* Use OTP/SROM as global variables */
1096 /* First check for CIS format. if not CIS, try SROM format */ in BCMATTACHFN()
1120 /** support only 16-bit word read from srom */
1161 volatile uint16 *srom; local
1163 srom = (volatile uint16 *)srom_offset(sih, curmap);
1164 if (srom == NULL)
1167 if (sprom_read_pci(osh, sih, srom, off, buf, nw, check_crc))
1210 /** support only 16-bit word write into srom */
1251 /* read first small number words from srom, then adjust the length, read all */
1257 /* Deal with blank srom */
1259 /* Do nothing to blank srom when it's srclear */
1265 /* see if the input buffer is valid SROM image or not */
1381 } else if (nbytes == SROM_WORDS * 2){ /* the other possible SROM format */
1488 volatile uint16 *srom = NULL; local
1510 si_srom_clk_set(sih); /* corrects srom clock frequency */
1519 srom = (volatile uint16 *)((volatile uint8 *)ccregs + CC_SROM_OTP);
1522 srom = (volatile uint16 *)
1529 /* write srom */
1534 /* No srom support in this chip */
1535 BS_ERROR(("srom_write, invalid srom, skip\n"));
1540 W_REG(osh, &srom[i], new[i]);
1557 /* Restore config after reading SROM */
1566 /* write srom */
1595 /** support only 16-bit word write into srom */
1615 volatile uint16 *srom = NULL; local
1637 si_srom_clk_set(sih); /* corrects srom clock frequency */
1646 srom = (volatile uint16 *)((volatile uint8 *)ccregs + CC_SROM_OTP);
1649 srom = (volatile uint16 *)
1656 /* write srom */
1659 /* No srom support in this chip */
1660 BS_ERROR(("srom_write, invalid srom, skip\n"));
1665 W_REG(osh, &srom[byteoff/2], value);
1682 /* Restore config after reading SROM */
1691 /* write srom */
1873 /* Power per rate for SROM V9 */
1898 /* SROM V11 */
2000 /* SROM V13 PA */
2089 * Both SROM and OTP contain variables in 'CIS' format, whereas the rest of the firmware works with
3191 /* Power per rate for SROM V9 */
3293 uint16 srom[35]; local
3297 bcopy(&cis[i + 1], srom, sizeof(srom));
3298 _initvars_srom_pci(srev, srom, SROM3_SWRGN_OFF, &b);
3299 /* 2.4G antenna gain is included in SROM */
3301 /* Ethernet MAC address is included in SROM */
4471 * In chips with chipcommon rev 32 and later, the srom is in chipcommon,
4556 si_srom_clk_set(sih); /* corrects srom clock frequency */
4593 /* Srom shadow region in chipcommon is only 512 words
4594 * use indirect access for Srom beyond 512 words
4609 /* bypass crc checking for simulation to allow srom hack */
4617 /* The hardware thinks that an srom that starts with 0xffff
4642 /* Restore config after reading SROM */
4680 /* The hardware thinks that an srom that starts with 0xffff
4741 /* The hardware thinks that an srom that starts with 0xffff
4891 * These variables are mainly for supporting SROM-less devices although
4985 * Parses caller supplied SROM contents into name=value pairs. Global array pci_sromvars[] contains
4986 * the link between a word offset in SROM and the corresponding NVRAM variable name.'srom' points to
4987 * the SROM word array. 'off' specifies the offset of the first word 'srom' points to, which should
4988 * be either 0 or SROM3_SWRG_OFF (full SROM or software region).
4991 BCMATTACHFN(_initvars_srom_pci)(uint8 sromrev, uint16 *srom, uint off, varbuf_t *b)
5050 ea.octet[0] = (srom[srv->off - off] >> 8) & 0xff;
5051 ea.octet[1] = srom[srv->off - off] & 0xff;
5052 ea.octet[2] = (srom[srv->off + 1 - off] >> 8) & 0xff;
5053 ea.octet[3] = srom[srv->off + 1 - off] & 0xff;
5054 ea.octet[4] = (srom[srv->off + 2 - off] >> 8) & 0xff;
5055 ea.octet[5] = srom[srv->off + 2 - off] & 0xff;
5071 w = srom[srv->off - off];
5085 w = srom[srv->off - off];
5205 w = srom[pb + srv->off - off];
5311 BCMATTACHFN(_initvars_srom_pci_caldata)(si_t *sih, uint16 *srom, uint32 sromrev)
5323 memcpy(srom, caldata_array, caldata_size);
5341 uint16 *srom; local
5355 * Apply CRC over SROM content regardless SROM is present or not, and use variable
5357 * fails or read SROM variables from flash.
5361 srom = MALLOC_NOPERSIST(osh, SROM_MAX);
5362 ASSERT(srom != NULL);
5363 if (!srom)
5368 err = sprom_read_pci(osh, sih, sromwindow, 0, srom, SROM_SIGN_MINWORDS + 1, FALSE);
5370 if (srom[SROM18_SIGN] == SROM18_SIGNATURE) {
5372 0, srom, SROM18_WORDS, TRUE);
5373 sromrev = srom[SROM18_CRCREV] & 0xff;
5374 } else if (srom[SROM17_SIGN] == SROM17_SIGNATURE) {
5376 0, srom, SROM17_WORDS, TRUE);
5377 sromrev = srom[SROM17_CRCREV] & 0xff;
5378 } else if (srom[SROM16_SIGN] == SROM16_SIGNATURE) {
5380 0, srom, SROM16_WORDS, TRUE);
5381 sromrev = srom[SROM16_CRCREV] & 0xff;
5382 } else if (srom[SROM15_SIGN] == SROM15_SIGNATURE) { /* srom 15 */
5384 0, srom, SROM15_WORDS, TRUE);
5385 sromrev = srom[SROM15_CRCREV] & 0xff;
5386 } else if (srom[SROM11_SIGN] == SROM13_SIGNATURE) {
5388 0, srom, SROM13_WORDS, TRUE);
5389 sromrev = srom[SROM13_CRCREV] & 0xff;
5390 } else if (srom[SROM11_SIGN] == SROM12_SIGNATURE) {
5392 0, srom, SROM12_WORDS, TRUE);
5393 sromrev = srom[SROM12_CRCREV] & 0xff;
5394 } else if (srom[SROM11_SIGN] == SROM11_SIGNATURE) {
5396 0, srom, SROM11_WORDS, TRUE);
5397 sromrev = srom[SROM11_CRCREV] & 0xff;
5398 } else if ((srom[SROM4_SIGN] == SROM4_SIGNATURE) || /* srom 4 */
5399 (srom[SROM8_SIGN] == SROM4_SIGNATURE)) { /* srom 8,9 */
5401 0, srom, SROM4_WORDS, TRUE);
5402 sromrev = srom[SROM4_CRCREV] & 0xff;
5405 srom, SROM_WORDS, TRUE);
5407 /* srom is good and is rev < 4 */
5409 sromrev = srom[SROM_CRCREV] & 0xff;
5416 BS_ERROR(("srom read failed\n"));
5419 BS_ERROR(("srom read failed\n"));
5424 else if ((err = otp_read_pci(osh, sih, srom, SROM_MAX)) == 0) {
5425 /* OTP only contain SROM rev8/rev9/rev10/Rev11 for now */
5427 if (srom[SROM13_SIGN] == SROM13_SIGNATURE)
5428 sromrev = srom[SROM13_CRCREV] & 0xff;
5429 else if (srom[SROM12_SIGN] == SROM12_SIGNATURE)
5430 sromrev = srom[SROM12_CRCREV] & 0xff;
5431 else if (srom[SROM11_SIGN] == SROM11_SIGNATURE)
5432 sromrev = srom[SROM11_CRCREV] & 0xff;
5433 else if (srom[SROM10_SIGN] == SROM10_SIGNATURE)
5434 sromrev = srom[SROM10_CRCREV] & 0xff;
5436 sromrev = srom[SROM4_CRCREV] & 0xff;
5444 BS_ERROR(("srom rev:%d\n", sromrev));
5461 BS_ERROR(("initvars_srom_pci, SROM CRC Error\n"));
5464 /* NIC build or PCIe FD using SROM format shouldn't load driver
5476 * CRC failed on srom, so if the device is using OTP
5483 if ((si_is_sprom_available(sih) && srom[0] == 0xffff) ||
5567 /* Discard hostvars if SROM parsing is successful, so only one nvram source
5569 * Routers use combined srom/host nvram so shouldn't define BCM_ONE_NVRAM_SRC.
5580 /* srom version check: Current valid versions are:
5582 * This is a bit mask of all valid SROM versions.
5585 BS_ERROR(("Invalid SROM rev %d\n", sromrev));
5614 /* parse SROM into name=value pairs. */
5615 _initvars_srom_pci(sromrev, srom, 0, &b);
5629 int caldata_wordoffset = srom[SROM18_CALDATA_OFFSET_LOC] / 2;
5633 memcpy(caldata_array, srom + caldata_wordoffset, SROM18_CALDATA_WORDS * 2);
5637 int caldata_wordoffset = srom[SROM16_CALDATA_OFFSET_LOC] / 2;
5641 memcpy(caldata_array, srom + caldata_wordoffset, SROM_CALDATA_WORDS * 2);
5656 memcpy(caldata_array, srom + cal_wordoffset, caldata_size);
5667 MFREE(osh, srom, SROM_MAX);
5672 * initvars_cis_pci() parses OTP CIS. This is specifically for PCIe full dongle that has SROM
5765 /* return OK so the driver will load & use defaults if bad srom/otp */
5849 /** read a word from the SDIO srom */
5875 /** write a word to the SDIO srom */
5962 /*** reads a CIS structure (so not an SROM-MAP structure) from either OTP or SROM */
5967 int sel = 0; /* where to read srom/cis: 0 - none, 1 - otp, 2 - sprom */
5968 uint sz = 0; /* srom size in bytes */
5985 uint16 *srom; local
5992 if ((srom = (uint16 *)MALLOC(osh, sz)) == NULL)
5998 rc = otp_read_region(sih, OTP_SW_RGN, srom, &otpsz);
6000 body = (uint8 *)srom;
6004 rc = srom_read(sih, SI_BUS, curmap, osh, 0, sz, srom, TRUE);
6006 body = (uint8 *)srom + SBSDIO_SPROM_CIS_OFFSET;
6018 htol16_buf((uint8 *)srom, sz);
6023 MFREE(osh, srom, sz); /* Clean up */
6025 /* Make SROM variables global */
6057 #ifdef BCM_DONGLEVARS /* this flag should be defined for usb bootloader, to read OTP or SROM */
6066 /* Tell the caller there is no individual SROM variables */
6070 /* return OK so the driver will load & use defaults if bad srom/otp */
6238 /* Tell the caller there is no individual SROM variables */
6242 /* return OK so the driver will load & use defaults if bad srom/otp */
6329 /* Search flash nvram section for srom variables */
6353 BCMATTACHFN(srom_get_caldata)(si_t *sih, uint16 *srom)
6359 memcpy(srom, caldata_array, SROM18_CALDATA_WORDS * 2);
6361 memcpy(srom, caldata_array, SROM_CALDATA_WORDS * 2);