Lines Matching refs:sii
43 #define PMU_DMP() (cores_info->coreid[sii->curidx] == PMU_CORE_ID)
44 #define GCI_DMP() (cores_info->coreid[sii->curidx] == GCI_CORE_ID)
56 static void ai_reset_axi_to(const si_info_t *sii, aidmp_t *ai);
174 si_info_t *sii = SI_INFO(sih); in BCMATTACHFN() local
175 si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info; in BCMATTACHFN()
178 axi_wrapper_t * axi_wrapper = sii->axi_wrapper; in BCMATTACHFN()
182 erombase = R_REG(sii->osh, &cc->eromptr); in BCMATTACHFN()
191 sii->curwrap = (void *)((uintptr)regs + SI_CORE_SIZE); in BCMATTACHFN()
194 OSL_PCI_WRITE_CONFIG(sii->osh, PCI_BAR0_WIN, 4, erombase); in BCMATTACHFN()
211 sii->axi_num_wrappers = 0; in BCMATTACHFN()
227 SI_VMSG(("Found END of erom after %d cores\n", sii->numcores)); in BCMATTACHFN()
259 ((CHIPTYPE(sii->pub.socitype) == SOCI_NAI) && in BCMATTACHFN()
273 if ((sii->oob_router != 0) && (sii->oob_router != addrl)) { in BCMATTACHFN()
274 sii->oob_router1 = addrl; in BCMATTACHFN()
276 sii->oob_router = addrl; in BCMATTACHFN()
288 idx = sii->numcores; in BCMATTACHFN()
300 sii->pub.buscoretype = (uint16)cid; in BCMATTACHFN()
394 if (axi_wrapper && (sii->axi_num_wrappers < SI_MAX_AXI_WRAPPERS)) { in BCMATTACHFN()
395 axi_wrapper[sii->axi_num_wrappers].mfg = mfg; in BCMATTACHFN()
396 axi_wrapper[sii->axi_num_wrappers].cid = cid; in BCMATTACHFN()
397 axi_wrapper[sii->axi_num_wrappers].rev = crev; in BCMATTACHFN()
398 axi_wrapper[sii->axi_num_wrappers].wrapper_type = AI_MASTER_WRAPPER; in BCMATTACHFN()
399 axi_wrapper[sii->axi_num_wrappers].wrapper_addr = addrl; in BCMATTACHFN()
400 sii->axi_num_wrappers++; in BCMATTACHFN()
403 sii->axi_num_wrappers, mfg, cid, crev, addrl, sizel)); in BCMATTACHFN()
425 ASSERT(sii->num_br < SI_MAXBR); in BCMATTACHFN()
426 sii->br_wrapba[sii->num_br++] = addrl; in BCMATTACHFN()
447 if (axi_wrapper && (sii->axi_num_wrappers < SI_MAX_AXI_WRAPPERS)) { in BCMATTACHFN()
448 axi_wrapper[sii->axi_num_wrappers].mfg = mfg; in BCMATTACHFN()
449 axi_wrapper[sii->axi_num_wrappers].cid = cid; in BCMATTACHFN()
450 axi_wrapper[sii->axi_num_wrappers].rev = crev; in BCMATTACHFN()
451 axi_wrapper[sii->axi_num_wrappers].wrapper_type = AI_SLAVE_WRAPPER; in BCMATTACHFN()
452 axi_wrapper[sii->axi_num_wrappers].wrapper_addr = addrl; in BCMATTACHFN()
454 sii->axi_num_wrappers++; in BCMATTACHFN()
458 sii->axi_num_wrappers, mfg, cid, crev, addrl, sizel)); in BCMATTACHFN()
470 sii->numcores++; in BCMATTACHFN()
476 sii->numcores = 0; in BCMATTACHFN()
489 si_info_t *sii = SI_INFO(sih); in BCMPOSTTRAPFN() local
490 si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info; in BCMPOSTTRAPFN()
494 if (coreidx >= MIN(sii->numcores, SI_MAXCORES)) in BCMPOSTTRAPFN()
505 (cores_info->coreid[sii->curidx] != APB_BRIDGE_CORE_ID)) in BCMPOSTTRAPFN()
512 ASSERT((sii->intrsenabled_fn == NULL) || in BCMPOSTTRAPFN()
513 !(*(sii)->intrsenabled_fn)((sii)->intr_arg)); in BCMPOSTTRAPFN()
524 sii->curmap = regs = cores_info->regs[coreidx]; in BCMPOSTTRAPFN()
539 sii->curwrap = cores_info->wrappers3[coreidx]; in BCMPOSTTRAPFN()
541 sii->curwrap = cores_info->wrappers2[coreidx]; in BCMPOSTTRAPFN()
543 sii->curwrap = cores_info->wrappers[coreidx]; in BCMPOSTTRAPFN()
548 regs = sii->curmap; in BCMPOSTTRAPFN()
563 switch (sii->slice) { in BCMPOSTTRAPFN()
573 OSL_PCI_WRITE_CONFIG(sii->osh, PCI_BAR0_WIN, 4, addr); in BCMPOSTTRAPFN()
576 if (PCIE_GEN2(sii)) in BCMPOSTTRAPFN()
577 OSL_PCI_WRITE_CONFIG(sii->osh, PCIE2_BAR0_WIN2, 4, wrap); in BCMPOSTTRAPFN()
579 OSL_PCI_WRITE_CONFIG(sii->osh, PCI_BAR0_WIN2, 4, wrap); in BCMPOSTTRAPFN()
585 if (!PCIE_GEN2(sii)) { in BCMPOSTTRAPFN()
587 SI_ERROR(("PCI GEN not supported for slice %d\n", sii->slice)); in BCMPOSTTRAPFN()
594 sii->curwrap = (void *)((uintptr)regs + SI_CORE_SIZE); in BCMPOSTTRAPFN()
597 OSL_PCI_WRITE_CONFIG(sii->osh, PCIE2_BAR0_CORE2_WIN, 4, addr); in BCMPOSTTRAPFN()
598 OSL_PCI_WRITE_CONFIG(sii->osh, PCIE2_BAR0_CORE2_WIN2, 4, wrap); in BCMPOSTTRAPFN()
603 if (!PCIE_GEN2(sii)) { in BCMPOSTTRAPFN()
605 SI_ERROR(("PCI GEN not supported for slice %d\n", sii->slice)); in BCMPOSTTRAPFN()
612 sii->curwrap = (void *)((uintptr)regs + SI_CORE_SIZE); in BCMPOSTTRAPFN()
620 SI_ERROR(("BAR0 Window not supported for slice %d\n", sii->slice)); in BCMPOSTTRAPFN()
630 sii->curmap = regs = (void *)((uintptr)addr); in BCMPOSTTRAPFN()
632 sii->curwrap = (void *)((uintptr)wrap2); in BCMPOSTTRAPFN()
634 sii->curwrap = (void *)((uintptr)wrap); in BCMPOSTTRAPFN()
640 sii->curmap = regs = NULL; in BCMPOSTTRAPFN()
644 sii->curidx = coreidx; in BCMPOSTTRAPFN()
670 const si_info_t *sii = SI_INFO(sih); in ai_coreaddrspaceX() local
671 const si_cores_info_t *cores_info = (const si_cores_info_t *)sii->cores_info; in ai_coreaddrspaceX()
678 for (i = 0; i < sii->numcores; i++) { in ai_coreaddrspaceX()
688 erombase = R_REG(sii->osh, &cc->eromptr); in ai_coreaddrspaceX()
692 cidx = sii->curidx; in ai_coreaddrspaceX()
773 const si_info_t *sii = SI_INFO(sih); in ai_addrspace() local
774 const si_cores_info_t *cores_info = (const si_cores_info_t *)sii->cores_info; in ai_addrspace()
777 cidx = sii->curidx; in ai_addrspace()
807 const si_info_t *sii = SI_INFO(sih); in ai_addrspacesize() local
808 const si_cores_info_t *cores_info = (const si_cores_info_t *)sii->cores_info; in ai_addrspacesize()
811 cidx = sii->curidx; in ai_addrspacesize()
833 const si_info_t *sii = SI_INFO(sih); in ai_flag() local
835 const si_cores_info_t *cores_info = (const si_cores_info_t *)sii->cores_info; in ai_flag()
841 idx = sii->curidx; in ai_flag()
848 ai = sii->curwrap; in ai_flag()
851 return (R_REG(sii->osh, &ai->oobselouta30) & 0x1f); in ai_flag()
857 const si_info_t *sii = SI_INFO(sih); in ai_flag_alt() local
858 aidmp_t *ai = sii->curwrap; in ai_flag_alt()
860 return ((R_REG(sii->osh, &ai->oobselouta30) >> AI_OOBSEL_1_SHIFT) & AI_OOBSEL_MASK); in ai_flag_alt()
875 const si_info_t *sii = SI_INFO(sih); in BCMPOSTTRAPFN() local
876 uint32 *addr = (uint32 *) ((uchar *)(sii->curwrap) + offset); in BCMPOSTTRAPFN()
879 uint32 w = R_REG(sii->osh, addr); in BCMPOSTTRAPFN()
882 W_REG(sii->osh, addr, w); in BCMPOSTTRAPFN()
884 return (R_REG(sii->osh, addr)); in BCMPOSTTRAPFN()
890 const si_info_t *sii = SI_INFO(sih); in ai_corevendor() local
891 const si_cores_info_t *cores_info = (const si_cores_info_t *)sii->cores_info; in ai_corevendor()
894 cia = cores_info->cia[sii->curidx]; in ai_corevendor()
901 const si_info_t *sii = SI_INFO(sih); in BCMPOSTTRAPFN() local
902 const si_cores_info_t *cores_info = (const si_cores_info_t *)sii->cores_info; in BCMPOSTTRAPFN()
905 cib = cores_info->cib[sii->curidx]; in BCMPOSTTRAPFN()
919 const si_info_t *sii = SI_INFO(sih); in BCMPOSTTRAPFN() local
920 aidmp_t *ai = sii->curwrap; in BCMPOSTTRAPFN()
922 return (((R_REG(sii->osh, &ai->ioctrl) & (SICF_FGC | SICF_CLOCK_EN)) == SICF_CLOCK_EN) && in BCMPOSTTRAPFN()
923 ((R_REG(sii->osh, &ai->resetctrl) & AIRC_RESET) == 0)); in BCMPOSTTRAPFN()
943 si_info_t *sii = SI_INFO(sih); in BCMPOSTTRAPFN() local
944 si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info; in BCMPOSTTRAPFN()
946 ASSERT(GOODIDX(coreidx, sii->numcores)); in BCMPOSTTRAPFN()
966 if ((cores_info->coreid[coreidx] == CC_CORE_ID) && SI_FAST(sii)) { in BCMPOSTTRAPFN()
970 r = (volatile uint32 *)((volatile char *)sii->curmap + in BCMPOSTTRAPFN()
972 } else if (sii->pub.buscoreidx == coreidx) { in BCMPOSTTRAPFN()
977 if (SI_FAST(sii)) in BCMPOSTTRAPFN()
978 r = (volatile uint32 *)((volatile char *)sii->curmap + in BCMPOSTTRAPFN()
981 r = (volatile uint32 *)((volatile char *)sii->curmap + in BCMPOSTTRAPFN()
989 INTR_OFF(sii, &intr_val); in BCMPOSTTRAPFN()
992 origidx = si_coreidx(&sii->pub); in BCMPOSTTRAPFN()
995 r = (volatile uint32*) ((volatile uchar*) ai_setcoreidx(&sii->pub, coreidx) + in BCMPOSTTRAPFN()
1002 w = (R_REG(sii->osh, r) & ~mask) | val; in BCMPOSTTRAPFN()
1003 W_REG(sii->osh, r, w); in BCMPOSTTRAPFN()
1007 w = R_REG(sii->osh, r); in BCMPOSTTRAPFN()
1012 ai_setcoreidx(&sii->pub, origidx); in BCMPOSTTRAPFN()
1014 INTR_RESTORE(sii, &intr_val); in BCMPOSTTRAPFN()
1037 si_info_t *sii = SI_INFO(sih); in ai_corereg_writeonly() local
1038 si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info; in ai_corereg_writeonly()
1040 ASSERT(GOODIDX(coreidx, sii->numcores)); in ai_corereg_writeonly()
1060 if ((cores_info->coreid[coreidx] == CC_CORE_ID) && SI_FAST(sii)) { in ai_corereg_writeonly()
1064 r = (volatile uint32 *)((volatile char *)sii->curmap + in ai_corereg_writeonly()
1066 } else if (sii->pub.buscoreidx == coreidx) { in ai_corereg_writeonly()
1071 if (SI_FAST(sii)) in ai_corereg_writeonly()
1072 r = (volatile uint32 *)((volatile char *)sii->curmap + in ai_corereg_writeonly()
1075 r = (volatile uint32 *)((volatile char *)sii->curmap + in ai_corereg_writeonly()
1083 INTR_OFF(sii, &intr_val); in ai_corereg_writeonly()
1086 origidx = si_coreidx(&sii->pub); in ai_corereg_writeonly()
1089 r = (volatile uint32*) ((volatile uchar*) ai_setcoreidx(&sii->pub, coreidx) + in ai_corereg_writeonly()
1096 w = (R_REG(sii->osh, r) & ~mask) | val; in ai_corereg_writeonly()
1097 W_REG(sii->osh, r, w); in ai_corereg_writeonly()
1103 ai_setcoreidx(&sii->pub, origidx); in ai_corereg_writeonly()
1105 INTR_RESTORE(sii, &intr_val); in ai_corereg_writeonly()
1125 si_info_t *sii = SI_INFO(sih); in BCMPOSTTRAPFN() local
1126 si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info; in BCMPOSTTRAPFN()
1128 ASSERT(GOODIDX(coreidx, sii->numcores)); in BCMPOSTTRAPFN()
1147 if ((cores_info->coreid[coreidx] == CC_CORE_ID) && SI_FAST(sii)) { in BCMPOSTTRAPFN()
1151 r = (volatile uint32 *)((volatile char *)sii->curmap + in BCMPOSTTRAPFN()
1153 } else if (sii->pub.buscoreidx == coreidx) { in BCMPOSTTRAPFN()
1158 if (SI_FAST(sii)) in BCMPOSTTRAPFN()
1159 r = (volatile uint32 *)((volatile char *)sii->curmap + in BCMPOSTTRAPFN()
1162 r = (volatile uint32 *)((volatile char *)sii->curmap + in BCMPOSTTRAPFN()
1170 ASSERT(sii->curidx == coreidx); in BCMPOSTTRAPFN()
1171 r = (volatile uint32*) ((volatile uchar*)sii->curmap + regoff); in BCMPOSTTRAPFN()
1180 const si_info_t *sii = SI_INFO(sih); in ai_core_disable() local
1185 ASSERT(GOODREGS(sii->curwrap)); in ai_core_disable()
1186 ai = sii->curwrap; in ai_core_disable()
1189 if (R_REG(sii->osh, &ai->resetctrl) & AIRC_RESET) { in ai_core_disable()
1194 SPINWAIT(((status = R_REG(sii->osh, &ai->resetstatus)) != 0), 300); in ai_core_disable()
1200 SPINWAIT(((status = R_REG(sii->osh, &ai->resetstatus)) != 0), 10000); in ai_core_disable()
1211 W_REG(sii->osh, &ai->resetctrl, AIRC_RESET); in ai_core_disable()
1212 dummy = R_REG(sii->osh, &ai->resetctrl); in ai_core_disable()
1216 W_REG(sii->osh, &ai->ioctrl, bits); in ai_core_disable()
1217 dummy = R_REG(sii->osh, &ai->ioctrl); in ai_core_disable()
1230 const si_info_t *sii = SI_INFO(sih); in BCMPOSTTRAPFN() local
1235 ASSERT(GOODREGS(sii->curwrap)); in BCMPOSTTRAPFN()
1236 ai = sii->curwrap; in BCMPOSTTRAPFN()
1239 SPINWAIT(((dummy = R_REG(sii->osh, &ai->resetstatus)) != 0), 300); in BCMPOSTTRAPFN()
1248 W_REG(sii->osh, &ai->resetctrl, AIRC_RESET); in BCMPOSTTRAPFN()
1252 SPINWAIT((R_REG(sii->osh, &ai->resetstatus) != 0), 300); in BCMPOSTTRAPFN()
1254 W_REG(sii->osh, &ai->ioctrl, (bits | resetbits | SICF_FGC | SICF_CLOCK_EN)); in BCMPOSTTRAPFN()
1255 dummy = R_REG(sii->osh, &ai->ioctrl); in BCMPOSTTRAPFN()
1261 W_REG(sii->osh, &ai->ioctrl, (dummy & (~SICF_FGC))); in BCMPOSTTRAPFN()
1265 SPINWAIT(((dummy = R_REG(sii->osh, &ai->resetstatus)) != 0), 300); in BCMPOSTTRAPFN()
1272 while (R_REG(sii->osh, &ai->resetctrl) != 0 && --loop_counter != 0) { in BCMPOSTTRAPFN()
1274 SPINWAIT(((dummy = R_REG(sii->osh, &ai->resetstatus)) != 0), 300); in BCMPOSTTRAPFN()
1282 W_REG(sii->osh, &ai->resetctrl, 0); in BCMPOSTTRAPFN()
1285 SPINWAIT((R_REG(sii->osh, &ai->resetstatus) != 0), 300); in BCMPOSTTRAPFN()
1297 W_REG(sii->osh, &ai->ioctrl, (bits | SICF_FGC | SICF_CLOCK_EN)); in BCMPOSTTRAPFN()
1299 W_REG(sii->osh, &ai->ioctrl, (bits | SICF_CLOCK_EN)); in BCMPOSTTRAPFN()
1301 dummy = R_REG(sii->osh, &ai->ioctrl); in BCMPOSTTRAPFN()
1307 W_REG(sii->osh, &ai->ioctrl, (dummy & (~SICF_FGC))); in BCMPOSTTRAPFN()
1316 si_info_t *sii = SI_INFO(sih); in BCMPOSTTRAPFN() local
1317 const si_cores_info_t *cores_info = (const si_cores_info_t *)sii->cores_info; in BCMPOSTTRAPFN()
1318 uint idx = sii->curidx; in BCMPOSTTRAPFN()
1346 const si_info_t *sii = SI_INFO(sih); in ai_core_cflags_wo() local
1348 const si_cores_info_t *cores_info = (const si_cores_info_t *)sii->cores_info; in ai_core_cflags_wo()
1358 ASSERT(GOODREGS(sii->curwrap)); in ai_core_cflags_wo()
1359 ai = sii->curwrap; in ai_core_cflags_wo()
1364 w = ((R_REG(sii->osh, &ai->ioctrl) & ~mask) | val); in ai_core_cflags_wo()
1365 W_REG(sii->osh, &ai->ioctrl, w); in ai_core_cflags_wo()
1372 const si_info_t *sii = SI_INFO(sih); in BCMPOSTTRAPFN() local
1374 const si_cores_info_t *cores_info = (const si_cores_info_t *)sii->cores_info; in BCMPOSTTRAPFN()
1383 ASSERT(GOODREGS(sii->curwrap)); in BCMPOSTTRAPFN()
1384 ai = sii->curwrap; in BCMPOSTTRAPFN()
1389 w = ((R_REG(sii->osh, &ai->ioctrl) & ~mask) | val); in BCMPOSTTRAPFN()
1390 W_REG(sii->osh, &ai->ioctrl, w); in BCMPOSTTRAPFN()
1393 return R_REG(sii->osh, &ai->ioctrl); in BCMPOSTTRAPFN()
1399 const si_info_t *sii = SI_INFO(sih); in ai_core_sflags() local
1401 const si_cores_info_t *cores_info = (const si_cores_info_t *)sii->cores_info; in ai_core_sflags()
1411 ASSERT(GOODREGS(sii->curwrap)); in ai_core_sflags()
1412 ai = sii->curwrap; in ai_core_sflags()
1418 w = ((R_REG(sii->osh, &ai->iostatus) & ~mask) | val); in ai_core_sflags()
1419 W_REG(sii->osh, &ai->iostatus, w); in ai_core_sflags()
1422 return R_REG(sii->osh, &ai->iostatus); in ai_core_sflags()
1430 const si_info_t *sii = SI_INFO(sih); in ai_dumpregs() local
1435 const axi_wrapper_t * axi_wrapper = sii->axi_wrapper; in ai_dumpregs()
1439 osh = sii->osh; in ai_dumpregs()
1442 if (BUSTYPE(sii->pub.bustype) == PCI_BUS) { in ai_dumpregs()
1443 if (PCIE_GEN2(sii)) { in ai_dumpregs()
1462 for (i = 0; i < sii->axi_num_wrappers; i++) { in ai_dumpregs()
1464 if (BUSTYPE(sii->pub.bustype) == PCI_BUS) { in ai_dumpregs()
1469 ai = (aidmp_t *) ((volatile uint8*)sii->curmap + bar0_win_offset); in ai_dumpregs()
1510 if (BUSTYPE(sii->pub.bustype) == PCI_BUS) { in ai_dumpregs()
1594 const si_info_t *sii = SI_INFO(sih); in ai_view() local
1595 const si_cores_info_t *cores_info = (const si_cores_info_t *)sii->cores_info; in ai_view()
1600 ai = sii->curwrap; in ai_view()
1601 osh = sii->osh; in ai_view()
1607 cid = cores_info->coreid[sii->curidx]; in ai_view()
1608 addr = cores_info->wrapba[sii->curidx]; in ai_view()
1615 const si_info_t *sii = SI_INFO(sih); in ai_viewall() local
1616 const si_cores_info_t *cores_info = (const si_cores_info_t *)sii->cores_info; in ai_viewall()
1622 osh = sii->osh; in ai_viewall()
1623 for (i = 0; i < sii->numcores; i++) { in ai_viewall()
1630 ai = sii->curwrap; in ai_viewall()
1631 cid = cores_info->coreid[sii->curidx]; in ai_viewall()
1632 addr = cores_info->wrapba[sii->curidx]; in ai_viewall()
1642 const si_info_t *sii = SI_INFO(sih); in ai_update_backplane_timeouts() local
1645 axi_wrapper_t * axi_wrapper = sii->axi_wrapper; in ai_update_backplane_timeouts()
1651 osl_t *osh = sii->osh; in ai_update_backplane_timeouts()
1656 if ((sii->axi_num_wrappers == 0) || in ai_update_backplane_timeouts()
1658 (!PCIE(sii)) || in ai_update_backplane_timeouts()
1663 sii->axi_num_wrappers, PCIE(sii), in ai_update_backplane_timeouts()
1664 BUSTYPE(sii->pub.bustype), sii->pub.buscoretype)); in ai_update_backplane_timeouts()
1670 if (BUSTYPE(sii->pub.bustype) == PCI_BUS) { in ai_update_backplane_timeouts()
1671 if (PCIE_GEN1(sii)) { in ai_update_backplane_timeouts()
1674 } else if (PCIE_GEN2(sii)) { in ai_update_backplane_timeouts()
1691 for (i = 0; i < sii->axi_num_wrappers; ++i) { in ai_update_backplane_timeouts()
1701 if (R_REG(sii->osh, &ai->config) & WRAPPER_TIMEOUT_CONFIG) { in ai_update_backplane_timeouts()
1725 if (BUSTYPE(sii->pub.bustype) == PCI_BUS) { in ai_update_backplane_timeouts()
1731 ai = (aidmp_t *) (DISCARD_QUAL(sii->curmap, uint8) + offset); in ai_update_backplane_timeouts()
1739 W_REG(sii->osh, &ai->errlogctrl, errlogctrl); in ai_update_backplane_timeouts()
1745 R_REG(sii->osh, &ai->errlogctrl))); in ai_update_backplane_timeouts()
1764 BCMPOSTTRAPFN(ai_ignore_errlog)(const si_info_t *sii, const aidmp_t *ai, in BCMPOSTTRAPFN()
1782 switch (CHIPID(sii->pub.chip)) { in BCMPOSTTRAPFN()
1873 const si_info_t *sii = SI_INFO(sih); in ai_get_apb_bridge() local
1876 const si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info; in ai_get_apb_bridge()
1878 if (coreidx >= MIN(sii->numcores, SI_MAXCORES)) in ai_get_apb_bridge()
1893 for (i = 0; i < sii->numcores; i++) { in ai_get_apb_bridge()
1920 const si_info_t *sii = SI_INFO(sih); in ai_clear_backplane_to_fast() local
1921 volatile const void *curmap = sii->curmap; in ai_clear_backplane_to_fast()
1934 if (ai_get_apb_bridge(sih, si_coreidx(&sii->pub), in ai_clear_backplane_to_fast()
1974 const si_info_t *sii = SI_INFO(sih); in BCMPOSTTRAPFN() local
1985 if ((sii->axi_num_wrappers == 0) || in BCMPOSTTRAPFN()
1987 (!PCIE(sii)) || in BCMPOSTTRAPFN()
1992 sii->axi_num_wrappers, PCIE(sii), in BCMPOSTTRAPFN()
1993 BUSTYPE(sii->pub.bustype), sii->pub.buscoretype)); in BCMPOSTTRAPFN()
2021 errlog_status = R_REG(sii->osh, &ai->errlogstatus); in BCMPOSTTRAPFN()
2036 W_REG(sii->osh, &ai->errlogdone, AIELD_ERRDONE_MASK); in BCMPOSTTRAPFN()
2039 while ((tmp = R_REG(sii->osh, &ai->errlogstatus)) & AIELS_ERROR_MASK) { in BCMPOSTTRAPFN()
2053 W_REG(sii->osh, &ai->errlogdone, AIELD_ERRDONE_MASK); in BCMPOSTTRAPFN()
2063 errlog_lo = R_REG(sii->osh, &ai->errlogaddrlo); in BCMPOSTTRAPFN()
2064 errlog_hi = R_REG(sii->osh, &ai->errlogaddrhi); in BCMPOSTTRAPFN()
2065 errlog_id = R_REG(sii->osh, &ai->errlogid); in BCMPOSTTRAPFN()
2066 errlog_flags = R_REG(sii->osh, &ai->errlogflags); in BCMPOSTTRAPFN()
2069 if (ai_ignore_errlog(sii, ai, errlog_lo, errlog_hi, errlog_id, in BCMPOSTTRAPFN()
2083 ai_reset_axi_to(sii, ai); in BCMPOSTTRAPFN()
2158 BCMPOSTTRAPFN(ai_reset_axi_to)(const si_info_t *sii, aidmp_t *ai) in BCMPOSTTRAPFN()
2161 OR_REG(sii->osh, &ai->resetctrl, AIRC_RESET); in BCMPOSTTRAPFN()
2163 (void)R_REG(sii->osh, &ai->resetctrl); in BCMPOSTTRAPFN()
2165 AND_REG(sii->osh, &ai->resetctrl, ~(AIRC_RESET)); in BCMPOSTTRAPFN()
2167 (void)R_REG(sii->osh, &ai->resetctrl); in BCMPOSTTRAPFN()
2169 if (R_REG(sii->osh, &ai->resetctrl) & AIRC_RESET) { in BCMPOSTTRAPFN()
2240 const si_info_t *sii = SI_INFO(sih); in BCMPOSTTRAPFN() local
2243 axi_wrapper_t * axi_wrapper = sii->axi_wrapper; in BCMPOSTTRAPFN()
2247 osl_t *osh = sii->osh; in BCMPOSTTRAPFN()
2251 if ((sii->axi_num_wrappers == 0) || (!PCIE(sii))) in BCMPOSTTRAPFN()
2253 if (sii->axi_num_wrappers == 0) in BCMPOSTTRAPFN()
2258 sii->axi_num_wrappers, PCIE(sii), in BCMPOSTTRAPFN()
2259 BUSTYPE(sii->pub.bustype), sii->pub.buscoretype)); in BCMPOSTTRAPFN()
2265 if (BUSTYPE(sii->pub.bustype) == PCI_BUS) { in BCMPOSTTRAPFN()
2266 if (PCIE_GEN1(sii)) { in BCMPOSTTRAPFN()
2269 } else if (PCIE_GEN2(sii)) { in BCMPOSTTRAPFN()
2302 for (i = 0; i < sii->axi_num_wrappers; ++i) { in BCMPOSTTRAPFN()
2310 if (BUSTYPE(sii->pub.bustype) == PCI_BUS) { in BCMPOSTTRAPFN()
2316 ai = (aidmp_t *) (DISCARD_QUAL(sii->curmap, uint8) + offset); in BCMPOSTTRAPFN()
2345 const si_info_t *sii = SI_INFO(sih); in ai_num_slaveports() local
2346 const si_cores_info_t *cores_info = (const si_cores_info_t *)sii->cores_info; in ai_num_slaveports()
2358 const si_info_t *sii = SI_INFO(sih); in ai_dump_APB_Bridge_registers() local
2360 ai = (aidmp_t *)sii->br_wrapba[0]; in ai_dump_APB_Bridge_registers()
2363 R_REG(sii->osh, &ai->errlogaddrlo), in ai_dump_APB_Bridge_registers()
2364 R_REG(sii->osh, &ai->errlogaddrhi), in ai_dump_APB_Bridge_registers()
2365 R_REG(sii->osh, &ai->errlogid), in ai_dump_APB_Bridge_registers()
2366 R_REG(sii->osh, &ai->errlogflags)); in ai_dump_APB_Bridge_registers()
2367 printf("\n status 0x%08x\n", R_REG(sii->osh, &ai->errlogstatus)); in ai_dump_APB_Bridge_registers()
2374 const si_info_t *sii = SI_INFO(sih); in ai_force_clocks() local
2378 const si_cores_info_t *cores_info = (const si_cores_info_t *)sii->cores_info; in ai_force_clocks()
2380 ASSERT(GOODREGS(sii->curwrap)); in ai_force_clocks()
2381 ai = sii->curwrap; in ai_force_clocks()
2382 if (cores_info->wrapba2[sii->curidx]) in ai_force_clocks()
2383 ai_sec = REG_MAP(cores_info->wrapba2[sii->curidx], SI_CORE_SIZE); in ai_force_clocks()
2386 SPINWAIT((R_REG(sii->osh, &ai->resetstatus) != 0), 300); in ai_force_clocks()
2389 ioctrl = R_REG(sii->osh, &ai->ioctrl); in ai_force_clocks()
2390 W_REG(sii->osh, &ai->ioctrl, (ioctrl | SICF_FGC)); in ai_force_clocks()
2391 dummy = R_REG(sii->osh, &ai->ioctrl); in ai_force_clocks()
2394 ioctrl = R_REG(sii->osh, &ai_sec->ioctrl); in ai_force_clocks()
2395 W_REG(sii->osh, &ai_sec->ioctrl, (ioctrl | SICF_FGC)); in ai_force_clocks()
2396 dummy = R_REG(sii->osh, &ai_sec->ioctrl); in ai_force_clocks()
2400 ioctrl = R_REG(sii->osh, &ai->ioctrl); in ai_force_clocks()
2401 W_REG(sii->osh, &ai->ioctrl, (ioctrl & (~SICF_FGC))); in ai_force_clocks()
2402 dummy = R_REG(sii->osh, &ai->ioctrl); in ai_force_clocks()
2405 ioctrl = R_REG(sii->osh, &ai_sec->ioctrl); in ai_force_clocks()
2406 W_REG(sii->osh, &ai_sec->ioctrl, (ioctrl & (~SICF_FGC))); in ai_force_clocks()
2407 dummy = R_REG(sii->osh, &ai_sec->ioctrl); in ai_force_clocks()
2412 SPINWAIT((R_REG(sii->osh, &ai->resetstatus) != 0), 300); in ai_force_clocks()
2497 const si_info_t *sii = SI_INFO(sih); in BCMATTACHFN() local
2499 wrapper_count = sii->axi_num_wrappers; in BCMATTACHFN()
2511 BCMPOSTTRAPFN(ai_wrapper_dump_binary_one)(const si_info_t *sii, uint32 *p32, uint32 wrap_ba) in BCMPOSTTRAPFN()
2523 *p32++ = R_REG(sii->osh, addr); in BCMPOSTTRAPFN()
2548 const si_info_t *sii = SI_INFO(sih); in BCMPOSTTRAPFN() local
2561 *p32++ = R_REG(sii->osh, addr); in BCMPOSTTRAPFN()
2582 const si_info_t *sii = SI_INFO(sih); in BCMPOSTTRAPFN() local
2584 for (i = 0; i < sii->axi_num_wrappers; i++) { in BCMPOSTTRAPFN()
2585 p32 = ai_wrapper_dump_binary_one(sii, p32, sii->axi_wrapper[i].wrapper_addr); in BCMPOSTTRAPFN()