Lines Matching refs:coreidx
51 static bool ai_get_apb_bridge(const si_t *sih, uint32 coreidx, uint32 *apb_id,
487 BCMPOSTTRAPFN(_ai_setcoreidx)(si_t *sih, uint coreidx, uint use_wrapn) in BCMPOSTTRAPFN()
494 if (coreidx >= MIN(sii->numcores, SI_MAXCORES)) in BCMPOSTTRAPFN()
497 addr = cores_info->coresba[coreidx]; in BCMPOSTTRAPFN()
498 wrap = cores_info->wrapba[coreidx]; in BCMPOSTTRAPFN()
499 wrap2 = cores_info->wrapba2[coreidx]; in BCMPOSTTRAPFN()
500 wrap3 = cores_info->wrapba3[coreidx]; in BCMPOSTTRAPFN()
504 if ((cores_info->coreid[coreidx] != APB_BRIDGE_CORE_ID) && in BCMPOSTTRAPFN()
519 if (!cores_info->regs[coreidx]) { in BCMPOSTTRAPFN()
520 cores_info->regs[coreidx] = REG_MAP(addr, in BCMPOSTTRAPFN()
521 AI_SETCOREIDX_MAPSIZE(cores_info->coreid[coreidx])); in BCMPOSTTRAPFN()
522 ASSERT(GOODREGS(cores_info->regs[coreidx])); in BCMPOSTTRAPFN()
524 sii->curmap = regs = cores_info->regs[coreidx]; in BCMPOSTTRAPFN()
525 if (!cores_info->wrappers[coreidx] && (wrap != 0)) { in BCMPOSTTRAPFN()
526 cores_info->wrappers[coreidx] = REG_MAP(wrap, SI_CORE_SIZE); in BCMPOSTTRAPFN()
527 ASSERT(GOODREGS(cores_info->wrappers[coreidx])); in BCMPOSTTRAPFN()
529 if (!cores_info->wrappers2[coreidx] && (wrap2 != 0)) { in BCMPOSTTRAPFN()
530 cores_info->wrappers2[coreidx] = REG_MAP(wrap2, SI_CORE_SIZE); in BCMPOSTTRAPFN()
531 ASSERT(GOODREGS(cores_info->wrappers2[coreidx])); in BCMPOSTTRAPFN()
533 if (!cores_info->wrappers3[coreidx] && (wrap3 != 0)) { in BCMPOSTTRAPFN()
534 cores_info->wrappers3[coreidx] = REG_MAP(wrap3, SI_CORE_SIZE); in BCMPOSTTRAPFN()
535 ASSERT(GOODREGS(cores_info->wrappers3[coreidx])); in BCMPOSTTRAPFN()
539 sii->curwrap = cores_info->wrappers3[coreidx]; in BCMPOSTTRAPFN()
541 sii->curwrap = cores_info->wrappers2[coreidx]; in BCMPOSTTRAPFN()
543 sii->curwrap = cores_info->wrappers[coreidx]; in BCMPOSTTRAPFN()
569 if (cores_info->coreid[coreidx] != APB_BRIDGE_CORE_ID) in BCMPOSTTRAPFN()
644 sii->curidx = coreidx; in BCMPOSTTRAPFN()
650 BCMPOSTTRAPFN(ai_setcoreidx)(si_t *sih, uint coreidx) in BCMPOSTTRAPFN()
652 return _ai_setcoreidx(sih, coreidx, 0); in BCMPOSTTRAPFN()
656 BCMPOSTTRAPFN(ai_setcoreidx_2ndwrap)(si_t *sih, uint coreidx) in BCMPOSTTRAPFN()
658 return _ai_setcoreidx(sih, coreidx, 1); in BCMPOSTTRAPFN()
662 BCMPOSTTRAPFN(ai_setcoreidx_3rdwrap)(si_t *sih, uint coreidx) in BCMPOSTTRAPFN()
664 return _ai_setcoreidx(sih, coreidx, 2); in BCMPOSTTRAPFN()
936 BCMPOSTTRAPFN(ai_corereg)(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) in BCMPOSTTRAPFN()
946 ASSERT(GOODIDX(coreidx, sii->numcores)); in BCMPOSTTRAPFN()
950 if (coreidx >= SI_MAXCORES) in BCMPOSTTRAPFN()
957 if (!cores_info->regs[coreidx]) { in BCMPOSTTRAPFN()
958 cores_info->regs[coreidx] = REG_MAP(cores_info->coresba[coreidx], in BCMPOSTTRAPFN()
960 ASSERT(GOODREGS(cores_info->regs[coreidx])); in BCMPOSTTRAPFN()
962 r = (volatile uint32 *)((volatile uchar *)cores_info->regs[coreidx] + regoff); in BCMPOSTTRAPFN()
966 if ((cores_info->coreid[coreidx] == CC_CORE_ID) && SI_FAST(sii)) { in BCMPOSTTRAPFN()
972 } else if (sii->pub.buscoreidx == coreidx) { in BCMPOSTTRAPFN()
995 r = (volatile uint32*) ((volatile uchar*) ai_setcoreidx(&sii->pub, coreidx) + in BCMPOSTTRAPFN()
1011 if (origidx != coreidx) in BCMPOSTTRAPFN()
1030 ai_corereg_writeonly(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) in ai_corereg_writeonly() argument
1040 ASSERT(GOODIDX(coreidx, sii->numcores)); in ai_corereg_writeonly()
1044 if (coreidx >= SI_MAXCORES) in ai_corereg_writeonly()
1051 if (!cores_info->regs[coreidx]) { in ai_corereg_writeonly()
1052 cores_info->regs[coreidx] = REG_MAP(cores_info->coresba[coreidx], in ai_corereg_writeonly()
1054 ASSERT(GOODREGS(cores_info->regs[coreidx])); in ai_corereg_writeonly()
1056 r = (volatile uint32 *)((volatile uchar *)cores_info->regs[coreidx] + regoff); in ai_corereg_writeonly()
1060 if ((cores_info->coreid[coreidx] == CC_CORE_ID) && SI_FAST(sii)) { in ai_corereg_writeonly()
1066 } else if (sii->pub.buscoreidx == coreidx) { in ai_corereg_writeonly()
1089 r = (volatile uint32*) ((volatile uchar*) ai_setcoreidx(&sii->pub, coreidx) + in ai_corereg_writeonly()
1102 if (origidx != coreidx) in ai_corereg_writeonly()
1121 BCMPOSTTRAPFN(ai_corereg_addr)(si_t *sih, uint coreidx, uint regoff) in BCMPOSTTRAPFN()
1128 ASSERT(GOODIDX(coreidx, sii->numcores)); in BCMPOSTTRAPFN()
1131 if (coreidx >= SI_MAXCORES) in BCMPOSTTRAPFN()
1138 if (!cores_info->regs[coreidx]) { in BCMPOSTTRAPFN()
1139 cores_info->regs[coreidx] = REG_MAP(cores_info->coresba[coreidx], in BCMPOSTTRAPFN()
1141 ASSERT(GOODREGS(cores_info->regs[coreidx])); in BCMPOSTTRAPFN()
1143 r = (volatile uint32 *)((volatile uchar *)cores_info->regs[coreidx] + regoff); in BCMPOSTTRAPFN()
1147 if ((cores_info->coreid[coreidx] == CC_CORE_ID) && SI_FAST(sii)) { in BCMPOSTTRAPFN()
1153 } else if (sii->pub.buscoreidx == coreidx) { in BCMPOSTTRAPFN()
1170 ASSERT(sii->curidx == coreidx); in BCMPOSTTRAPFN()
1869 ai_get_apb_bridge(const si_t * sih, uint32 coreidx, uint32 *apb_id, uint32 * apb_coreunit) in ai_get_apb_bridge() argument
1878 if (coreidx >= MIN(sii->numcores, SI_MAXCORES)) in ai_get_apb_bridge()
1884 if (coreidx_cached == coreidx) { in ai_get_apb_bridge()
1890 core_base = cores_info->coresba[coreidx]; in ai_get_apb_bridge()
1891 core_end = core_base + cores_info->coresba_size[coreidx]; in ai_get_apb_bridge()
1906 coreidx_cached = coreidx; in ai_get_apb_bridge()
2343 ai_num_slaveports(const si_t *sih, uint coreidx) in ai_num_slaveports() argument
2349 cib = cores_info->cib[coreidx]; in ai_num_slaveports()