Lines Matching refs:SI_VMSG
126 SI_VMSG(("get_erom_ent: Returning ent 0x%08x\n", ent)); in get_erom_ent()
128 SI_VMSG((" after %d invalid and %d non-matching entries\n", inv, nom)); in get_erom_ent()
164 SI_VMSG((" SP %d, ad %d: st = %d, 0x%08x_0x%08x @ 0x%08x_0x%08x\n", in get_asd()
213 SI_VMSG(("ai_scan: regs = 0x%p, erombase = 0x%08x, eromptr = 0x%p, eromlim = 0x%p\n", in BCMATTACHFN()
227 SI_VMSG(("Found END of erom after %d cores\n", sii->numcores)); in BCMATTACHFN()
247 SI_VMSG(("Found component 0x%04x/0x%04x rev %d at erom addr 0x%p, with nmw = %d, " in BCMATTACHFN()
310 SI_VMSG((" Master port %d, mp: %d id: %d\n", i, in BCMATTACHFN()
346 SI_VMSG(("Warning: sizel > 0x1000\n")); in BCMATTACHFN()
401 SI_VMSG(("MASTER WRAPPER: %d, mfg:%x, cid:%x," in BCMATTACHFN()
456 SI_VMSG(("SLAVE WRAPPER: %d, mfg:%x, cid:%x," in BCMATTACHFN()
1661 SI_VMSG((" iai_update_backplane_timeouts, axi_num_wrappers:%d, Is_PCIE:%d," in ai_update_backplane_timeouts()
1712 SI_VMSG(("SKIP ENABLE BPT: MFG:%x, CID:%x, ADDR:%x\n", in ai_update_backplane_timeouts()
1741 SI_VMSG(("ENABLED BPT: MFG:%x, CID:%x, ADDR:%x, ERR_CTRL:%x\n", in ai_update_backplane_timeouts()
1990 SI_VMSG(("ai_clear_backplane_to_per_core, axi_num_wrappers:%d, Is_PCIE:%d," in BCMPOSTTRAPFN()
2256 SI_VMSG(("ai_clear_backplane_to, axi_num_wrappers:%d, Is_PCIE:%d, BUS_TYPE:%d," in BCMPOSTTRAPFN()