Lines Matching full:select
19 select BR2_ARM_CPU_MAYBE_HAS_FPU
23 select BR2_ARM_CPU_HAS_FPU
28 select BR2_ARM_CPU_MAYBE_HAS_VFPV2
32 select BR2_ARM_CPU_HAS_VFPV2
37 select BR2_ARM_CPU_MAYBE_HAS_VFPV3
41 select BR2_ARM_CPU_HAS_VFPV3
46 select BR2_ARM_CPU_MAYBE_HAS_FPU
50 select BR2_ARM_CPU_HAS_FPU
55 select BR2_ARM_CPU_MAYBE_HAS_FPV4
59 select BR2_ARM_CPU_HAS_FPV4
63 select BR2_ARM_CPU_HAS_VFPV4
103 select BR2_ARM_CPU_HAS_ARM
104 select BR2_ARM_CPU_HAS_THUMB
105 select BR2_ARM_CPU_ARMV4
106 select BR2_ARCH_HAS_MMU_OPTIONAL
109 select BR2_ARM_CPU_HAS_ARM
110 select BR2_ARM_CPU_HAS_THUMB
111 select BR2_ARM_CPU_ARMV4
112 select BR2_ARCH_HAS_MMU_OPTIONAL
115 select BR2_ARM_CPU_HAS_ARM
116 select BR2_ARM_CPU_ARMV4
117 select BR2_ARCH_HAS_MMU_OPTIONAL
120 select BR2_ARM_CPU_HAS_ARM
121 select BR2_ARM_CPU_ARMV4
122 select BR2_ARCH_HAS_MMU_OPTIONAL
127 select BR2_ARM_CPU_HAS_ARM
128 select BR2_ARM_CPU_MAYBE_HAS_VFPV2
129 select BR2_ARM_CPU_HAS_THUMB
130 select BR2_ARM_CPU_ARMV5
131 select BR2_ARCH_HAS_MMU_OPTIONAL
134 select BR2_ARM_CPU_HAS_ARM
135 select BR2_ARM_CPU_ARMV5
136 select BR2_ARCH_HAS_MMU_OPTIONAL
139 select BR2_ARM_CPU_HAS_ARM
140 select BR2_ARM_CPU_HAS_THUMB
141 select BR2_ARM_CPU_ARMV5
142 select BR2_ARCH_HAS_MMU_OPTIONAL
147 select BR2_ARM_CPU_HAS_ARM
148 select BR2_ARM_CPU_HAS_THUMB
149 select BR2_ARM_CPU_ARMV6
150 select BR2_ARCH_HAS_MMU_OPTIONAL
153 select BR2_ARM_CPU_HAS_ARM
154 select BR2_ARM_CPU_HAS_VFPV2
155 select BR2_ARM_CPU_HAS_THUMB
156 select BR2_ARM_CPU_ARMV6
157 select BR2_ARCH_HAS_MMU_OPTIONAL
160 select BR2_ARM_CPU_HAS_ARM
161 select BR2_ARM_CPU_HAS_THUMB
162 select BR2_ARM_CPU_ARMV6
163 select BR2_ARCH_HAS_MMU_OPTIONAL
166 select BR2_ARM_CPU_HAS_ARM
167 select BR2_ARM_CPU_HAS_VFPV2
168 select BR2_ARM_CPU_HAS_THUMB
169 select BR2_ARM_CPU_ARMV6
170 select BR2_ARCH_HAS_MMU_OPTIONAL
173 select BR2_ARM_CPU_HAS_ARM
174 select BR2_ARM_CPU_MAYBE_HAS_VFPV2
175 select BR2_ARM_CPU_HAS_THUMB
176 select BR2_ARM_CPU_ARMV6
177 select BR2_ARCH_HAS_MMU_OPTIONAL
182 select BR2_ARM_CPU_HAS_ARM
183 select BR2_ARM_CPU_MAYBE_HAS_NEON
184 select BR2_ARM_CPU_MAYBE_HAS_VFPV4
185 select BR2_ARM_CPU_HAS_THUMB2
186 select BR2_ARM_CPU_ARMV7A
187 select BR2_ARCH_HAS_MMU_OPTIONAL
190 select BR2_ARM_CPU_HAS_ARM
191 select BR2_ARM_CPU_HAS_NEON
192 select BR2_ARM_CPU_HAS_VFPV4
193 select BR2_ARM_CPU_HAS_THUMB2
194 select BR2_ARM_CPU_ARMV7A
195 select BR2_ARCH_HAS_MMU_OPTIONAL
198 select BR2_ARM_CPU_HAS_ARM
199 select BR2_ARM_CPU_HAS_NEON
200 select BR2_ARM_CPU_HAS_VFPV3
201 select BR2_ARM_CPU_HAS_THUMB2
202 select BR2_ARM_CPU_ARMV7A
203 select BR2_ARCH_HAS_MMU_OPTIONAL
206 select BR2_ARM_CPU_HAS_ARM
207 select BR2_ARM_CPU_MAYBE_HAS_NEON
208 select BR2_ARM_CPU_MAYBE_HAS_VFPV3
209 select BR2_ARM_CPU_HAS_THUMB2
210 select BR2_ARM_CPU_ARMV7A
211 select BR2_ARCH_HAS_MMU_OPTIONAL
214 select BR2_ARM_CPU_HAS_ARM
215 select BR2_ARM_CPU_HAS_NEON
216 select BR2_ARM_CPU_HAS_VFPV4
217 select BR2_ARM_CPU_HAS_THUMB2
218 select BR2_ARM_CPU_ARMV7A
219 select BR2_ARCH_HAS_MMU_OPTIONAL
222 select BR2_ARM_CPU_HAS_ARM
223 select BR2_ARM_CPU_HAS_NEON
224 select BR2_ARM_CPU_HAS_VFPV4
225 select BR2_ARM_CPU_HAS_THUMB2
226 select BR2_ARM_CPU_ARMV7A
227 select BR2_ARCH_HAS_MMU_OPTIONAL
230 select BR2_ARM_CPU_HAS_ARM
231 select BR2_ARM_CPU_HAS_NEON
232 select BR2_ARM_CPU_HAS_VFPV4
233 select BR2_ARM_CPU_HAS_THUMB2
234 select BR2_ARM_CPU_ARMV7A
235 select BR2_ARCH_HAS_MMU_OPTIONAL
236 select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
239 select BR2_ARM_CPU_HAS_ARM
240 select BR2_ARM_CPU_HAS_NEON
241 select BR2_ARM_CPU_HAS_VFPV4
242 select BR2_ARM_CPU_HAS_THUMB2
243 select BR2_ARM_CPU_ARMV7A
244 select BR2_ARCH_HAS_MMU_OPTIONAL
245 select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
248 select BR2_ARM_CPU_HAS_ARM
249 select BR2_ARM_CPU_HAS_NEON
250 select BR2_ARM_CPU_HAS_VFPV4
251 select BR2_ARM_CPU_HAS_THUMB2
252 select BR2_ARM_CPU_ARMV7A
253 select BR2_ARCH_HAS_MMU_OPTIONAL
254 select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
257 select BR2_ARM_CPU_HAS_ARM
258 select BR2_ARM_CPU_HAS_VFPV3
259 select BR2_ARM_CPU_ARMV7A
260 select BR2_ARCH_HAS_MMU_OPTIONAL
265 select BR2_ARM_CPU_HAS_THUMB2
266 select BR2_ARM_CPU_ARMV7M
269 select BR2_ARM_CPU_HAS_THUMB2
270 select BR2_ARM_CPU_MAYBE_HAS_FPV4
271 select BR2_ARM_CPU_ARMV7M
274 select BR2_ARM_CPU_HAS_THUMB2
275 select BR2_ARM_CPU_MAYBE_HAS_FPV5
276 select BR2_ARM_CPU_ARMV7M
277 select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
284 select BR2_ARM_CPU_HAS_ARM
285 select BR2_ARM_CPU_HAS_NEON
286 select BR2_ARM_CPU_HAS_THUMB2
287 select BR2_ARM_CPU_HAS_FP_ARMV8
288 select BR2_ARM_CPU_ARMV8A
289 select BR2_ARCH_HAS_MMU_OPTIONAL
290 select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
293 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
294 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
295 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
296 select BR2_ARM_CPU_HAS_FP_ARMV8
297 select BR2_ARM_CPU_ARMV8A
298 select BR2_ARCH_HAS_MMU_OPTIONAL
299 select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
302 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
303 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
304 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
305 select BR2_ARM_CPU_HAS_FP_ARMV8
306 select BR2_ARM_CPU_ARMV8A
307 select BR2_ARCH_HAS_MMU_OPTIONAL
310 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
311 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
312 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
313 select BR2_ARM_CPU_HAS_FP_ARMV8
314 select BR2_ARM_CPU_ARMV8A
315 select BR2_ARCH_HAS_MMU_OPTIONAL
318 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
319 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
320 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
321 select BR2_ARM_CPU_HAS_FP_ARMV8
322 select BR2_ARM_CPU_ARMV8A
323 select BR2_ARCH_HAS_MMU_OPTIONAL
324 select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
327 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
328 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
329 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
330 select BR2_ARM_CPU_HAS_FP_ARMV8
331 select BR2_ARM_CPU_ARMV8A
332 select BR2_ARCH_HAS_MMU_OPTIONAL
333 select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
336 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
337 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
338 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
339 select BR2_ARM_CPU_HAS_FP_ARMV8
340 select BR2_ARM_CPU_ARMV8A
341 select BR2_ARCH_HAS_MMU_OPTIONAL
342 select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
345 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
346 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
347 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
348 select BR2_ARM_CPU_HAS_FP_ARMV8
349 select BR2_ARM_CPU_ARMV8A
350 select BR2_ARCH_HAS_MMU_OPTIONAL
351 select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
354 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
355 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
356 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
357 select BR2_ARM_CPU_HAS_FP_ARMV8
358 select BR2_ARM_CPU_ARMV8A
359 select BR2_ARCH_HAS_MMU_OPTIONAL
360 select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
363 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
364 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
365 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
366 select BR2_ARM_CPU_HAS_FP_ARMV8
367 select BR2_ARM_CPU_ARMV8A
368 select BR2_ARCH_HAS_MMU_OPTIONAL
369 select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
373 select BR2_ARM_CPU_HAS_FP_ARMV8
374 select BR2_ARM_CPU_ARMV8A
375 select BR2_ARCH_HAS_MMU_OPTIONAL
376 select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
379 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
380 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
381 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
382 select BR2_ARM_CPU_HAS_FP_ARMV8
383 select BR2_ARM_CPU_ARMV8A
384 select BR2_ARCH_HAS_MMU_OPTIONAL
385 select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
389 select BR2_ARM_CPU_HAS_FP_ARMV8
390 select BR2_ARM_CPU_ARMV8A
391 select BR2_ARCH_HAS_MMU_OPTIONAL
392 select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
396 select BR2_ARM_CPU_HAS_FP_ARMV8
397 select BR2_ARM_CPU_ARMV8A
398 select BR2_ARCH_HAS_MMU_OPTIONAL
399 select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
403 select BR2_ARM_CPU_HAS_FP_ARMV8
404 select BR2_ARM_CPU_ARMV8A
405 select BR2_ARCH_HAS_MMU_OPTIONAL
406 select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
410 select BR2_ARM_CPU_HAS_FP_ARMV8
411 select BR2_ARM_CPU_ARMV8A
412 select BR2_ARCH_HAS_MMU_OPTIONAL
413 select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
417 select BR2_ARM_CPU_HAS_FP_ARMV8
418 select BR2_ARM_CPU_ARMV8A
419 select BR2_ARCH_HAS_MMU_OPTIONAL
420 select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
424 select BR2_ARM_CPU_HAS_FP_ARMV8
425 select BR2_ARM_CPU_ARMV8A
426 select BR2_ARCH_HAS_MMU_OPTIONAL
427 select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
431 select BR2_ARM_CPU_HAS_FP_ARMV8
432 select BR2_ARM_CPU_ARMV8A
433 select BR2_ARCH_HAS_MMU_OPTIONAL
434 select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
438 select BR2_ARM_CPU_HAS_FP_ARMV8
439 select BR2_ARM_CPU_ARMV8A
440 select BR2_ARCH_HAS_MMU_OPTIONAL
441 select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
444 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
445 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
446 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
447 select BR2_ARM_CPU_HAS_FP_ARMV8
448 select BR2_ARM_CPU_ARMV8A
449 select BR2_ARCH_HAS_MMU_OPTIONAL
450 select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
456 select BR2_ARM_CPU_HAS_FP_ARMV8
457 select BR2_ARM_CPU_ARMV8A
458 select BR2_ARCH_HAS_MMU_OPTIONAL
459 select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
463 select BR2_ARM_CPU_HAS_FP_ARMV8
464 select BR2_ARM_CPU_ARMV8A
465 select BR2_ARCH_HAS_MMU_OPTIONAL
466 select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
470 select BR2_ARM_CPU_HAS_FP_ARMV8
471 select BR2_ARM_CPU_ARMV8A
472 select BR2_ARCH_HAS_MMU_OPTIONAL
473 select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
478 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
479 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
480 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
481 select BR2_ARM_CPU_HAS_FP_ARMV8
482 select BR2_ARM_CPU_ARMV8A
483 select BR2_ARCH_HAS_MMU_OPTIONAL
484 select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
487 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
488 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
489 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
490 select BR2_ARM_CPU_HAS_FP_ARMV8
491 select BR2_ARM_CPU_ARMV8A
492 select BR2_ARCH_HAS_MMU_OPTIONAL
493 select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
496 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
497 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
498 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
499 select BR2_ARM_CPU_HAS_FP_ARMV8
500 select BR2_ARM_CPU_ARMV8A
501 select BR2_ARCH_HAS_MMU_OPTIONAL
502 select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
505 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
506 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
507 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
508 select BR2_ARM_CPU_HAS_FP_ARMV8
509 select BR2_ARM_CPU_ARMV8A
510 select BR2_ARCH_HAS_MMU_OPTIONAL
511 select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
514 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
515 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
516 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
517 select BR2_ARM_CPU_HAS_FP_ARMV8
518 select BR2_ARM_CPU_ARMV8A
519 select BR2_ARCH_HAS_MMU_OPTIONAL
520 select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
523 select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
524 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
525 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
526 select BR2_ARM_CPU_HAS_FP_ARMV8
527 select BR2_ARM_CPU_ARMV8A
528 select BR2_ARCH_HAS_MMU_OPTIONAL
529 select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
533 select BR2_ARM_CPU_HAS_FP_ARMV8
534 select BR2_ARM_CPU_ARMV8A
535 select BR2_ARCH_HAS_MMU_OPTIONAL
536 select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
542 select BR2_ARM_CPU_HAS_FP_ARMV8
543 select BR2_ARM_CPU_ARMV8A
544 select BR2_ARCH_HAS_MMU_OPTIONAL
545 select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
551 select BR2_ARM_CPU_HAS_NEON
554 Select this option if you are certain your particular
560 select BR2_ARM_CPU_HAS_FPV5 if BR2_ARM_CPU_MAYBE_HAS_FPV5
561 select BR2_ARM_CPU_HAS_FPV4 if BR2_ARM_CPU_MAYBE_HAS_FPV4
562 select BR2_ARM_CPU_HAS_VFPV4 if BR2_ARM_CPU_MAYBE_HAS_VFPV4
563 select BR2_ARM_CPU_HAS_VFPV3 if BR2_ARM_CPU_MAYBE_HAS_VFPV3
564 select BR2_ARM_CPU_HAS_VFPV2 if BR2_ARM_CPU_MAYBE_HAS_VFPV2
566 For some CPU cores, the VFP extension is optional. Select
641 select BR2_SOFT_FLOAT
710 instead select VFPv3.
725 instead select VFPv3-D16.
759 select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
766 Cortex-M4, you should instead select FPv4-D16.
771 select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
778 Cortex-M4, you should instead select FPv4-D16.