px30: bl31: update version to v1.26

Build from ATF commit:
12a2070163 plat: px30-s: dram: Disable LPDDR4 CA(except CK CS) ODT of CS1
Update feature:
12a2070163 plat: px30-s: dram: Disable LPDDR4 C

px30: bl31: update version to v1.26

Build from ATF commit:
12a2070163 plat: px30-s: dram: Disable LPDDR4 CA(except CK CS) ODT of CS1
Update feature:
12a2070163 plat: px30-s: dram: Disable LPDDR4 CA(except CK CS) ODT of CS1
f968b05b21 plat: px30-s: dram: Fix value of LPDDR3/LPDDR2 MR3 in cal_ds_odt()

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I84f7b76cb95353691bb115d511f1ea3fb26da628

show more ...

rk3588: spl: update version to v1.07

build from:
4080111: clk: rockchip: rk3588: Use scmi clk for cpub

build command:
./make.sh rk3588

update features:
1.Assert hdptxphy init,cmn,lane reset

Si

rk3588: spl: update version to v1.07

build from:
4080111: clk: rockchip: rk3588: Use scmi clk for cpub

build command:
./make.sh rk3588

update features:
1.Assert hdptxphy init,cmn,lane reset

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I7f46d41d7a5d1be324a1bb01786abe748e0d4f45

show more ...

rk3588: bl31: update version to v1.13

Build from ATF commit:
378cb8595 plat: rockchip: rk3588: dmc: support ddr frequency scan after dmc resume

The ATF code for this version is same with The AT

rk3588: bl31: update version to v1.13

Build from ATF commit:
378cb8595 plat: rockchip: rk3588: dmc: support ddr frequency scan after dmc resume

The ATF code for this version is same with The ATF code for v1.12.

Change-Id: Ibdf3603321ed5155c7623bfcf9b2200a3af45a81
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

show more ...

rk3588: ddr: update ddr bin to v1.05

build from:
ba2cb251dc rk3588: ddr: update ddr bin to v1.05

build command:
./make.sh rk3588

update feature:
8021b1f709 rk3588: ddr: CFG_BOOT_MODE_REG use pm

rk3588: ddr: update ddr bin to v1.05

build from:
ba2cb251dc rk3588: ddr: update ddr bin to v1.05

build command:
./make.sh rk3588

update feature:
8021b1f709 rk3588: ddr: CFG_BOOT_MODE_REG use pmu0grf_os_reg8
4ff913ef2f rk3588: fix cs detect bug

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Ie426fb5f4e3173ee6db4408fe31d4e959bb8c8ba

show more ...

rk3588: usbplug: Update to v1.07

from commit:
rk_boot_all: b91de paltform: rk3588 Update to v1.07
update feature:
fix emmc waiting timeout when upgrading fw.

Signed-off-by: Chen Fen

rk3588: usbplug: Update to v1.07

from commit:
rk_boot_all: b91de paltform: rk3588 Update to v1.07
update feature:
fix emmc waiting timeout when upgrading fw.

Signed-off-by: Chen Fen <chenfen@rock-chips.com>
Change-Id: Ibf5f48b0ca81e8ae03742f438e4fe84803951d2f

show more ...

rk3326/px30: ddr: Update ddr bin to V2.02 20220118 to support rk3326-s/px30-s

build from RK3326_DDR_Init_Simple:
d6f4cb05c9 rk3326/rk3326-s: Update DDR bin to V2.02 20220118

update feature:
6faa6

rk3326/px30: ddr: Update ddr bin to V2.02 20220118 to support rk3326-s/px30-s

build from RK3326_DDR_Init_Simple:
d6f4cb05c9 rk3326/rk3326-s: Update DDR bin to V2.02 20220118

update feature:
6faa6a326a rk3326-s: Set VDD_logic to 1.0V
8e81392239 rk3326-s: Disable some low power functions to prevent sleep and resume
(level 2) fail
9590d94add px30s: can not support row = 17 of lp4
c699c118bb px30s: modify dfi_tlp_resp to 0xa
df3d5d15fc px30s: modify vdd_logic to 0.9v
0fa00910a4 px30s: clear ddr clk gate for soft reset
08f7c28847 rk3326/rk3326s: Optimize the size of ddr bin
153b747d5f rk3326-s: Fix get_uboot_params() when sdram_params->ch.row_3_4 == 1
3b83b56391 rk3326s: set logic to 1.0V
a8eced54fb rk3326/s: all dram bring up ok
b280140e97 rk3326/s: add debug info
c4b391e8b4 rk3326/rk3326s: modify dfi timing for lp3/2
cec9c2868b rk3326/rk3326s: diff dfi tctrl_delay setting
de967f4b65 rk3326/rk3326s: modify dfi timing
fa9c9e3f4f rk3326s: add fix drv odt config
c534fef2c6 rk3326s: add support lp4
69776fa864 rk3326: inc: add rk3326s phy reg
3a1078c07d RK3326S: modify to PHY_REG_3326S define
fc7426a9a7 rk3326/S: save and restore arm special reg
2651ce4f97 rk3326/S: add check return to smc code

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Id91158b3d6decc57366dc3259e232f24da6b64ce

show more ...

rk3568: bl32: update version to v2.05

Build from OPTEE commit in develop-next branch:
631d7ed9a pta: modify secure boot enable flag for rk3568
Update features:
631d7ed9a pta: modify secure b

rk3568: bl32: update version to v2.05

Build from OPTEE commit in develop-next branch:
631d7ed9a pta: modify secure boot enable flag for rk3568
Update features:
631d7ed9a pta: modify secure boot enable flag for rk3568
be93c3390 Revert "pta: modify secure boot enable flag length for rk3568"
3f0f0b052 pta: support check oem otp key is written

Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I3e8f84e6c20bf452ce486e61f3ac63f64e80239e

show more ...

rk3326: bl31: update version to v1.25

Build from ATF commit:
661655f41 plat: px30-s: Avoid DDR phy enter dfi low power
update feature:
661655f41 plat: px30-s: Avoid DDR phy e

rk3326: bl31: update version to v1.25

Build from ATF commit:
661655f41 plat: px30-s: Avoid DDR phy enter dfi low power
update feature:
661655f41 plat: px30-s: Avoid DDR phy enter dfi low power
35395b77a plat: px30-s: Get params of ssmod from dtsi to support dpll ssmod
898a221ec plat: px30s: Support LPDDR2
3f01db333 plat: px30-s: Prefetch DDR_STDBY_BASE and PMU_BASE before ddr freq change
bd02b56fd plat: px30s: ddr: fix tdqs2dq calculate err
942c5527a plat: px30s: ddr: set sr idle en/dis in ddr_set_auto_self_refresh()
6ff7126b5 plat: px30s: ddr: modify to timeout waiting dqs gate train done
0646dc72c plat: px30s: pmu: fix upctl save and recovery err
a1fd805fb plat: px30: pmu: disable ddr clk gate before suspend
d1670dca4 plat: px30s: ddr: modify dqs training default point
47fe4a754 plat: px30s: ddr: enable gate phy training logic clk
59ad9f9b0 plat: px30: sleep: use pmu_debug_sout function
898fdcd8a rockchip: only use plat_uart_base to initialize console
6e2576df1 plat: px30s: sleep: do pvtplls_suspend/pvtplls_resume

Change-Id: I46e198a4b474266210a651534d3e9ef8ceebb0de
Signed-off-by: Liang Chen <cl@rock-chips.com>

show more ...

px30: bl31: update version to v1.25

Build from ATF commit:
661655f41 plat: px30-s: Avoid DDR phy enter dfi low power
update feature:
661655f41 plat: px30-s: Avoid DDR phy enter dfi low pow

px30: bl31: update version to v1.25

Build from ATF commit:
661655f41 plat: px30-s: Avoid DDR phy enter dfi low power
update feature:
661655f41 plat: px30-s: Avoid DDR phy enter dfi low power
35395b77a plat: px30-s: Get params of ssmod from dtsi to support dpll ssmod
898a221ec plat: px30s: Support LPDDR2
3f01db333 plat: px30-s: Prefetch DDR_STDBY_BASE and PMU_BASE before ddr freq change
bd02b56fd plat: px30s: ddr: fix tdqs2dq calculate err
942c5527a plat: px30s: ddr: set sr idle en/dis in ddr_set_auto_self_refresh()
6ff7126b5 plat: px30s: ddr: modify to timeout waiting dqs gate train done
0646dc72c plat: px30s: pmu: fix upctl save and recovery err
a1fd805fb plat: px30: pmu: disable ddr clk gate before suspend
d1670dca4 plat: px30s: ddr: modify dqs training default point
47fe4a754 plat: px30s: ddr: enable gate phy training logic clk
59ad9f9b0 plat: px30: sleep: use pmu_debug_sout function
898fdcd8a rockchip: only use plat_uart_base to initialize console
6e2576df1 plat: px30s: sleep: do pvtplls_suspend/pvtplls_resume

Change-Id: I9bcabb3ac709a63f78d0a24510296fa9d7aa9d9f
Signed-off-by: Liang Chen <cl@rock-chips.com>

show more ...

rk3588: ddr: update ddr bin to v1.04

build from:
74cb20d2b7 rk3588: ddr: update ddr bin to v1.04

build command:
./make.sh rk3588

update feature:
9ff0a6b00f rk3588: ddr: phy preset asse

rk3588: ddr: update ddr bin to v1.04

build from:
74cb20d2b7 rk3588: ddr: update ddr bin to v1.04

build command:
./make.sh rk3588

update feature:
9ff0a6b00f rk3588: ddr: phy preset assert time add to 10us
5b8bbbb17c rk3588: ddr: ddr useful address 1MB align for kernel
c573e8eee3 rk3588: ddr: set EN_LOW_POWER(0) to disable dfi lp cfg
39846fffa8 rk3588: ddr: enable change frequency for LPDDR4
363a13da91 rk3588: ddr: fix the code about test for DFS/SUSPEND/REBOOT
65dd9468d2 rk3588: ddr: set DFILPCFG0.dfi_lp_en_data to 0
574deae90a rk3588: ddr: add memset for sdram_params_fsp in ddr_set_rate
4872d02a4e rk3588: ddr: enable PHY VTC at any frequency

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: Id4854bed49b79eae8947952f46892b8d10ef0f0c

show more ...

rk3588: ddr: update ddr bin to v1.03

build from:
6a7f50d6c5 rk3588: ddr: update ddr bin to v1.03

build command:
./make.sh rk3588

update feature:
7bdd3127ef rk3588: ddr: adjust pclk resule seque

rk3588: ddr: update ddr bin to v1.03

build from:
6a7f50d6c5 rk3588: ddr: update ddr bin to v1.03

build command:
./make.sh rk3588

update feature:
7bdd3127ef rk3588: ddr: adjust pclk resule sequence
9cef1a577c rk3588: ddr: support x8 mode dram
504fda6227 rk3588: ddr: increase CKE related timing
192e14724c rk3588: ddr: 512B stride and "D" map between "B" and "R"

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Iaea10ba22f0d643f76d36ffc1bd22630aab9f8de

show more ...

rk3588: bl31: update version to v1.12

Build from ATF commit:
f8de35126 plat: rk3588: sleep: do pvtplls_suspend/pvtplls_resume
update feature:
f8de35126 plat: rk3588: sleep: do pvtplls_suspen

rk3588: bl31: update version to v1.12

Build from ATF commit:
f8de35126 plat: rk3588: sleep: do pvtplls_suspend/pvtplls_resume
update feature:
f8de35126 plat: rk3588: sleep: do pvtplls_suspend/pvtplls_resume
83d5ed164 plat: rk3588: sleep: restore some pmugrf registers
7df9da22d plat: rockchip: rk3588: Don't change dsu, gpu and npu rate when suspend
8c6980eee plat: rockchip: rk3588: Add support change length for cpub
17b064e8e plat: rk3588: change to normal pll for cpul and dsu before reset
e77134726 plat: rockchip: rk3588: Change length for cpub 1416MHz
7f3e9680f plat: rockchip: rk3588: Make cpub 400MHz and 600MHz come from gpll
1f4fba30f plat: rockchip: rk3588: dmc: support ddr frequency scan after dmc resume
52f2c3453 plat: rk3588: pull up sleep pin 3~6 by hardware
b5cea4f47 plat: rk3588: sleep: slow down bcore0/1's pclk before retore dsu registers
ad1c15595 plat: rk3588: pull up sleep 3~6 in suspend
bd5d03195 plat: rk3588: support suspend mode config
01aa6c724 plat: rk3588: change pmu1 suspend magic

Change-Id: Ideb33a3e29ff3e36adb6d9e928eaa8afdc823d2e
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

show more ...

rkpx30s: loader: Update to v1.35

from commit:
rk_boot_all: c8f9c9884801: rockchip: px30s: set the emmc drive strength

update feature:
- set the emmc data(GPIO1A0-A7) drive strength to 14.2ma

rkpx30s: loader: Update to v1.35

from commit:
rk_boot_all: c8f9c9884801: rockchip: px30s: set the emmc drive strength

update feature:
- set the emmc data(GPIO1A0-A7) drive strength to 14.2ma
- set the emmc clock(GPIO1B1) drive strength to 23.7ma
- set the emmc cmd(GPIO1B2) drive strength to 14.2ma

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I476fa0b93b6abf801ac837b67ff1a0dbd7ddeeaa

show more ...

rk3308: loader: Update to v1.35

from commit:
rk_boot_all: a9c0f paltform: rk3326: Update to v1.35
update feature:
Support GD9F4GxF2A device

Change-Id: Ib0923ac0917e2cca63eef85acc2731ca9887cd88
Si

rk3308: loader: Update to v1.35

from commit:
rk_boot_all: a9c0f paltform: rk3326: Update to v1.35
update feature:
Support GD9F4GxF2A device

Change-Id: Ib0923ac0917e2cca63eef85acc2731ca9887cd88
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

show more ...

rv1126: tee: update version to v2.04

Build from OPTEE commit in develop-next branch:
3f0f0b0528 pta: support check oem otp key is written
Update features:
3f0f0b0528 pta: support check oem o

rv1126: tee: update version to v2.04

Build from OPTEE commit in develop-next branch:
3f0f0b0528 pta: support check oem otp key is written
Update features:
3f0f0b0528 pta: support check oem otp key is written
9af9076b0b rockchip: sys_ctrl: move sys ctrl code to common/ dir
b3f212d172 drivers: rockchip: hal_crypto: add pd crypto enable for rv1126

Signed-off-by: xb.wang <xb.wang@rock-chips.com>
Change-Id: If055254b1f90393600afe56178b0fdd2944f4690

show more ...

rk3568: bl32: update version to v2.04

Build from OPTEE commit in develop-next branch:
3f0f0b052 pta: support check oem otp key is written
Update features:
3f0f0b052 pta: support check oem ot

rk3568: bl32: update version to v2.04

Build from OPTEE commit in develop-next branch:
3f0f0b052 pta: support check oem otp key is written
Update features:
3f0f0b052 pta: support check oem otp key is written
1c3940902 drivers: rockchip: keylad: enable dst ip clk when copy key
9af9076b0 rockchip: sys_ctrl: move sys ctrl code to common/ dir
4afa4e8c1 pta: modify secure boot enable flag length for rk3568
48b7c13e2 pta: uboot_storedata_otp: modify parameter check

Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: Ibebe59e45e26d96b64773e32c7cab14d77eb9bfa

show more ...

rk3588: bl32: update version to v1.06

Build from OPTEE commit in develop-next branch:
3f0f0b052 pta: support check oem otp key is written
Update features:
3f0f0b052 pta: support check oem ot

rk3588: bl32: update version to v1.06

Build from OPTEE commit in develop-next branch:
3f0f0b052 pta: support check oem otp key is written
Update features:
3f0f0b052 pta: support check oem otp key is written
1c3940902 drivers: rockchip: keylad: enable dst ip clk when copy key
16d1058cf drivers: crypto: use system control interface on rk3588
6f2a478ad rk3588: otp: use system control interface
946794c64 drivers: rockchip: keylad: use system control interface on rk3588
464a252af drivers: rockchip: trng: use system control interface on rk3588
9af9076b0 rockchip: sys_ctrl: move sys ctrl code to common/ dir
48b7c13e2 pta: uboot_storedata_otp: modify parameter check

Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I9c8d363f266146949d130aa08e8a4b907e897ebe

show more ...

rv1126: tee: update version to v2.03

Build from OPTEE commit in develop-next branch:
b3f212d172 drivers: rockchip: hal_crypto: add pd crypto enable for rv1126
Update features:
b3f212d172 dri

rv1126: tee: update version to v2.03

Build from OPTEE commit in develop-next branch:
b3f212d172 drivers: rockchip: hal_crypto: add pd crypto enable for rv1126
Update features:
b3f212d172 drivers: rockchip: hal_crypto: add pd crypto enable for rv1126
3ef0e4f485 rv1126: otp: not allow 24-byte key

Signed-off-by: xb.wang <xb.wang@rock-chips.com>
Change-Id: I8a839eba526909950bbb134d7f43542b0f93ea6f

show more ...

rk3588: bl31: update version to v1.11

Build from ATF commit:
5ccac0570 plat: rk3588: enable tsadc_shut_m0 function
update feature:
5ccac0570 plat: rk3588: enable tsadc_shut_m0 function
d

rk3588: bl31: update version to v1.11

Build from ATF commit:
5ccac0570 plat: rk3588: enable tsadc_shut_m0 function
update feature:
5ccac0570 plat: rk3588: enable tsadc_shut_m0 function
d70411b25 plat: rk3588: adjust ddr-related ip's secure configuration
69311b85c plat: rockchip: rk3588: dmc: add CONFIG_DRAM_ADDRMAP_GET

Change-Id: I9f4b9980cc682afca8cdf5d3b5eb1b9b9154b88e
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

show more ...

rk3566: ddr: update ddr bin to v1.12

build from:
f9b44b84d4 rk356x: ddr: update ddr bin to v1.12

build command:
./make.sh rk3568

update feature:
0a7c20ada5 rk356x: ddr: do not set prog otp mask

rk3566: ddr: update ddr bin to v1.12

build from:
f9b44b84d4 rk356x: ddr: update ddr bin to v1.12

build command:
./make.sh rk3568

update feature:
0a7c20ada5 rk356x: ddr: do not set prog otp mask lock

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I3cbc2b6dd500770c8ff5eab8c9e428fe0d7778aa

show more ...

rk3568: ddr: update ddr bin to v1.12

build from:
f9b44b84d4 rk356x: ddr: update ddr bin to v1.12

build command:
./make.sh rk3568

update feature:
0a7c20ada5 rk356x: ddr: do not set prog otp mask

rk3568: ddr: update ddr bin to v1.12

build from:
f9b44b84d4 rk356x: ddr: update ddr bin to v1.12

build command:
./make.sh rk3568

update feature:
0a7c20ada5 rk356x: ddr: do not set prog otp mask lock

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I8208b93cf23b05ea13f1c03f268e73e586f9de1d

show more ...

rk3588: spl: update version to v1.06

build from:
6bd5597: rockchip: rk3588: restore gpio4_d0~d5 iomux

build command:
./make.sh rk3588

update features:
1.support switch the sd and uart_m1 iomux

rk3588: spl: update version to v1.06

build from:
6bd5597: rockchip: rk3588: restore gpio4_d0~d5 iomux

build command:
./make.sh rk3588

update features:
1.support switch the sd and uart_m1 iomux by software
2.disable hdptxphy by default
3.set the usb2 phy1/2/3 in iddq mode

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I2f4cb2efada5a9343ea6ff4d65f169c3f531f1e3

show more ...

rk3588: bl31: update version to v1.10

Build from ATF commit:
a91da4072 plat: rk3588: don't check cpu wfe/wfi status in nonboot_cpus_off_check
update features:
a91da4072 plat: rk3588: don't c

rk3588: bl31: update version to v1.10

Build from ATF commit:
a91da4072 plat: rk3588: don't check cpu wfe/wfi status in nonboot_cpus_off_check
update features:
a91da4072 plat: rk3588: don't check cpu wfe/wfi status in nonboot_cpus_off_check
4212c266b plat: rk3588: use external 32k clock by default
fb149d4cb plat: rockchip: rk3588: scmi: Make dsu clk come from lpll
c73f5cbd4 plat: rockchip: rk3588: scmi: set pclk dsu clk rate to 200MHz
a24e55c55 plat: rk3588: enable hptimer calibrate with 32k clock

Change-Id: I7594aeb76317f60a9c0d1b3642654e436f3a03f4
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

show more ...

rk3588: bl32: update version to v1.05

Build from OPTEE commit in develop-next branch:
48b7c13e2 pta: uboot_storedata_otp: modify parameter check
Update features:
48b7c13e2 pta: uboot_storeda

rk3588: bl32: update version to v1.05

Build from OPTEE commit in develop-next branch:
48b7c13e2 pta: uboot_storedata_otp: modify parameter check
Update features:
48b7c13e2 pta: uboot_storedata_otp: modify parameter check
65daed964 pta: crypto_service: support oem otp key phys cipher

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I40745b08d27249698315e2929dbfe870390b95cb

show more ...

rk3568: bl32: update version to v2.03

Build from OPTEE commit in develop-next branch:
48b7c13e2 pta: uboot_storedata_otp: modify parameter check
Update features:
48b7c13e2 pta: uboot_storeda

rk3568: bl32: update version to v2.03

Build from OPTEE commit in develop-next branch:
48b7c13e2 pta: uboot_storedata_otp: modify parameter check
Update features:
48b7c13e2 pta: uboot_storedata_otp: modify parameter check

Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I556ecff6a2fc4c3548abce87a9060f58a55a18c4

show more ...