| d381032a | 01-Mar-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
rk3326s: arch32 miniloader: Update to v1.36
from commit: rk_boot_all: c7de69a673: rk3326s: add usb phy tuning
update feature: support rk3326s.
Signed-off-by: Yifeng Zhao <yifeng.zhao@ro
rk3326s: arch32 miniloader: Update to v1.36
from commit: rk_boot_all: c7de69a673: rk3326s: add usb phy tuning
update feature: support rk3326s.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Change-Id: Icc5fd6153df1f18d02a58b6f0862fb2c2b457918 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| 8aa0ba94 | 04-Mar-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
rk3326s: usbplug: Update to v1.36
from commit: rk_boot_all: c7de69a673: rk3326s: add usb phy tuning
update feature: add usb phy tuning
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.c
rk3326s: usbplug: Update to v1.36
from commit: rk_boot_all: c7de69a673: rk3326s: add usb phy tuning
update feature: add usb phy tuning
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Change-Id: Ice62ec584231c115c08f98aa4bbd800228824386
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| 61923c83 | 18-Feb-2022 |
Zhihuan He <huan.he@rock-chips.com> |
rk3326: bl31: update version to v1.27
Build from ATF commit: 96550638e plat: px30-s: dram: phy io ctrl save and resume Update feature: 96550638e plat: px30-s: dram: phy io ctrl save and resume 16
rk3326: bl31: update version to v1.27
Build from ATF commit: 96550638e plat: px30-s: dram: phy io ctrl save and resume Update feature: 96550638e plat: px30-s: dram: phy io ctrl save and resume 16b51a9f9 plat: px30-s: dram: fix ck/ckb to low before deepsleep 90c6c51f7 plat: rockchip: rk3588: Set gpll source clock div to 0 c5157a42e plat: px30-s: Restore DDR PHY dfi low power function 0de2c3db8 plat: px30: sleep: enter ddr sref by software 16fda9dd6 plat: px30s: suspend: add ddr resume support 91188bd6f plat: px30: suspend: support ddr resume
Signed-off-by: Zhihuan He <huan.he@rock-chips.com> Change-Id: I5cc4bf115cc194a6c6c21ea452031d0898fe1b97
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| 9940cf2a | 17-Feb-2022 |
Zhihuan He <huan.he@rock-chips.com> |
px30: bl31: update version to v1.27
Build from ATF commit: 96550638e plat: px30-s: dram: phy io ctrl save and resume Update feature: 96550638e plat: px30-s: dram: phy io ctrl save and resume 61fb
px30: bl31: update version to v1.27
Build from ATF commit: 96550638e plat: px30-s: dram: phy io ctrl save and resume Update feature: 96550638e plat: px30-s: dram: phy io ctrl save and resume 61fb26d65 plat: px30-s: dram: fix ck/ckb to low before deepsleep 90c6c51f7 plat: rockchip: rk3588: Set gpll source clock div to 0 c5157a42e plat: px30-s: Restore DDR PHY dfi low power function 0de2c3db8 plat: px30: sleep: enter ddr sref by software 16fda9dd6 plat: px30s: suspend: add ddr resume support 91188bd6f plat: px30: suspend: support ddr resume
Signed-off-by: Zhihuan He <huan.he@rock-chips.com> Change-Id: I42b2ac01c74ad3f17a7e300fcb214993c82fe057
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| f74d206a | 17-Feb-2022 |
Zhihuan He <huan.he@rock-chips.com> |
rk3326/px30: ddr: Update ddr bin to V2.05 20220224
build in: c9fe371 rk3326/rk3326-s: updata version DDR V2.05 20220224 update feature: df8be4e rk3326/rk3326-s: enable phy low power 484561e rk332
rk3326/px30: ddr: Update ddr bin to V2.05 20220224
build in: c9fe371 rk3326/rk3326-s: updata version DDR V2.05 20220224 update feature: df8be4e rk3326/rk3326-s: enable phy low power 484561e rk3326-s: remove auto sr pd 4db5474 rk3326-s: revert phy low power d8ad791 rk3326-s: phy: Change REG0x80 to adjust phase of CKE of LPDDR3/DDR3/LPDDR2
Signed-off-by: Zhihuan He <huan.he@rock-chips.com> Change-Id: I5bfa4295cdae26545df259bfb89956c021b5c32b
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| 37cca242 | 03-Nov-2021 |
XiaoDong Huang <derrick.huang@rock-chips.com> |
rv1126: tee: update version to v1.06
Build from OPTEE commit: c1514b9e rockchip: rv1126: fastboot: update mmu map table update feature: c1514b9e rockchip: rv1126: fastboot: update mmu map ta
rv1126: tee: update version to v1.06
Build from OPTEE commit: c1514b9e rockchip: rv1126: fastboot: update mmu map table update feature: c1514b9e rockchip: rv1126: fastboot: update mmu map table 3ff3b774 rv1126: fix build error without ta bea79573 700bd12a 40f5fcb2 pta: uboot_storedata: check the value of size when read head cef03957 otp_support: add func to get ta encryption key 994a45d4 BACKPORT: core: add framework to load REE-FS encrypted TAs 1276ad6e pta: add support for write TA encryption key 2f186b1c core: supply hash length for salt length in rockchip and oem verify c8e0eeb3 core: arm: support Thumb entry point 416c89b5 rockchip: sip: add share mem page type define 61053b11 rv1126: monitor: don't panic if cpu_feature err b500cf9c rv1126: monitor: motify some debug code a53a7d99 rv1126: only register fiq_cpu_stop_handler one time cab1372b plat-rockchip: only register fiq_debugger_irq_handler one time 9c3b5fd9 plat-rockchip: map TEE_PLAT_SHMEM as MEM_AREA_RAM_NSEC 8cd72983 rv1126: fix macro RG_MAP_SECURE ef89b5c2 rockchip: fix err of parsing ddr_parameter 2c6573a7 rockchip: rv1126: fix error of parenthesis matching in sgrf_init 1e75c939 plat-rockchip: fiq-debugger: adjust the usage of fiq_debugger.tgt_cpu 9f935616 pta: unnecessary to free share memory when close session 7fcbc47e plat-rockchip: fix CFG_RK_STATIC_MEM_PARAM define err d9140b1b rv1126: conf.mk: use atags to pass parameter 715df903 plat-rockchip: conf.mk: enable CFG_RK_RPMB_NO_DIRF_HASH 59d68db8 rv1126: modify otp size for oem 10ff881f scripts: modify supported platforms ee120571 rv1126: conf.mk: enable CFG_VENDOR_PROPS e4d16707 plat-rockchip: vendor_props: add needed head files 5da82304 rv1126: support get seed for vendor props 1e6e6afa rv1126: pta: support write toybrick seed 36e572e8 rv1126: pta: support R&W attribute hash and vbootkey hash 867c532c plat-rockchip: rv1126: dmc: add support lp4x 8fc0f55b plat-rockchip: rv1126: dmc: fix MR14 setting err for lp4 4a1a9c4d plat-rockchip: common: dram: add LP4x support 23f06a39 rockchip: rv1126: don't close usb powerdomain when suspend 36d1043e plat-rockchip: rv1126: dmc: remove dsmpd when pll setting 44c0c0f1 rockchip: rv1126: support suspend from uboot 6ae5d629 380b79bf e3cdf903 rv1126: otp: oem ns-otp prog mask value rely on ns-otp[504-511] d4636cc1 rv1126: pta: add support for R&W oem OTP
Change-Id: Ie6156f1cc81fc3cea0efe17e7e9dfcecf262b061 Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
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| bd08138c | 24-Feb-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
rk3588: loader: add dram boot via usb
Build from rk_boot_all commit: c7de69a67: rk3326s: add usb phy tuning
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Change-Id: If7ca4dd183f659d749c4
rk3588: loader: add dram boot via usb
Build from rk_boot_all commit: c7de69a67: rk3326s: add usb phy tuning
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Change-Id: If7ca4dd183f659d749c4d2a142cc6179e0d7a29a
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| 85def61d | 24-Feb-2022 |
Joseph Chen <chenjh@rock-chips.com> |
rk3588: bl31: update version to v1.16
Build from ATF commit: bc02fdb23 plat: rk3588: support booting from the cpu according to atags.
Update feature: bc02fdb23 plat: rk3588: support booting from
rk3588: bl31: update version to v1.16
Build from ATF commit: bc02fdb23 plat: rk3588: support booting from the cpu according to atags.
Update feature: bc02fdb23 plat: rk3588: support booting from the cpu according to atags. 3f58c537b rockchip: common: Add boot1 param for atags a8b89552b plat: rockchip: rk3588: dmc: ddr_m0: fix the mistake about idle_ddrsch
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I98cebd043832600634aa37fcb55eedccd78256ff
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| c31d840e | 24-Feb-2022 |
Joseph Chen <chenjh@rock-chips.com> |
rk3588: spl: update version to v1.10
build from: bdb740d4da rockchip: board: update with new envf support
build command: ./make.sh rk3588
update feature: clk: rockchip: rk3588: set b0pll b1pll
rk3588: spl: update version to v1.10
build from: bdb740d4da rockchip: board: update with new envf support
build command: ./make.sh rk3588
update feature: clk: rockchip: rk3588: set b0pll b1pll to 1200M in SPL
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: Iafdd118cb70d363d636803c06b25f90140a1d290
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| 08cf703c | 18-Feb-2022 |
XiaoDong Huang <derrick.huang@rock-chips.com> |
rk3588: bl31: update version to v1.15
Build from ATF commit: bf23f4632 plat: rk3588: support virtual poweroff update feature: bf23f4632 plat: rk3588: support virtual poweroff 698f83a30 r
rk3588: bl31: update version to v1.15
Build from ATF commit: bf23f4632 plat: rk3588: support virtual poweroff update feature: bf23f4632 plat: rk3588: support virtual poweroff 698f83a30 rockchip: gicv3: add plat_rockchip_gic_its_quiescent function 67c9cdc3e lib: psci: Add weak psci_plat_system_suspend_prepare() 3bbb47b4e rockchip: amp: support booting rtos by linux. 29d00ad58 rockchip: gicv3: support getting routing cpu.
Change-Id: I75160138ab47a95362766977e993f8d5f4862c7b Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
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| a4c6de9e | 18-Feb-2022 |
Tang Yun ping <typ@rock-chips.com> |
rk3566: ddr: update ddr bin to v1.13
build from: 9085cce252 rk356x: ddr: update ddr bin to v1.13 build command: ./make.sh rk3568 update feature: update RX Vref(ODT OFF) to improving
rk3566: ddr: update ddr bin to v1.13
build from: 9085cce252 rk356x: ddr: update ddr bin to v1.13 build command: ./make.sh rk3568 update feature: update RX Vref(ODT OFF) to improving the stability of LPDDR4X
Signed-off-by: Tang Yun ping <typ@rock-chips.com> Change-Id: I568ba38365122b5825c5dd794d1a675a34698c4c
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| ddf03c1d | 18-Feb-2022 |
Tang Yun ping <typ@rock-chips.com> |
rk3568: ddr: update ddr bin to v1.13
build from: 9085cce252 rk356x: ddr: update ddr bin to v1.13 build command: ./make.sh rk3568 update feature: update RX Vref(ODT OFF) to improving the stability
rk3568: ddr: update ddr bin to v1.13
build from: 9085cce252 rk356x: ddr: update ddr bin to v1.13 build command: ./make.sh rk3568 update feature: update RX Vref(ODT OFF) to improving the stability of LPDDR4X
Signed-off-by: Tang Yun ping <typ@rock-chips.com> Change-Id: Ic5cb378699b4dc105f274dbe72092bce3737b925
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| 33980154 | 07-Jan-2022 |
Tang Yun ping <typ@rock-chips.com> |
rk3566: ddr: update ultra ddr bin to v1.10
build from: 0678ac8dc3 rk356x: ddr: update ultra ddr bin to v1.10 build command: ./make.sh rk3568 update feature: 4f9fb25b68 rk356x: ddr: fix ult
rk3566: ddr: update ultra ddr bin to v1.10
build from: 0678ac8dc3 rk356x: ddr: update ultra ddr bin to v1.10 build command: ./make.sh rk3568 update feature: 4f9fb25b68 rk356x: ddr: fix ultra GPIO resume timing update RX Vref(ODT OFF) to improving the stability of LPDDR4X
Signed-off-by: Tang Yun ping <typ@rock-chips.com> Change-Id: I972508ee09681271b31b720d49610c86680e3f94
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| d7ff10ec | 23-Feb-2022 |
YouMin Chen <cym@rock-chips.com> |
rk3588: ddr: update ddr bin to v1.06
build from: 4887ade632 rk3588: ddr: update ddr bin to v1.06 build command: ./make.sh rk3588
update feature: dec26d0db2 common: add note for boot1 param
rk3588: ddr: update ddr bin to v1.06
build from: 4887ade632 rk3588: ddr: update ddr bin to v1.06 build command: ./make.sh rk3588
update feature: dec26d0db2 common: add note for boot1 param 3b95eb054b rk3588: ddr: add boot1 param support c8755e4787 rockchip: atags: Add boot1 param 75887aad1c rk3588: ddr: update ddr bin to v1.06 dce9cc5d22 rk3588: ddr: reset vd_ddr when access ddr fail 24d3565b6b rk3588: ddr: disable VCT when detect cap below 533MHz 1255c4270e rk3588: ddr: update lpddr4x rx vref(odt off) to 40% 68383b2594 rk3588: ddr: enable low power, per bank refresh and derate daddb9cf65 rk3588: ddr: change bring up frequency from 324MHz to 528MHz 5b81b668f5 rk3588: ddr: fix mistake about save mdll_lock_value 4bffef90ee rk3588: ddr: add pctl_modify_trfc
Signed-off-by: YouMin Chen <cym@rock-chips.com> Change-Id: Ic1f503517f4c38f9aaef4f2365ff5d53e20d1b15
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| 56babce7 | 15-Feb-2022 |
Jason Zhu <jason.zhu@rock-chips.com> |
rk3588: spl: update version to v1.09
build from: 059758c: configs: rk3588: resync with make savedefconfig
build command: ./make.sh rk3588
update features: 1.save gpio4_d0~d5 iomux config
Signe
rk3588: spl: update version to v1.09
build from: 059758c: configs: rk3588: resync with make savedefconfig
build command: ./make.sh rk3588
update features: 1.save gpio4_d0~d5 iomux config
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com> Change-Id: I1d5e550637a29c8a33d40f2bf4cd7d2af72e004e
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| 42eea816 | 15-Feb-2022 |
xb.wang <xb.wang@rock-chips.com> |
rv1126: tee: update version to v2.05
Build from OPTEE commit in develop-next branch: d40f7e8a89 drivers: crypto: clk: rv1126: fix the clock enablement logic Update features: d40f7e8a89 drive
rv1126: tee: update version to v2.05
Build from OPTEE commit in develop-next branch: d40f7e8a89 drivers: crypto: clk: rv1126: fix the clock enablement logic Update features: d40f7e8a89 drivers: crypto: clk: rv1126: fix the clock enablement logic 3167e37331 drivers: rockchip: hal_crypto: mask lockstep interrupt 3f0f0b0528 pta: support check oem otp key is written
Signed-off-by: xb.wang <xb.wang@rock-chips.com> Change-Id: Iccb540999d5957243e6eeb439424666544d1769f
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| 86e9bb76 | 14-Feb-2022 |
Lin Jinhan <troy.lin@rock-chips.com> |
rk3568: bl32: update version to v2.07
Build from OPTEE commit in develop-next branch: 3167e3733 drivers: rockchip: hal_crypto: mask lockstep interrupt Update features: 3167e3733 drivers: r
rk3568: bl32: update version to v2.07
Build from OPTEE commit in develop-next branch: 3167e3733 drivers: rockchip: hal_crypto: mask lockstep interrupt Update features: 3167e3733 drivers: rockchip: hal_crypto: mask lockstep interrupt 01427344d rk3568: support R&W oem ns otp
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com> Change-Id: I5eebfd3ba3833aab2ae216427683fdef175b20fa
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| 780616b2 | 25-Jan-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
rk3326s: usbplug: Update to v1.36
from commit: rk_boot_all: c7de69a673: rk3326s: add usb phy tuning
update feature: Add usb phy tuning for rk3326s.
Signed-off-by: Yifeng Zhao <yif
rk3326s: usbplug: Update to v1.36
from commit: rk_boot_all: c7de69a673: rk3326s: add usb phy tuning
update feature: Add usb phy tuning for rk3326s.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Change-Id: I3ef7c353c8ff75cb192a65ff49499747b16e59d7
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| 10f67f42 | 27-Jan-2022 |
Jason Zhu <jason.zhu@rock-chips.com> |
rk3588: spl: update version to v1.08
build from: 5035821: power: bq25700: fix pd can't charge
build command: ./make.sh rk3588
update features: 1.set emmc io drive strength
Signed-off-by: Jason
rk3588: spl: update version to v1.08
build from: 5035821: power: bq25700: fix pd can't charge
build command: ./make.sh rk3588
update features: 1.set emmc io drive strength
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com> Change-Id: Ieb22c3bccb8d4254dc4dedde2f583178f59d03b7
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| 23ca5627 | 26-Jan-2022 |
Hisping Lin <hisping.lin@rock-chips.com> |
rk3588: bl32: update version to v1.07
Build from OPTEE commit in develop-next branch: 9d22c1e96 rk3588: support R&W oem ns otp Update features: 9d22c1e96 rk3588: support R&W oem ns otp 3
rk3588: bl32: update version to v1.07
Build from OPTEE commit in develop-next branch: 9d22c1e96 rk3588: support R&W oem ns otp Update features: 9d22c1e96 rk3588: support R&W oem ns otp 3f0f0b052 pta: support check oem otp key is written
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com> Change-Id: I7fb445fb1202e32ddbbc37cde78ccac79b5e8c32
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| 01c979f7 | 26-Jan-2022 |
Hisping Lin <hisping.lin@rock-chips.com> |
rk3568: bl32: update version to v2.06
Build from OPTEE commit in develop-next branch: 01427344d rk3568: support R&W oem ns otp Update features: 01427344d rk3568: support R&W oem ns otp 6
rk3568: bl32: update version to v2.06
Build from OPTEE commit in develop-next branch: 01427344d rk3568: support R&W oem ns otp Update features: 01427344d rk3568: support R&W oem ns otp 631d7ed9a pta: modify secure boot enable flag for rk3568
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com> Change-Id: I191b2a601143eaec45a686ff757ba860a2f56727
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| aede8bdb | 25-Jan-2022 |
XiaoDong Huang <derrick.huang@rock-chips.com> |
rk3588: bl31: update version to v1.14
Build from ATF commit: 5cc525277 plat: rockchip: rk3588: dmc: set pclk_center_root_sel to 100MHz update feature: 5cc525277 plat: rockchip: rk3588: dmc:
rk3588: bl31: update version to v1.14
Build from ATF commit: 5cc525277 plat: rockchip: rk3588: dmc: set pclk_center_root_sel to 100MHz update feature: 5cc525277 plat: rockchip: rk3588: dmc: set pclk_center_root_sel to 100MHz 7a36b2800 plat: rk3588: reset: don't check pmu1grf_os_reg0 990ded4ee plat: rk3588: sleep: clear some pmu register in resume ac8148b75 plat: rk3588: change macro SLP_ARMOFF_PMUOFF/SLP_FROM_UBOOT 620cebc9f plat: rk3588: disable tsadc_shut_m0 if reboot_cmd=BOOT_BROM_DOWNLOAD 898fdcd8a rockchip: only use plat_uart_base to initialize console
Change-Id: Iaf81ade15a16c76d9626e30f920a003dcbff1a92 Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
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| 83bab16f | 21-Jan-2022 |
Wesley Yao <wesley.yao@rock-chips.com> |
rk3326/px30: ddr: Update ddr bin to V2.04 20220121
build from RK3326_DDR_Init_Simple: c8ac34ce rk3326/rk3326-s: Update DDR bin to V2.04 20220121
update feature: 255e5ca0 rk3326/rk3326-s: Set dfi_
rk3326/px30: ddr: Update ddr bin to V2.04 20220121
build from RK3326_DDR_Init_Simple: c8ac34ce rk3326/rk3326-s: Update DDR bin to V2.04 20220121
update feature: 255e5ca0 rk3326/rk3326-s: Set dfi_lp_wakeup_sr/pd to 0x0
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com> Change-Id: I267bf5c6c1389695112b665371d57fccadb9a5d4
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| 0aa03df2 | 21-Jan-2022 |
Wesley Yao <wesley.yao@rock-chips.com> |
rk3326/px30: ddr: Update ddr bin to V2.03 20220121
build from RK3326_DDR_Init_Simple: 980d865192 rk3326/rk3326-s: Update DDR bin to V2.03 20220121 update feature: da0ff2abaa rk3326-s: Set ca_odt(R
rk3326/px30: ddr: Update ddr bin to V2.03 20220121
build from RK3326_DDR_Init_Simple: 980d865192 rk3326/rk3326-s: Update DDR bin to V2.03 20220121 update feature: da0ff2abaa rk3326-s: Set ca_odt(REG0x40[13:12]) of LPDDR4 according to bw
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com> Change-Id: I3b8f9bcf96841815b88e3772d7a3a808eb2435d5
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| 4d7b4c0a | 21-Jan-2022 |
Wesley Yao <wesley.yao@rock-chips.com> |
rk3326: bl31: update version to v1.26
Build from ATF commit: 12a2070163 plat: px30-s: dram: Disable LPDDR4 CA(except CK CS) ODT of CS1 Update feature: 12a2070163 plat: px30-s: dram: Disable LPDDR4
rk3326: bl31: update version to v1.26
Build from ATF commit: 12a2070163 plat: px30-s: dram: Disable LPDDR4 CA(except CK CS) ODT of CS1 Update feature: 12a2070163 plat: px30-s: dram: Disable LPDDR4 CA(except CK CS) ODT of CS1 f968b05b21 plat: px30-s: dram: Fix value of LPDDR3/LPDDR2 MR3 in cal_ds_odt()
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com> Change-Id: Ic33a19750036de0b326bf717cf1e8603a4228e30
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