History log of /rkbin/bin/ (Results 551 – 575 of 1726)
Revision Date Author Comments
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ae47a36e31-Mar-2022 Jason Zhu <jason.zhu@rock-chips.com>

rv1106: spl: update version to v1.01

build from:
f721bd0: drm/rockchip: vop: add more supported yuv bus formats

build command:
./make.sh rv1106

update features:
1.support spi nor, spi nand, sd

rv1106: spl: update version to v1.01

build from:
f721bd0: drm/rockchip: vop: add more supported yuv bus formats

build command:
./make.sh rv1106

update features:
1.support spi nor, spi nand, sd card
2.support secure otp
3.support hardware crypto

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ie4b883ebad930446dfd7ee15c38da4ca7a996971

show more ...

d1ff4a9829-Mar-2022 Sugar Zhang <sugar.zhang@rock-chips.com>

rv1106: usbplug: update v1.02

Update feature:
support download image from uart.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I23455a85b44eecea097b3c969453d70a2a45ece0

efe8622728-Mar-2022 Jon Lin <jon.lin@rock-chips.com>

rv1106: usbplug: update v1.01

from commit:
rk_boot_all: 209c77: src: spinand: Add SNAND tag for spinand PC tools
Update feature:
src: spinand: Add SNAND tag for spinand PC tools

Change-Id: Id03fc

rv1106: usbplug: update v1.01

from commit:
rk_boot_all: 209c77: src: spinand: Add SNAND tag for spinand PC tools
Update feature:
src: spinand: Add SNAND tag for spinand PC tools

Change-Id: Id03fc440a9d987c974bce0736e4494b5e0e939d5
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

show more ...

7cad292e25-Mar-2022 Wesley Yao <wesley.yao@rock-chips.com>

rv1106: ddr: Update ddr bin to v1.01 20220325 to support DDR2

Build from u-boot-ddr:
0cc2c5d0bd drivers: ram: rv1106: Initial version v1.01 20220325
(https://10.10.10.29/c/rk/u-boot-ddr/+/145841/3

rv1106: ddr: Update ddr bin to v1.01 20220325 to support DDR2

Build from u-boot-ddr:
0cc2c5d0bd drivers: ram: rv1106: Initial version v1.01 20220325
(https://10.10.10.29/c/rk/u-boot-ddr/+/145841/33)

Update feature:
0cc2c5d0bd drivers: ram: rv1106: Initial version v1.01 20220325
(https://10.10.10.29/c/rk/u-boot-ddr/+/145841/33)
1. Fix wrong calc of ddrconf, which ignore col
2. Do not init UART2 when in UART download
3. Fix wrong of memcpy of NOC
4. Fix wrong of update_dq_tx_skew/update_dq_tx_skew
5. Fix wrong of Disable PVT
6. Enable 2T of PHY_REG 0x1c
7. Return error if changing freq fail

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I4e564b8322623834d8e117efd4dc1387f66fbffa

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8904791114-Mar-2022 Zhihuan He <huan.he@rock-chips.com>

rk3326/px30: ddr: Update ddr bin to V2.06 20220317

build in:
fd145a6 rk3326/rk3326-s: updata version DDR V2.06 20220317

update feature:
8da20fb rk3326/rk3326-s: enable all phy low power mode
e62

rk3326/px30: ddr: Update ddr bin to V2.06 20220317

build in:
fd145a6 rk3326/rk3326-s: updata version DDR V2.06 20220317

update feature:
8da20fb rk3326/rk3326-s: enable all phy low power mode
e62fc14 Merge branch 'rk3326s_debug' into rk3326_base_rk3228h_V1.12

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I8c33334457a19e2413a4596d811560e456e5dc9a

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8e0bf7cd04-Mar-2022 Zhihuan He <huan.he@rock-chips.com>

px30: bl31: update version to v1.28

Build from ATF commit:
edf5c3fbb plat: px30-s:workaround LP3 can not open cs1 odt in wr train

Update feature:
edf5c3fbb plat: px30-s:workaround LP3 can not ope

px30: bl31: update version to v1.28

Build from ATF commit:
edf5c3fbb plat: px30-s:workaround LP3 can not open cs1 odt in wr train

Update feature:
edf5c3fbb plat: px30-s:workaround LP3 can not open cs1 odt in wr train
05922004b plat: px30-s: suspend: remove ddr_sr_fix_clk_phase() func
c088d3cc9 plat: px30-s: dram: remove phy dfi low power set
aa70ad066 plat: px30: don't init stimer1 if stimer1 is enabled
2877a2c9e plat: px30: support vdd_log off in suspend

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I0436f3141234820fd31f959f122b1db1cd60d746

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1d6f1f7804-Mar-2022 Zhihuan He <huan.he@rock-chips.com>

rk3326: bl31: update version to v1.28

Build from ATF commit:
edf5c3fbb plat: px30-s:workaround LP3 can not open cs1 odt in wr train

Update feature:
edf5c3fbb plat: px30-s:workaround LP3 can not o

rk3326: bl31: update version to v1.28

Build from ATF commit:
edf5c3fbb plat: px30-s:workaround LP3 can not open cs1 odt in wr train

Update feature:
edf5c3fbb plat: px30-s:workaround LP3 can not open cs1 odt in wr train
05922004b plat: px30-s: suspend: remove ddr_sr_fix_clk_phase() func
c088d3cc9 plat: px30-s: dram: remove phy dfi low power set
aa70ad066 plat: px30: don't init stimer1 if stimer1 is enabled
2877a2c9e plat: px30: support vdd_log off in suspend

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I6db79ea74891ee56c1f886eeb749c7b4ad308aad

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b4d4898421-Mar-2022 XiaoDong Huang <derrick.huang@rock-chips.com>

rk3588: bl31: update version to v1.19

Build from ATF commit:
4370827cd plat: rk3588: hdmirx: remove stop cpus operation
update feature:
4370827cd plat: rk3588: hdmirx: remove stop cpus opera

rk3588: bl31: update version to v1.19

Build from ATF commit:
4370827cd plat: rk3588: hdmirx: remove stop cpus operation
update feature:
4370827cd plat: rk3588: hdmirx: remove stop cpus operation
bd56a9a02 plat: rockchip: support config irq aff by sip call

Change-Id: Iad03b59cccca407796da68f0c63aae8a947e5c5c
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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eb76918616-Mar-2022 XiaoDong Huang <derrick.huang@rock-chips.com>

rk3588: bl31: update version to v1.18

Build from ATF commit:
6a656152a plat: rk3588: save/restore all GICR in suspend
update feature:
6a656152a plat: rk3588: save/restore all GICR in suspend

rk3588: bl31: update version to v1.18

Build from ATF commit:
6a656152a plat: rk3588: save/restore all GICR in suspend
update feature:
6a656152a plat: rk3588: save/restore all GICR in suspend
9ae9e1a3f plat: rk3588: hdmirx: Speed up stopping CPUs
0b9f28efc plat: rockchip: rk3588: Add HDMIRX_HDMI interrupt handler
b604a56ff rockchip: support stop_cpu_fast function
021f3e1d6 plat: rk3588: don't flash cache in stop cpu
93e449183 plat: rk3588: enable EHF
302a312d3 plat: rk3588: mask all irqs before entry into opteed
fc6a6b092 rockchip: plat_pm: add functions for cpu on/suspend resume
0c6866c6d plat: rk3588: support EHF and SDEI
ab808d19f plat: rockchip: support config a fiq
c0152bd35 opteed: Mask non-secure interrupts if the cpus will be off

Change-Id: I7e37c17087a783ea8ab22bb598d5b36c0eef597c
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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9ec3c16621-Mar-2022 Jason Zhu <jason.zhu@rock-chips.com>

rv1106: usbplug: update rv1106_usbplug_v1.00.bin

For bring up the EVB board.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I5e4e700efa7b8cb1d9e4159088b7b9281beefe81

04bed4c818-Mar-2022 Wesley Yao <wesley.yao@rock-chips.com>

rv1106: ddr: Init version of DDR Bin

DDR Version V1.00 20220321

Build form u-boot-ddr:
2168bdfb8f drivers: ram: rv1106: Initial version v1.00 20220321
(https://10.10.10.29/c/rk/u-boot-ddr/+/14584

rv1106: ddr: Init version of DDR Bin

DDR Version V1.00 20220321

Build form u-boot-ddr:
2168bdfb8f drivers: ram: rv1106: Initial version v1.00 20220321
(https://10.10.10.29/c/rk/u-boot-ddr/+/145841/30)

Update feature:
2168bdfb8f drivers: ram: rv1106: Initial version v1.00 20220321
(https://10.10.10.29/c/rk/u-boot-ddr/+/145841/30)

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Iefc4b8e0c28dcc337c39a06e1c859914ae076509

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e22665b817-Mar-2022 Sugar Zhang <sugar.zhang@rock-chips.com>

rv1106: update spl

Build from uboot next-dev:
commit 1e890c7070a4 ("env: envf: remove env param")

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I2d07b936680a0204f971b9336d9c83c

rv1106: update spl

Build from uboot next-dev:
commit 1e890c7070a4 ("env: envf: remove env param")

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I2d07b936680a0204f971b9336d9c83c9f9e8ffe3

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f7f1c28716-Mar-2022 Hisping Lin <hisping.lin@rock-chips.com>

rv1126: tee: update version to v2.06

Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreate

rv1126: tee: update version to v2.06

Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
b61fa300d scripts: commit_bin: intercept the first 8 characters for LAST_CM
91c4147e7 pta: crypto_service: change some return code to be accurate
d40f7e8a8 drivers: crypto: clk: rv1126: fix the clock enablement logic

Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I2ec32c7094a57f8d7913eff935e4172abeac634f

show more ...

a662826e16-Mar-2022 Hisping Lin <hisping.lin@rock-chips.com>

rk3358: bl32: update version to v2.03

Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreat

rk3358: bl32: update version to v2.03

Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
b61fa300d scripts: commit_bin: intercept the first 8 characters for LAST_CM
91c4147e7 pta: crypto_service: change some return code to be accurate
3167e3733 drivers: rockchip: hal_crypto: mask lockstep interrupt
3f0f0b052 pta: support check oem otp key is written
48b7c13e2 pta: uboot_storedata_otp: modify parameter check
65daed964 pta: crypto_service: support oem otp key phys cipher
f5add58be core: TEE_GenerateKey support RSA key e = 3

Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: Ia5c0776c1f207814a19095bfa5fda1f1f369902d

show more ...

22523e6816-Mar-2022 Hisping Lin <hisping.lin@rock-chips.com>

rk3308: bl32: update version to v2.04

Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreat

rk3308: bl32: update version to v2.04

Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
b61fa300d scripts: commit_bin: intercept the first 8 characters for LAST_CM
8e053a881 rockchip: remove duplicate definitions for toybrick seed
3f0f0b052 pta: support check oem otp key is written
9af9076b0 rockchip: sys_ctrl: move sys ctrl code to common/ dir
48b7c13e2 pta: uboot_storedata_otp: modify parameter check
65daed964 pta: crypto_service: support oem otp key phys cipher
60973cf4d drivers: crypto: hal: add crypto calc with phys addr
f5add58be core: TEE_GenerateKey support RSA key e = 3
af506d32e ta verify: close default key for sign ta
b05135511 pta: rk_os_service: support R&W oem hardware read otp
50cc53fd1 pta: support R&W oem non-secure otp

Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I738d31d3b329a0f6259d2546856d0599fd1e8089

show more ...

b197e64116-Mar-2022 Hisping Lin <hisping.lin@rock-chips.com>

px30: bl32: update version to v2.12

Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreate

px30: bl32: update version to v2.12

Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
b61fa300d scripts: commit_bin: intercept the first 8 characters for LAST_CM
8e053a881 rockchip: remove duplicate definitions for toybrick seed
91c4147e7 pta: crypto_service: change some return code to be accurate
3167e3733 drivers: rockchip: hal_crypto: mask lockstep interrupt
3f0f0b052 pta: support check oem otp key is written
9af9076b0 rockchip: sys_ctrl: move sys ctrl code to common/ dir
48b7c13e2 pta: uboot_storedata_otp: modify parameter check
65daed964 pta: crypto_service: support oem otp key phys cipher
7a0581630 scripts: commit_bin: support more platforms
f5add58be core: TEE_GenerateKey support RSA key e = 3

Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: Icafc92b96494b0005a9663578b240b817c5a2bac

show more ...

158a27fe16-Mar-2022 Hisping Lin <hisping.lin@rock-chips.com>

rk3326: bl32: update version to v2.12

Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreat

rk3326: bl32: update version to v2.12

Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
b61fa300d scripts: commit_bin: intercept the first 8 characters for LAST_CM
8e053a881 rockchip: remove duplicate definitions for toybrick seed
91c4147e7 pta: crypto_service: change some return code to be accurate
3167e3733 drivers: rockchip: hal_crypto: mask lockstep interrupt
3f0f0b052 pta: support check oem otp key is written
9af9076b0 rockchip: sys_ctrl: move sys ctrl code to common/ dir
48b7c13e2 pta: uboot_storedata_otp: modify parameter check
65daed964 pta: crypto_service: support oem otp key phys cipher
f5add58be core: TEE_GenerateKey support RSA key e = 3

Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I3f52db2bbfe52310a8798607f30da904ed96ebb7

show more ...

5c81b76f16-Mar-2022 Hisping Lin <hisping.lin@rock-chips.com>

rk3568: bl32: update version to v2.08

Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreat

rk3568: bl32: update version to v2.08

Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
b61fa300d scripts: commit_bin: intercept the first 8 characters for LAST_CM
91c4147e7 pta: crypto_service: change some return code to be accurate
d40f7e8a8 drivers: crypto: clk: rv1126: fix the clock enablement logic
3167e3733 drivers: rockchip: hal_crypto: mask lockstep interrupt

Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I07fc6e96c654f16c7ade1fed6dd513d86a0f52f1

show more ...

b991093714-Mar-2022 Hisping Lin <hisping.lin@rock-chips.com>

rk3588: bl32: update version to v1.09

Build from OPTEE commit in develop-next branch:
8e053a881 rockchip: remove duplicate definitions for toybrick seed
Update features:
8e053a881 rockchip:

rk3588: bl32: update version to v1.09

Build from OPTEE commit in develop-next branch:
8e053a881 rockchip: remove duplicate definitions for toybrick seed
Update features:
8e053a881 rockchip: remove duplicate definitions for toybrick seed
8b7363af3 rk3588: enable CFG_RK_UBOOT_WRITE_TOYBRICK_SEED

Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I27d2bc72942789870ee7b936141628a9fdbefdc9

show more ...

8633ea0314-Mar-2022 Weixin Zhou <zwx@rock-chips.com>

rk3566: bl31 ultra: update version to v2.12

Build from ATF commit:
069e2136d plat: rk3568: move RKPM_SLP_XXX define to pmu.h

update feature:
069e2136d plat: rk3568: move RKPM_SLP_XXX define to pm

rk3566: bl31 ultra: update version to v2.12

Build from ATF commit:
069e2136d plat: rk3568: move RKPM_SLP_XXX define to pmu.h

update feature:
069e2136d plat: rk3568: move RKPM_SLP_XXX define to pmu.h
b1ad300b8 plat: rk3568: fix pwm0 output error when exit ultra suspend

Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
Change-Id: Ia1ccb761a37d7bee3f480a0220c5e0bf2093ea0f

show more ...

0dde407411-Mar-2022 Jon Lin <jon.lin@rock-chips.com>

rv1126: usbplug: update to v1.22

from commit:
rk_boot_all: e48799: src: spinor: Support 4KB erase aligned
update feature:
Support spinor 4KB erase aligned

Change-Id: Id0fc2751744a7ff1555e919623b

rv1126: usbplug: update to v1.22

from commit:
rk_boot_all: e48799: src: spinor: Support 4KB erase aligned
update feature:
Support spinor 4KB erase aligned

Change-Id: Id0fc2751744a7ff1555e919623bc5b57cb650120
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

show more ...

080e2dbe01-Mar-2022 Joseph Chen <chenjh@rock-chips.com>

rv1106: Add RV1106MINIALL.ini

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Signed-off-

rv1106: Add RV1106MINIALL.ini

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Signed-off-by: Chen Fen <chenfen@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Id316815664fe091d6e404955a2895973122bdca9

show more ...

bd1930f109-Mar-2022 xb.wang <xb.wang@rock-chips.com>

rk3588: bl32: update version to v1.08

Build from OPTEE commit in develop-next branch:
7ef2a818a5 rk3588: otp: set life cycle to provisioned when writing otp key3
Update features:
7ef2a818a5

rk3588: bl32: update version to v1.08

Build from OPTEE commit in develop-next branch:
7ef2a818a5 rk3588: otp: set life cycle to provisioned when writing otp key3
Update features:
7ef2a818a5 rk3588: otp: set life cycle to provisioned when writing otp key3
91c4147e75 pta: crypto_service: change some return code to be accurate
3167e37331 drivers: rockchip: hal_crypto: mask lockstep interrupt
911282ad2b plat-rockchip: rk3588: add for init HDCP key by keylad

Signed-off-by: xb.wang <xb.wang@rock-chips.com>
Change-Id: Ieab9c39458c1986ccd0cf8633098f76dc43a4b7b

show more ...

3084275c04-Mar-2022 Jon Lin <jon.lin@rock-chips.com>

rk3588: usbplug: Update to v1.08

from commit:
f04a3d: platform: rk3588: pmu os reg change to pmu0.
update feature:
Support spiflash.

Change-Id: I396e408307061c059c32292c3264c35faf6169f6
Signed-of

rk3588: usbplug: Update to v1.08

from commit:
f04a3d: platform: rk3588: pmu os reg change to pmu0.
update feature:
Support spiflash.

Change-Id: I396e408307061c059c32292c3264c35faf6169f6
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

show more ...

8001549204-Mar-2022 XiaoDong Huang <derrick.huang@rock-chips.com>

rk3588: bl31: update version to v1.17

Build from ATF commit:
b5f843fe1 plat: rockchip: rk3588: Don't change clock source to gpll when use pvtpll
update feature:
b5f843fe1 plat: rockchip: rk3

rk3588: bl31: update version to v1.17

Build from ATF commit:
b5f843fe1 plat: rockchip: rk3588: Don't change clock source to gpll when use pvtpll
update feature:
b5f843fe1 plat: rockchip: rk3588: Don't change clock source to gpll when use pvtpll
3c0a51aa4 plat: rockchip: rk3588: scmi: Add pvtpll config for cpul and dsu
5cc577ea0 plat: rockchip: rk3588: Add support set intermediate rate for npu
a029dd681 plat: rockchip: rk3588: Add support set intermediate rate for gpu
fdaa54cbb plat: rockchip: rk3588: Add support set intermediate rate for cpub
90c6c51f7 plat: rockchip: rk3588: Set gpll source clock div to 0
5ac4bc169 plat: rk3588: support vpu reset
00ba5738d plat: rk3588: support stop cpu

Change-Id: I3cbf062958c3a78526de5a4cf6df4b94e5b5b9a3
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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