rv1106: ddr: Update DDR bin to v1.07 20220523

Build from:
c483db9fb8 drivers: ram: rv1106: Initial version v1.07 20220523
(https://10.10.10.29/c/rk/ubd/+/145841/43)

Update feature:
1. Reduce drv

rv1106: ddr: Update DDR bin to v1.07 20220523

Build from:
c483db9fb8 drivers: ram: rv1106: Initial version v1.07 20220523
(https://10.10.10.29/c/rk/ubd/+/145841/43)

Update feature:
1. Reduce drv of QFN DDR2
2. Change 780MHz to 792MHz
3. Improve calc of tRP
4. Delete unsupported freq (1056)

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I331f29ff21c7db5a5caf10ab9b9d4f900885a98d

show more ...

rv1106: hpmcu: pack mcu_wrap firmware for tb

hpmcu firmware naming rule:
rv1106_hpmcu_tb_vxxx.bin - thunderboot
rv1106_hpmcu_wrap_vxxx.bin - mcu wrap

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.

rv1106: hpmcu: pack mcu_wrap firmware for tb

hpmcu firmware naming rule:
rv1106_hpmcu_tb_vxxx.bin - thunderboot
rv1106_hpmcu_wrap_vxxx.bin - mcu wrap

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I8acbffef585045701901699a23c0221dcb793cd6

show more ...

rv1106: hpmcu: update version to v1.10

build from rockit-ko
https://10.10.10.29/c/linux/rockit-ko/+/154431
Update feature:
1.support scall
2.sensor support 300w 400w 500w
3.support oveflow check

rv1106: hpmcu: update version to v1.10

build from rockit-ko
https://10.10.10.29/c/linux/rockit-ko/+/154431
Update feature:
1.support scall
2.sensor support 300w 400w 500w
3.support oveflow check and reset venc
4.delete some debug log

Signed-off-by: aaron.sun <aaron.sun@rock-chips.com>
Change-Id: I62e7cd63fc9eb5cf391401c0a6b20b103694457f

show more ...

rk3568: bl31: update version to v1.33

Build from ATF commit:
ae7c295ca rockchip: scmi: base: fix protocol list response size
update feature:
ae7c295ca rockchip: scmi: base: fix protocol list

rk3568: bl31: update version to v1.33

Build from ATF commit:
ae7c295ca rockchip: scmi: base: fix protocol list response size
update feature:
ae7c295ca rockchip: scmi: base: fix protocol list response size
834a4578c plat: rockchip: scmi: Add support to set low length for cpub
5d208a630 plat: rockchip: scmi: not allowed rate = 0 to set rate
37771fb0f rockchip: cpus_on_fixed_addr.S: ldr instead of adr for Position-independent
61463dac0 plat: rockchip: support aes_ctr.
bd56a9a02 plat: rockchip: support config irq aff by sip call
fc6a6b092 rockchip: plat_pm: add functions for cpu on/suspend resume
c0152bd35 opteed: Mask non-secure interrupts if the cpus will be off
5d54ce865 plat: rk3568: fix pwm0 output error when exit ultra suspend
8f8c332d6 plat: rk3568: support to config cache write streaming
3f58c537b rockchip: common: Add boot1 param for atags
698f83a30 rockchip: gicv3: add plat_rockchip_gic_its_quiescent function
67c9cdc3e lib: psci: Add weak psci_plat_system_suspend_prepare()
cb84541ac plat: rk3568: set the ATF RAM as secure
29d00ad58 rockchip: gicv3: support getting routing cpu.
898fdcd8a rockchip: only use plat_uart_base to initialize console
0337c56f8 plat: rockchip: scmi: mark clk_ops as const
c2e74efff rockchip: support sram_reuse section
d1849fccd plat: rockchip: add system control function for OPTEED.
5057c23a4 plat: rk3568: dmc: set NOC response type when change ddr freq
31f716829 plat: rk3568: sram init section use RW attribute
87a9dbe8e rockchip: scmi_clock: return cur_rate if no get_rate ops or get_rate return 0
58314759f make.sh: compile with "ARM_ARCH_MINOR"
58dc14a62 rockchip: fiq-debugger: fix error if fiq from el0
5bd6aa529 plat: rk3568: dmc: disable clk drv when suspend for ultar board
8e24b5662 plat: rk3568: dmc: remove struct ddr_dts_config_timing
5bede8da8 rockchip: simplify cpu_context's initialization
4edcdbb82 plat: rk3568: dmc: no longer get ddr timing from DTS
24ab016fc plat: rk3568: add support dfs_fsp_init
e7ed08b1f plat: rockchip: dram: update ddr_params.h
23d3e9d8b plat: rockchip: update rockchip_sip_svc for support dfs_fsp_init
78c6a27b5 plat: rk3568: use sram init section
c9a647cae plat: rk3568: dmc: update dcf code to v1.08

Change-Id: Ia3bf2c2b89351547eb02710f982a6749590c169c
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

show more ...

rk3588: bl31: update version to v1.24

Build from ATF commit:
55ca4fb1c plat: rk3588: support suspend from uboot
update feature:
55ca4fb1c plat: rk3588: support suspend from uboot
e1e41ad

rk3588: bl31: update version to v1.24

Build from ATF commit:
55ca4fb1c plat: rk3588: support suspend from uboot
update feature:
55ca4fb1c plat: rk3588: support suspend from uboot
e1e41ada7 plat: rk3588: support RK_SIP_WDT_CFG
b1777a134 rockchip: svc: add RK_SIP_WDT_CFG define
5a6cefa04 plat: rockchip: rk3588: scmi: change pvtpll config for cpu gpu and npu
834a4578c plat: rockchip: scmi: Add support to set low length for cpub
b0aca2fce rockchip: wdt: move wdt macro to wdt.h

Change-Id: Ife7cb34e9e4d46d59055b0a3bd7530739515b5d3
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

show more ...

rv1106: hpmcu: add initial verison v1.00

support mcu wrap isp and venc
mcu use sram 0xff6ff000 - 0xff6fffff
build from rockit-ko
rockit-ko:
https://10.10.10.29/c/linux/rockit-ko/+/15

rv1106: hpmcu: add initial verison v1.00

support mcu wrap isp and venc
mcu use sram 0xff6ff000 - 0xff6fffff
build from rockit-ko
rockit-ko:
https://10.10.10.29/c/linux/rockit-ko/+/152944
Update feature:
1.mcu check once per 32 line and update vpu register
2.max height support to 2048
3.not support scall

Change-Id: Ibf8bb3cee8ec9edaa9bd9506f6264ee79d2e082d
Signed-off-by: aaron.sun <aaron.sun@rock-chips.com>

show more ...

rv1106: ddr: Update DDR bin to v1.06 20220509

Build from:
5dc6490a60 drivers: ram: rv1106: Initial version v1.06 20220509
(https://10.10.10.29/c/rk/ubd/+/145841/42)

Update feature:
1. Set defalu

rv1106: ddr: Update DDR bin to v1.06 20220509

Build from:
5dc6490a60 drivers: ram: rv1106: Initial version v1.06 20220509
(https://10.10.10.29/c/rk/ubd/+/145841/42)

Update feature:
1. Set defalut pack to QFN
2. Add 528MHz of DDR3 (Config 528MHz with ddrbin_tool)
3. Do not print warning when read eye trn flag is high, because
it is easy to happen at low freq

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I40ada0a143b7b0b561fcc88f0c24f88ec7b29b52

show more ...

rk3588: bl31: update version to v1.23

Build from ATF commit:
4cb97c540 plat: rk3588: hdmirx: Add vo1 idle request and reset module operations
update feature:
4cb97c540 plat: rk3588: hdmirx:

rk3588: bl31: update version to v1.23

Build from ATF commit:
4cb97c540 plat: rk3588: hdmirx: Add vo1 idle request and reset module operations
update feature:
4cb97c540 plat: rk3588: hdmirx: Add vo1 idle request and reset module operations
5ddb37277 plat: rk3588: sleep: fix check_processors_stop flow
f9b7d4f05 plat: rk3588: sleep: use plat_uart_base instead of PLAT_RK_UART_BASE
fbe4c4611 plat: rk3588: sleep: print wakeup source early
5d208a630 plat: rockchip: scmi: not allowed rate = 0 to set rate

Change-Id: Icc946e3c66873e2650f86bf4660ff3ec0d61a287
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

show more ...

rk3326: bl31: update version to v1.30

Build from ATF commit:
5d208a630 plat: rockchip: scmi: not allowed rate = 0 to set rate
update feature:
61f4560ba plat: px30: sleep: save/restore cru_mo

rk3326: bl31: update version to v1.30

Build from ATF commit:
5d208a630 plat: rockchip: scmi: not allowed rate = 0 to set rate
update feature:
61f4560ba plat: px30: sleep: save/restore cru_mode if vdd_logic off

Change-Id: I38c02c37cde0b103f04b39b4833fac067d5eccbf
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

show more ...

px30: bl31: update version to v1.30

Build from ATF commit:
5d208a630 plat: rockchip: scmi: not allowed rate = 0 to set rate
update feature:
61f4560ba plat: px30: sleep: save/restore cru_mode

px30: bl31: update version to v1.30

Build from ATF commit:
5d208a630 plat: rockchip: scmi: not allowed rate = 0 to set rate
update feature:
61f4560ba plat: px30: sleep: save/restore cru_mode if vdd_logic off

Change-Id: I30afefc7e1a486950a1a872f8e2f767b8b65835e
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

show more ...

rv1106: ddr: Update DDR bin to v1.05 20220425

Build from u-boot-ddr:
drivers: ram: rv1106: Initial version v1.05 20220425
(https://10.10.10.29/c/rk/u-boot-ddr/+/145841/41)

Update feature:
1. Rea

rv1106: ddr: Update DDR bin to v1.05 20220425

Build from u-boot-ddr:
drivers: ram: rv1106: Initial version v1.05 20220425
(https://10.10.10.29/c/rk/u-boot-ddr/+/145841/41)

Update feature:
1. Read OTP to get pack
2. Adjust NOC ReadLatency of DDR3 924MHz & 1056MHz
3. Delete 324MHz & 396MHz of DDR2
4. Enable PVTPLL
5. Config DDR_GRF_CON1&2 for power consumption
6. QFN gets SI info from MACRO, BGA gets SI info from
loader_params.inc
7. Set reg_train_2t_mode, and fix reg_cmd_2t_mode to 0x7fffff
8. Exit read gate if detect error flag
9. Fix set of t_xs_x32, t_xs_abort_x32 and t_xs_fast_x32
10. wait_phy_pll_lock in ddr_set_rate()
11. Decrease delay between rkclk_ddr_reset(dram, 1, 1, 1, 1) and
rkclk_ddr_reset(dram, 1, 1, 1, 0)
12. Call dram_all_config and enable_low_power in post_init
13. Add delay when detect row

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Ic125bf2081c01aafdd6ef473c9b2145d41337a66

show more ...

rk3588: bl31: update version to v1.22

Build from ATF commit:
807c274ce plat: rockchip: rk3588: scmi: change gpu pvtpll config for stability
update feature:
807c274ce plat: rockchip: rk3588:

rk3588: bl31: update version to v1.22

Build from ATF commit:
807c274ce plat: rockchip: rk3588: scmi: change gpu pvtpll config for stability
update feature:
807c274ce plat: rockchip: rk3588: scmi: change gpu pvtpll config for stability
190d479b2 plat: rk3588: enable mem repair
e0dc4b466 plat: rk3588: sleep: do hdcp_suspend/hdcp_resume
6a1f4d6ba plat: rk3588: support hdcp
23404d34c plat: rk3588: workaround for pmusram secure issue

Change-Id: Ib4f8cceab7dbe5ac9c431ba2cb3d06bd1d904953
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

show more ...

rv1106: support thunderboot

Build from commit:
- hpmcu: a4b58c7 [BSP] rv1106-mcu: move execution address to 0x40000
- spl: 4bc827 Revert "rockchip: rv1106: select CONFIG_ARM_ZERO_CNTVOFF"

Signed-

rv1106: support thunderboot

Build from commit:
- hpmcu: a4b58c7 [BSP] rv1106-mcu: move execution address to 0x40000
- spl: 4bc827 Revert "rockchip: rv1106: select CONFIG_ARM_ZERO_CNTVOFF"

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I7d353d20f6e7261a12392215f07e72ab5b4ecc54

show more ...

rk3588: ddr: update ddr bin to v1.07

build from:
f66a4eb902 rk3588: ddr: update ddr bin to v1.07
build command:
./make.sh rk3588

update feature:
a584300255 rk3588: ddr: disable per bank refresh

rk3588: ddr: update ddr bin to v1.07

build from:
f66a4eb902 rk3588: ddr: update ddr bin to v1.07
build command:
./make.sh rk3588

update feature:
a584300255 rk3588: ddr: disable per bank refresh
3cc11fcb80 rk3588: ddr: fix low freq WRTRN BUG
abd1ff57fa rk3588: ddr: fix lp4/4x byte mode zqcal bug and rd_per_rank_en config
0304fc94a9 rk3588: ddr: enable PCL_PD to saving power
d8d1daacc7 rk3588: ddr: config sr_idle for FSP1/2/3
fec88154df rk3588: ddr: add override mdll lock result in sdram_init_detect
59a71d80d9 rk3588: ddr: clear SW_* after SW write training code update done
5a9eccb98d rk3588: ddr: add vref scan
07f12e003a rk3588: ddr: fix eye scan code bug
e93a13b34b rk3588: ddr: hash_rank_mask set to 0 when ddrconf < 4
99b2bed1a6 rk3588: ddr: lpddr5 ddrconf choose "G" at bit5
056fce2e98 rk3588: ddr: fix cs detect bug
d307d605b1 rk3588: ddr: enable derate after pctl_modify_trfc
b5be2ab9ae rk3588: ddr: add support lpddr5 ddr frequency scan
7bf7ad694f rk3588: ddr: clrbit DVFS_CON.per_dvfs_train_disable in ddr_set_rate
5f9c6b011d rk3588: ddr: fix lpddr4/4x trfc calculate bug
e7723f15ae rk3588: ddr: fix SD boot bug

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Ice389ab8e21e19636356d1d9cf4123624adf3992

show more ...

rk3588: spl: update version to v1.11

build from:
c060f28d707 mmc: sdhci: don't clear SDHCI_INT_STATUS register during CMD_INHIBIT

build command:
./make.sh rk3588

update feature:
Disabl

rk3588: spl: update version to v1.11

build from:
c060f28d707 mmc: sdhci: don't clear SDHCI_INT_STATUS register during CMD_INHIBIT

build command:
./make.sh rk3588

update feature:
Disabled HS400 support for EMMC

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ibdcbfb5e8969d8cb1dc16208699730668ac472a9

show more ...

rv1106: ddr: Update DDR bin to v1.04 20220419

Add bin/rv11/rv1106_ddr_xxxMHz_tb_v1.04.bin, with baudrate 1.5M

Build from u-boot-ddr:
drivers: ram: rv1106: Updata to v1.04 20220419
(https://10.10.

rv1106: ddr: Update DDR bin to v1.04 20220419

Add bin/rv11/rv1106_ddr_xxxMHz_tb_v1.04.bin, with baudrate 1.5M

Build from u-boot-ddr:
drivers: ram: rv1106: Updata to v1.04 20220419
(https://10.10.10.29/c/rk/u-boot-ddr/+/151604/1)

Update feature:
1. Delete most print
2. Clear CNTVOFF after timer_init
3. Wait phy pll lock in ddr_set_rate()
4. Call dram_all_config() and enable_low_power() in post_init

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I9839c1f4b77018e6bc24561d2d1116241b624614

show more ...

rv1106: usbplug: Update to v1.03

from commit:
4272bc src: spinor: Enable SFC x4 bootrom
update feature:
src: spinor: Enable SFC x4 bootrom

Change-Id: I82de0a1d64f87444710d7d976403b20478951032
Sig

rv1106: usbplug: Update to v1.03

from commit:
4272bc src: spinor: Enable SFC x4 bootrom
update feature:
src: spinor: Enable SFC x4 bootrom

Change-Id: I82de0a1d64f87444710d7d976403b20478951032
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

show more ...

rk3588: bl31: update version to v1.21

Build from ATF commit:
9277c3e25 plat: rockchip: rk3588: fix pd status error when power up
update feature:
9277c3e25 plat: rockchip: rk3588: fix pd stat

rk3588: bl31: update version to v1.21

Build from ATF commit:
9277c3e25 plat: rockchip: rk3588: fix pd status error when power up
update feature:
9277c3e25 plat: rockchip: rk3588: fix pd status error when power up
37771fb0f rockchip: cpus_on_fixed_addr.S: ldr instead of adr for Position-independent
031ad5c89 plat: rk3588: sleep: pll switch slow mode only in ddrpd mode
0847b882d plat: rk3588: sleep: save/restore pd_bus and pd_pmu qos only logoff or pmuoff
cd904a523 plat: rk3588: change sram_ld_base to (sram + 4K)
3e9812c45 plat: rk3588: sleep: save/restore some usb2phy0~1 register
12252b412 plat: rk3588: use constant to initialize pmu2_pwr_gate_con and pmu2_bus_dile_con
dd32ffa67 plat: rk3588: config cpu's sp to pmusram in boot time
070c7fdef plat: rk3588: config firewall-region in secure_region_init
0381b2cb3 plat: rk3588: enable sdei
61463dac0 plat: rockchip: support aes_ctr.
65ba29656 plat: rk3588: drivers: add crypto driver
777378421 plat: rk3588: drivers: add keyladder driver
a4f8c8a38 plat: rk3588: drivers: add otp driver

Change-Id: Idf5dd3ac5c3fbad24ab4505b9b12c3c507dbcff2
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

show more ...

rv1106: ddr: Update DDR bin to v1.03 20220330

Build from u-boot-ddr:
c44e2c2649 drivers: ram: rv1106: Initial version v1.02 20220330
(https://10.10.10.29/c/rk/u-boot-ddr/+/145841/37)
and change b

rv1106: ddr: Update DDR bin to v1.03 20220330

Build from u-boot-ddr:
c44e2c2649 drivers: ram: rv1106: Initial version v1.02 20220330
(https://10.10.10.29/c/rk/u-boot-ddr/+/145841/37)
and change baudrate to 115200

Update feature:
Change baudrate to 115200

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Ic18c28757ae38670e27e5a1a0f6cc94ba4271f27

show more ...

rv1106: hpmcu: apdate to v1.00

Build from:
1f8111a: [BSP]: rockchip: common: audio: don't set clk if uac pll compensation enable

update feature:
1.support cache, uart, timer

Signed-off-by: Jason

rv1106: hpmcu: apdate to v1.00

Build from:
1f8111a: [BSP]: rockchip: common: audio: don't set clk if uac pll compensation enable

update feature:
1.support cache, uart, timer

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I6ff26f4f2898352da62c074ebf2f3eab1767eb91

show more ...

rk3308: loader: Update to v1.36

from commit:
rk_boot_all: fb9f8e: src: spinor: Support new spiflash
update feature:
Support new spiflash

Change-Id: I634d9f1707da419bafa3bf8d42778c8e758fe7c7
Signe

rk3308: loader: Update to v1.36

from commit:
rk_boot_all: fb9f8e: src: spinor: Support new spiflash
update feature:
Support new spiflash

Change-Id: I634d9f1707da419bafa3bf8d42778c8e758fe7c7
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

show more ...

rk3326: bl31: update version to v1.29

Build from ATF commit:
7af4354ca plat: px30: sleep: disable timer before timer init
update feature:
7af4354ca plat: px30: sleep: disable timer before ti

rk3326: bl31: update version to v1.29

Build from ATF commit:
7af4354ca plat: px30: sleep: disable timer before timer init
update feature:
7af4354ca plat: px30: sleep: disable timer before timer init

Change-Id: I17a2089d575c364a7b92acc9e9309b92a05c148f
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

show more ...

px30: bl31: update version to v1.29

Build from ATF commit:
7af4354ca plat: px30: sleep: disable timer before timer init
update feature:
7af4354ca plat: px30: sleep: disable timer before time

px30: bl31: update version to v1.29

Build from ATF commit:
7af4354ca plat: px30: sleep: disable timer before timer init
update feature:
7af4354ca plat: px30: sleep: disable timer before timer init

Change-Id: I366175e29bf9b38e5980f0f57123f029eb93a07d
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

show more ...

rv1106: ddr: Update to v1.02 20220330

Build from u-boot-ddr:
c44e2c2649 drivers: ram: rv1106: Initial version v1.02 20220330
(https://10.10.10.29/c/rk/u-boot-ddr/+/145841/37)

Update feature:
c44

rv1106: ddr: Update to v1.02 20220330

Build from u-boot-ddr:
c44e2c2649 drivers: ram: rv1106: Initial version v1.02 20220330
(https://10.10.10.29/c/rk/u-boot-ddr/+/145841/37)

Update feature:
c44e2c2649 drivers: ram: rv1106: Initial version v1.02 20220330
(https://10.10.10.29/c/rk/u-boot-ddr/+/145841/37)
1. Fix 328MHz to 324MHz, 664MHz to 660MHz, 784MHz to 780MHz
2. Fix ReadLatency of NOC (-50)
3. Delete DQ skew cfg of DDR2
4. Set DeviceSize of NOC
5. Fix PHY PLL set
6. Fix wrong calc of wrlvl_info.tdqss_min/max
7. Fix wrong set of tRFC

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I78755018346355647a28e5b85ee2ee390c49605d

show more ...

rk3588: bl31: update version to v1.20

Build from ATF commit:
7380d9813 plat: rockchip: rk3588: dmc: configure sr_en and pd_en based on idle value
update feature:
7380d9813 plat: rockchip: rk

rk3588: bl31: update version to v1.20

Build from ATF commit:
7380d9813 plat: rockchip: rk3588: dmc: configure sr_en and pd_en based on idle value
update feature:
7380d9813 plat: rockchip: rk3588: dmc: configure sr_en and pd_en based on idle value
fedf3922d plat: rockchip: rk3588: dmc: add support LPDDR5 frequency scan
9328b4ce3 plat: rockchip: rk3588: dmc: clrbit RD_CAL_MODE if rd deskew is 0

Change-Id: Id5c38d95b2f74a17c03c7b3ff04345ddc66c947b
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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