RK3288: DDR: DDR Version 1.01 20160803

All DRAM type init frequency increase to 400MHz,
because some type of screen display gilitter before
kernel set DDR rate to high frequency.

Change-Id: I519b60

RK3288: DDR: DDR Version 1.01 20160803

All DRAM type init frequency increase to 400MHz,
because some type of screen display gilitter before
kernel set DDR rate to high frequency.

Change-Id: I519b606db92e10ae6807efecf361fe2379cbf28d
Signed-off-by: Hecanyang <hcy@rock-chips.com>

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rk322x: optee v1.4: ddr fix bug about get vop status

Change-Id: I95ad89d5a9d91090fef6cca63ee1f97b6bcd82d3
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>

optee : revert version to v1.4

1) Revert rk322x_tee_v1.5.bin to rk322x_tee_v1.4.bin

Change-Id: Iee51984b3cf99c43e99ba64f187ed6a230ba3227
Signed-off-by: csx <csx@rock-chips.com>

rk tee : Update rk322x_tee_ta_v1.5.bin

Change-Id: Idd082141bde5123bef3055b4a0ab66bb62cfab11
Signed-off-by: csx <csx@rock-chips.com>

rk tee : Open RPMB support for rk322x_tee_ta.bin
1) Open RPMB support for rk322x_tee_ta.bin
2) Only modify build options (CFG_RPMB_FS for RPMB support),
don't need to change version

C

rk tee : Open RPMB support for rk322x_tee_ta.bin
1) Open RPMB support for rk322x_tee_ta.bin
2) Only modify build options (CFG_RPMB_FS for RPMB support),
don't need to change version

Change-Id: I4629621a0e99235da2f96b181c1cb622b0595511
Signed-off-by: csx <csx@rock-chips.com>

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rk tee : increase new tee.bin and change version

1) increase tee_ta_v1.5.bin for with ta
2) change version number to v1.5

Change-Id: I2b793b30a6282c0842a909908dfc709eddd8f567
Signed-off-by:

rk tee : increase new tee.bin and change version

1) increase tee_ta_v1.5.bin for with ta
2) change version number to v1.5

Change-Id: I2b793b30a6282c0842a909908dfc709eddd8f567
Signed-off-by: csx <csx@rock-chips.com>

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ddr: DDR Version 1.00 20160530

2GB/1cs per channel, ddr init error.
fix this bug to support 2GB/1cs per channel.
2GB/1cs that is: row=16, col=10, bank=3, bw=2, cs=1

Change-Id: I222d1615d3df2c01312a

ddr: DDR Version 1.00 20160530

2GB/1cs per channel, ddr init error.
fix this bug to support 2GB/1cs per channel.
2GB/1cs that is: row=16, col=10, bank=3, bw=2, cs=1

Change-Id: I222d1615d3df2c01312a04e5e0beab96fc1c2354
Signed-off-by: Hecanyang <hcy@rock-chips.com>

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DDR: DDR Version 1.00 20160523

customer find 4GB LPDDR3 performance is poor than 2GB, after analyse,
we find the reason is: 4GB just select a more low power setting, but
it effect the performance. s

DDR: DDR Version 1.00 20160523

customer find 4GB LPDDR3 performance is poor than 2GB, after analyse,
we find the reason is: 4GB just select a more low power setting, but
it effect the performance. so this version we just select the more
performance setting, no longer select the more low power setting.

Change-Id: I8899d19d6b8456e6a67f3cccbfbdd27c31b821f9
Signed-off-by: Hecanyang <hcy@rock-chips.com>

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RK322x: optee: update optee version to v1.4

fix dpll setting refdiv to 1 for more stabilization.

Change-Id: I41a38be1bcd101d30d0188377aa3197e1c5c58f1
Signed-off-by: Tang Yun ping <typ@rock-chips.co

RK322x: optee: update optee version to v1.4

fix dpll setting refdiv to 1 for more stabilization.

Change-Id: I41a38be1bcd101d30d0188377aa3197e1c5c58f1
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

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Rk322x: ddr: update ddr init code version to v1.04

ddr init code version update to v1.04 20160505. This update including
1.supporting 16bit bandwidth.
2.fix bug to supporting 8Gb dram.

Change-Id: I

Rk322x: ddr: update ddr init code version to v1.04

ddr init code version update to v1.04 20160505. This update including
1.supporting 16bit bandwidth.
2.fix bug to supporting 8Gb dram.

Change-Id: I10ef22722d152b0e0e14855969d9df21b168b599
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

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RK322x: Trust: update optee version to v1.3

ddr: 1. add ddr change freq function
ddr: 2. optimizing ddr3 timing trfc and tzqcsi, lpddr2 timing trcd and trp.

Change-Id: Ifa0fc4f14fffe487a45eade8ed9f

RK322x: Trust: update optee version to v1.3

ddr: 1. add ddr change freq function
ddr: 2. optimizing ddr3 timing trfc and tzqcsi, lpddr2 timing trcd and trp.

Change-Id: Ifa0fc4f14fffe487a45eade8ed9f294988167bad
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

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rk322x: update optee version to v1.2

ddr: to reduce EMI, setting refdiv from 1 to 12 for bigger clock jitter

Change-Id: Iabf59d9f211b43af76d1e0b13e2bfd531dd4a7c7
Signed-off-by: Jianhong Chen <chenj

rk322x: update optee version to v1.2

ddr: to reduce EMI, setting refdiv from 1 to 12 for bigger clock jitter

Change-Id: Iabf59d9f211b43af76d1e0b13e2bfd531dd4a7c7
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>

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rk3288: nand: fix sandisk flash upgrade problems

Change-Id: I7a17fb78d56c3866ef22a79c7aaf96f152ad3e6e
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

rk322x: nand: fix sandisk flash upgrade problems

Change-Id: I8a18393140bca8e9000bbef388ffbc19a38413e3
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

322x: miniloader: support toshiba 15nm 4GB nand flash

Change-Id: I932ecda0fc4dea301edfbb8b281b41653c9a7d89
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

rk322x: update optee version to v1.1

Change-Id: Id5fe67248c32dba3495d5c75e244791ba55415d1
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>

3288: usbplug: select general pll clock for emmc

Change-Id: I39796a4efb0c8d69a8159f2e0b816d92cd0d9f15
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

rk3288: ddr: support 3GB(8Gb+4Gb * 2channel)

by now, all supported 3GB include
(1)cha: 6Gb/cs0 + 6Gb/cs1
chb: 6Gb/cs0 + 6Gb/cs1
(2)cha: 12Gb/cs0
chb: 12Gb/cs0
(3)cha: 8Gb/cs0 +

rk3288: ddr: support 3GB(8Gb+4Gb * 2channel)

by now, all supported 3GB include
(1)cha: 6Gb/cs0 + 6Gb/cs1
chb: 6Gb/cs0 + 6Gb/cs1
(2)cha: 12Gb/cs0
chb: 12Gb/cs0
(3)cha: 8Gb/cs0 + 4Gb/cs1
chb: 8Gb/cs0 + 4Gb/cs1
(4)cha: 16Gb/cs0
chb: 8Gb/cs0
(5)cha: 16Gb/cs0
chb: 4Gb/cs0 + 4Gb/cs1
(6)cha: 8Gb/cs0 + 8Gb/cs1
chb: 8Gb/cs0
(7)cha: 8Gb/cs0 + 8Gb/cs1
chb: 4Gb/cs0 + 4Gb/cs1

Change-Id: If12e84795ba2c1898e38202a27d660b02eed73bb
Signed-off-by: Hecanyang <hcy@rock-chips.com>

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rk322x: fix efuse secure flag write fail issue

Change-Id: I056dc1580f46be502c78cd27c8c89d245fefc964
Signed-off-by: ZhangJunwei <william.zhang@rock-chips.com>

3228: miniloader: fix secure boot fail issue.

Change-Id: Ic208647054ec7cc5fd6d5856eed0381154b7f387
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

3288: miniloader: support sha 256

Change-Id: Ic1f5407c1fbc45fc0386cd12497170526ab085c3
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

rk322x: Fix trust image running handup error.

Change-Id: I5a50d1fd47d89ad00e65cac30647376753c4c121
Signed-off-by: cwz <cwz@rock-chips.com>

ddr: ddr update to 20151202 version.

ddr init code print version is : DDR Version 1.00 20151202
this version update below features:
1)support use only one channel.
the only channel MUST connect to

ddr: ddr update to 20151202 version.

ddr init code print version is : DDR Version 1.00 20151202
this version update below features:
1)support use only one channel.
the only channel MUST connect to DDR0
2)support use 3GB total capabilty, include
(I) DDR0:768MB/CS0 + 768MB/CS1
DDR1:768MB/CS0 + 768MB/CS1
(II) DDR0:1.5GB
DDR1:1.5GB
(III)DDR0:2GB
DDR1:1GB
3)fixed ZQ command can't send to 2 rank at the same time

Change-Id: I4e03be591324df574bd9f57ad0ba22ecf50dcd4f
Signed-off-by: Hecanyang <hcy@rock-chips.com>

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rk322x: enable trust os image merge.

1. trust os image merger depend on CONFIG_MERGER_TRUSTOS.
2. loaderimage tools add function merger uboot and trust image.
3. tos bin file config by R

rk322x: enable trust os image merge.

1. trust os image merger depend on CONFIG_MERGER_TRUSTOS.
2. loaderimage tools add function merger uboot and trust image.
3. tos bin file config by RK322XTOS.ini.

Change-Id: I6b47c506bf0bbe8b8db81cca9af047577efc0714
Signed-off-by: cwz <cwz@rock-chips.com>

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rk322x: enable miniloader merger.

Change-Id: I3decff91ef8df359e2ebdebf212aa58b3db66ce3
Signed-off-by: william.zhang <william.zhang@rock-chips.com>