rk322x: tee with ta: update optee version to v1.96

build from optee commit:
78b830cb rk322x: ddr: fix lpddr3 bug

update feature:
78b830cb rk322x: ddr: fix lpddr3 bug
7b4ec903 plat-rockchip: conf

rk322x: tee with ta: update optee version to v1.96

build from optee commit:
78b830cb rk322x: ddr: fix lpddr3 bug

update feature:
78b830cb rk322x: ddr: fix lpddr3 bug
7b4ec903 plat-rockchip: config: add configs for dual filesystems
778c7c9f libutee: remove storageID check, let TEE kernel validate instead
4ed35d6f storage: return TEE_ERROR_ITEM_NOT_FOUND when storage ID is unknown

Change-Id: Ife29b5fda8848b6afc4edc48fe60e677646ff768
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

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px30: bl31: update version to v1.12

Build from ATF commit:
beb0831 plat: px30: support cluster idle
update feature:
beb0831 plat: px30: support cluster idle
4654e39 plat: rockchip: suppo

px30: bl31: update version to v1.12

Build from ATF commit:
beb0831 plat: px30: support cluster idle
update feature:
beb0831 plat: px30: support cluster idle
4654e39 plat: rockchip: support bl32/bl33 fixup by platform
1e2e0a8 px30: enable CONFIG_PLAT_WARMBOOT_ADDR_NOT_ALIGN
9f2cf03 rockchip: common: make warmboot address 64 align optional
eff4387 plat: px30: dfs: close DDR standby during change DDR frequency
a933e5a plat: px30: ddr: fix ddr4 tCCD_L set error
2e3014a plat: px30: dfs: add ddr_update_lowpower
65aa5ce rockchip: fix bugs of disable uart fiq

Change-Id: Iba22bbe055cb3f50f4a43af8048bca4311919424
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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rk3326: bl31: update version to v1.12

Build from ATF commit:
beb0831 plat: px30: support cluster idle
update feature:
beb0831 plat: px30: support cluster idle
4654e39 plat: rockchip: sup

rk3326: bl31: update version to v1.12

Build from ATF commit:
beb0831 plat: px30: support cluster idle
update feature:
beb0831 plat: px30: support cluster idle
4654e39 plat: rockchip: support bl32/bl33 fixup by platform
1e2e0a8 px30: enable CONFIG_PLAT_WARMBOOT_ADDR_NOT_ALIGN
9f2cf03 rockchip: common: make warmboot address 64 align optional
eff4387 plat: px30: dfs: close DDR standby during change DDR frequency
a933e5a plat: px30: ddr: fix ddr4 tCCD_L set error
2e3014a plat: px30: dfs: add ddr_update_lowpower
65aa5ce rockchip: fix bugs of disable uart fiq

Change-Id: I097411c3230a518542c7a58101a3bdf11d706a4f
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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rk3308: bl31: update version to v1.05

Build from ATF commit:
65aa5ce rockchip: fix bugs of disable uart fiq
Update feature:
65aa5ce rockchip: fix bugs of disable uart fiq

Change-Id: I15db77

rk3308: bl31: update version to v1.05

Build from ATF commit:
65aa5ce rockchip: fix bugs of disable uart fiq
Update feature:
65aa5ce rockchip: fix bugs of disable uart fiq

Change-Id: I15db77ac414d8b515647aac107eb40a6fcddce38
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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px3se: add miniloader and trust configs for px3se

PX3SE uses its own miniloader and the cpu debug port
is uart1. It can share the tee binary with rk3126,
so make a soft link to RKTRUST/RK3126TOS.ini

px3se: add miniloader and trust configs for px3se

PX3SE uses its own miniloader and the cpu debug port
is uart1. It can share the tee binary with rk3126,
so make a soft link to RKTRUST/RK3126TOS.ini for RKTRUST/PX3SETOS.ini.

px3se_ddr_300MHz_v2.08.bin makes the uart1 as debug port.

Change-Id: Ifdca0e7206d5d0c38504b4f6ac7ddd6674e04f0a
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

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rk3228h/rk3328: bl32: update version to 1.43

Build from optee commit in develop branch:
14d301d DEBUG: add debug info for ctx->mmu assert

Update feature:
14d301d DEBUG: add debug info for ctx->mm

rk3228h/rk3328: bl32: update version to 1.43

Build from optee commit in develop branch:
14d301d DEBUG: add debug info for ctx->mmu assert

Update feature:
14d301d DEBUG: add debug info for ctx->mmu assert
18ff43b plat-rockchip: add configure uart port function
7aa5017 efuse: modify udelay function
142a58f efuse: mask interrupt before efuse read & write
efb317c rpmb: separate multi block read
1ec21f3 boringssl: fix compile error when CFG_TEE_CORE_LOG_LEVEL=0
cdb14d1 plat-rockchip: refine platform init sequence
a50148c rk_bch: improve the startup speed

Change-Id: Idb08eac4caf4f4f79cd04b557ed92c0124edf5f2
Signed-off-by: Zhang Zhijie <zhangzj@rock-chips.com>

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rk3368h: bl31: rename bl31 file format from bin to elf

The file is actually elf

Change-Id: I0169cefe46a645fbcf1fd3aa3ebb522a3e5a56c7
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

rk322xh: bl31: rename bl31 file format from bin to elf

The file is actually elf.

Change-Id: Id88b5abb1ef32674c006f6d13dd0992f59a5ac2c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

rk3308: bl31: update version to v1.04

Build from ATF commit:
490c474 rk3308: set pwm pin pull none in gpio input mode
Update feature:
490c474 rk3308: set pwm pin pull none in gpio input mode
9b5a

rk3308: bl31: update version to v1.04

Build from ATF commit:
490c474 rk3308: set pwm pin pull none in gpio input mode
Update feature:
490c474 rk3308: set pwm pin pull none in gpio input mode
9b5adb5 rk3308: make suspend_mode_handler() suitable with kernel driver
a14f46a rk3308: save/restore cpu qos when system suspend

Change-Id: I1008a3926e252a7fa99b09ddc59794a116a9321c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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rk3399: bl31: update version to 1.16

compile with option "SPD=opteed"

Change-Id: I8a2be647caa14dc83d2a4b87b5f2c4480c789eba
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

rk3399: bl31: update version to 1.15

Build from ATF commit:
d98d16e plat: rk3399: suspend: remove ddr debug log in suspend and dfs
update feature:
d98d16e plat: rk3399: suspend: remove ddr d

rk3399: bl31: update version to 1.15

Build from ATF commit:
d98d16e plat: rk3399: suspend: remove ddr debug log in suspend and dfs
update feature:
d98d16e plat: rk3399: suspend: remove ddr debug log in suspend and dfs
c4e7b9a plat: rk3399: suspend: support only one channel
824db84 rockchip: disable uart fiq when cpu/systerm resume

Change-Id: Ic2f4cd81bea778d1a107c5b1842f5b9f4140d5e2
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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px30: bl31: update version to v1.11

Build from ATF commit:
5f31f71 plat: px30: disable resetting output pin even reboot cmd.
update feature:
5f31f71 plat: px30: disable resetting output pin

px30: bl31: update version to v1.11

Build from ATF commit:
5f31f71 plat: px30: disable resetting output pin even reboot cmd.
update feature:
5f31f71 plat: px30: disable resetting output pin even reboot cmd.
43c09a4 plat: px30: dfs: add support lpddr2

Change-Id: Ia052605e109b284d5908b378737ec7c569d99e55
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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rk3326: bl31: update version to v1.11

Build from ATF commit:
5f31f71 plat: px30: disable resetting output pin even reboot cmd.
update feature:
5f31f71 plat: px30: disable resetting output pi

rk3326: bl31: update version to v1.11

Build from ATF commit:
5f31f71 plat: px30: disable resetting output pin even reboot cmd.
update feature:
5f31f71 plat: px30: disable resetting output pin even reboot cmd.
43c09a4 plat: px30: dfs: add support lpddr2

Change-Id: I223e629d5baf21998f95f96207d6e93c84288bd7
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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rk322x: tee with ta: update optee version to v1.95

build from optee commit:
ac72e46 rk322x: ddr: use vop raw status to wait line flag

update feature:
ac72e46 rk322x: ddr: use vop raw status to wa

rk322x: tee with ta: update optee version to v1.95

build from optee commit:
ac72e46 rk322x: ddr: use vop raw status to wait line flag

update feature:
ac72e46 rk322x: ddr: use vop raw status to wait line flag
eaebb17 static ta: modify efuse write times
33168af efuse: modify udelay function
60b8da4 efuse: mask interrupt before efuse read & write

Change-Id: I7e0f2ba8a597af82be153dd8c29963397e80d559
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

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rk3308: bl31: update version to v1.03

Build from ATF commit:
4b75948 plat: px30: support soc_bus sip.
Update feature:
1. disable uart fiq when cpu/systerm resume;
2. enable non-secure world acces

rk3308: bl31: update version to v1.03

Build from ATF commit:
4b75948 plat: px30: support soc_bus sip.
Update feature:
1. disable uart fiq when cpu/systerm resume;
2. enable non-secure world access Peri QOS;

Change-Id: Id73a4356c0058e265679a0130b6b54580e7e0462
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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rk3288: tee: update version to v1.32

build from optee:
c72e46 rk322x: ddr: use vop raw status to wait line flag
update features:
apply arm errata 825619 and FOOBAR

Change-Id: Icfb7fd16803dbabaae7

rk3288: tee: update version to v1.32

build from optee:
c72e46 rk322x: ddr: use vop raw status to wait line flag
update features:
apply arm errata 825619 and FOOBAR

Change-Id: Icfb7fd16803dbabaae70b50be67636afa2bf02ab
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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px30: bl31: update version to v1.10

Build from ATF commit:
4b75948 plat: px30: support soc_bus sip.
update feature:
4b75948 plat: px30: support soc_bus sip.
824db84 rockchip: disable uar

px30: bl31: update version to v1.10

Build from ATF commit:
4b75948 plat: px30: support soc_bus sip.
update feature:
4b75948 plat: px30: support soc_bus sip.
824db84 rockchip: disable uart fiq when cpu/systerm resume
1d4b214 Revert "plat: px30: add cluster idle support

Change-Id: Ied43a2fd12ed35327f9220a37f9e18c388720da3
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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rk3326: bl31: update version to v1.10

Build from ATF commit:
4b75948 plat: px30: support soc_bus sip.
update feature:
4b75948 plat: px30: support soc_bus sip.
824db84 rockchip: disable u

rk3326: bl31: update version to v1.10

Build from ATF commit:
4b75948 plat: px30: support soc_bus sip.
update feature:
4b75948 plat: px30: support soc_bus sip.
824db84 rockchip: disable uart fiq when cpu/systerm resume
1d4b214 Revert "plat: px30: add cluster idle support

Change-Id: I1d96ec07071bd1808717e5ef13577a13abd554ff
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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rk3399: bl31: update version to 1.14

Build from ATF commit:
a11dd97 plat: rk3399: suspend: fix lpddr4 1 cs die resume fail
update feature:
1. a11dd97 plat: rk3399: suspend: fix lpddr4 1 cs d

rk3399: bl31: update version to 1.14

Build from ATF commit:
a11dd97 plat: rk3399: suspend: fix lpddr4 1 cs die resume fail
update feature:
1. a11dd97 plat: rk3399: suspend: fix lpddr4 1 cs die resume fail
2. bcbc322 plat: rk3399: suspend: fix lpddr4 after init frequency changed
3. 69d9b56 bl31: execute bl32_init() dynamically

Change-Id: I1783740344a7202978a2d8c699fcddbdc3eaefae
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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px30: bl31: update version to v1.09

Build from ATF commit:
4f8f7c9 plat: px30: suspend: save/restore i2c_con register
update feature:
4f8f7c9 plat: px30: suspend: save/restore i2c_con regist

px30: bl31: update version to v1.09

Build from ATF commit:
4f8f7c9 plat: px30: suspend: save/restore i2c_con register
update feature:
4f8f7c9 plat: px30: suspend: save/restore i2c_con register

Change-Id: I16fa2cd53780d5c0b80c79a02dcaab4d73983554
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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rk3326: bl31: update version to v1.09

Build from ATF commit:
4f8f7c9 plat: px30: suspend: save/restore i2c_con register
update feature:
4f8f7c9 plat: px30: suspend: save/restore i2c_con regi

rk3326: bl31: update version to v1.09

Build from ATF commit:
4f8f7c9 plat: px30: suspend: save/restore i2c_con register
update feature:
4f8f7c9 plat: px30: suspend: save/restore i2c_con register

Change-Id: Id3ee66c580af6d23de097323828ab93b9f1ec74c
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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rk3308: bl32: add initial version v1.00

Bl32 is default disabled for rk3308, build from:
b9d3a88 plat-rockchip: add rk3308 support

Change-Id: I7f983f5a4b7548f7456f9a9cb5604d6d68c14179
Signed-off-b

rk3308: bl32: add initial version v1.00

Bl32 is default disabled for rk3308, build from:
b9d3a88 plat-rockchip: add rk3308 support

Change-Id: I7f983f5a4b7548f7456f9a9cb5604d6d68c14179
Signed-off-by: Zhang Zhijie <zhangzj@rock-chips.com>

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rk3399: bl31: update version to 1.13

Build from ATF commit:
93a86df rockchip: Add RK3308 support
update feature:
1) 5ab1c72 rockchip: rockchip_sip_svc: add used SIP numbers definition
2)

rk3399: bl31: update version to 1.13

Build from ATF commit:
93a86df rockchip: Add RK3308 support
update feature:
1) 5ab1c72 rockchip: rockchip_sip_svc: add used SIP numbers definition
2) 92e94aa plat: rk3399: suspend: 400 to 800 with pd_center off pass version
3) 7bcd2a3 plat: rk3399: ddr: fix global reset fail when vdd_gpu power off
4) c81b210 plat: rk3399: ddr: fix ddrconfig shift error
5) a0e119f plat: rk3399: ddr: fix ddrconfig save error

Change-Id: If4c9a7434e0d9ef63e2a6f271b4ccc937771dc2d
Signed-off-by: shengfei Xu <xsf@rock-chips.com>

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px30: bl31: update version to v1.08

Build from ATF commit:
bf05006 plat: px30: suspend: fix judgement err of gic resume
update feature:
bf05006 plat: px30: suspend: fix judgement err of gic

px30: bl31: update version to v1.08

Build from ATF commit:
bf05006 plat: px30: suspend: fix judgement err of gic resume
update feature:
bf05006 plat: px30: suspend: fix judgement err of gic resume
bfeba24 plat: px30: use CPU for ddr scale frequency
25a0f1b plat: px30: add fiq func for stimer0.
ac2470d plat: px30: disable resetting output pin.
69d9b56 bl31: execute bl32_init() dynamically

Change-Id: Iaaf6de5ff84f688fc4e95fdeb38cdf1e70eabb4d
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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rk3326: bl31: update version to v1.08

Build from ATF commit:
bf05006 plat: px30: suspend: fix judgement err of gic resume
update feature:
bf05006 plat: px30: suspend: fix judgement err of gi

rk3326: bl31: update version to v1.08

Build from ATF commit:
bf05006 plat: px30: suspend: fix judgement err of gic resume
update feature:
bf05006 plat: px30: suspend: fix judgement err of gic resume
bfeba24 plat: px30: use CPU for ddr scale frequency
25a0f1b plat: px30: add fiq func for stimer0.
ac2470d plat: px30: disable resetting output pin.
69d9b56 bl31: execute bl32_init() dynamically

Change-Id: Icc3509a9f71f55a660e66198f4fe77a499a25d46
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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