| 158a27fe | 16-Mar-2022 |
Hisping Lin <hisping.lin@rock-chips.com> |
rk3326: bl32: update version to v2.12
Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreat
rk3326: bl32: update version to v2.12
Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
b61fa300d scripts: commit_bin: intercept the first 8 characters for LAST_CM
8e053a881 rockchip: remove duplicate definitions for toybrick seed
91c4147e7 pta: crypto_service: change some return code to be accurate
3167e3733 drivers: rockchip: hal_crypto: mask lockstep interrupt
3f0f0b052 pta: support check oem otp key is written
9af9076b0 rockchip: sys_ctrl: move sys ctrl code to common/ dir
48b7c13e2 pta: uboot_storedata_otp: modify parameter check
65daed964 pta: crypto_service: support oem otp key phys cipher
f5add58be core: TEE_GenerateKey support RSA key e = 3
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I3f52db2bbfe52310a8798607f30da904ed96ebb7
show more ...
|
| 5c81b76f | 16-Mar-2022 |
Hisping Lin <hisping.lin@rock-chips.com> |
rk3568: bl32: update version to v2.08
Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreat
rk3568: bl32: update version to v2.08
Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
b61fa300d scripts: commit_bin: intercept the first 8 characters for LAST_CM
91c4147e7 pta: crypto_service: change some return code to be accurate
d40f7e8a8 drivers: crypto: clk: rv1126: fix the clock enablement logic
3167e3733 drivers: rockchip: hal_crypto: mask lockstep interrupt
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I07fc6e96c654f16c7ade1fed6dd513d86a0f52f1
show more ...
|
| b9910937 | 14-Mar-2022 |
Hisping Lin <hisping.lin@rock-chips.com> |
rk3588: bl32: update version to v1.09
Build from OPTEE commit in develop-next branch:
8e053a881 rockchip: remove duplicate definitions for toybrick seed
Update features:
8e053a881 rockchip:
rk3588: bl32: update version to v1.09
Build from OPTEE commit in develop-next branch:
8e053a881 rockchip: remove duplicate definitions for toybrick seed
Update features:
8e053a881 rockchip: remove duplicate definitions for toybrick seed
8b7363af3 rk3588: enable CFG_RK_UBOOT_WRITE_TOYBRICK_SEED
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I27d2bc72942789870ee7b936141628a9fdbefdc9
show more ...
|
| 8633ea03 | 14-Mar-2022 |
Weixin Zhou <zwx@rock-chips.com> |
rk3566: bl31 ultra: update version to v2.12
Build from ATF commit:
069e2136d plat: rk3568: move RKPM_SLP_XXX define to pmu.h
update feature:
069e2136d plat: rk3568: move RKPM_SLP_XXX define to pm
rk3566: bl31 ultra: update version to v2.12
Build from ATF commit:
069e2136d plat: rk3568: move RKPM_SLP_XXX define to pmu.h
update feature:
069e2136d plat: rk3568: move RKPM_SLP_XXX define to pmu.h
b1ad300b8 plat: rk3568: fix pwm0 output error when exit ultra suspend
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
Change-Id: Ia1ccb761a37d7bee3f480a0220c5e0bf2093ea0f
show more ...
|
| bd1930f1 | 09-Mar-2022 |
xb.wang <xb.wang@rock-chips.com> |
rk3588: bl32: update version to v1.08
Build from OPTEE commit in develop-next branch:
7ef2a818a5 rk3588: otp: set life cycle to provisioned when writing otp key3
Update features:
7ef2a818a5
rk3588: bl32: update version to v1.08
Build from OPTEE commit in develop-next branch:
7ef2a818a5 rk3588: otp: set life cycle to provisioned when writing otp key3
Update features:
7ef2a818a5 rk3588: otp: set life cycle to provisioned when writing otp key3
91c4147e75 pta: crypto_service: change some return code to be accurate
3167e37331 drivers: rockchip: hal_crypto: mask lockstep interrupt
911282ad2b plat-rockchip: rk3588: add for init HDCP key by keylad
Signed-off-by: xb.wang <xb.wang@rock-chips.com>
Change-Id: Ieab9c39458c1986ccd0cf8633098f76dc43a4b7b
show more ...
|
| 80015492 | 04-Mar-2022 |
XiaoDong Huang <derrick.huang@rock-chips.com> |
rk3588: bl31: update version to v1.17
Build from ATF commit:
b5f843fe1 plat: rockchip: rk3588: Don't change clock source to gpll when use pvtpll
update feature:
b5f843fe1 plat: rockchip: rk3
rk3588: bl31: update version to v1.17
Build from ATF commit:
b5f843fe1 plat: rockchip: rk3588: Don't change clock source to gpll when use pvtpll
update feature:
b5f843fe1 plat: rockchip: rk3588: Don't change clock source to gpll when use pvtpll
3c0a51aa4 plat: rockchip: rk3588: scmi: Add pvtpll config for cpul and dsu
5cc577ea0 plat: rockchip: rk3588: Add support set intermediate rate for npu
a029dd681 plat: rockchip: rk3588: Add support set intermediate rate for gpu
fdaa54cbb plat: rockchip: rk3588: Add support set intermediate rate for cpub
90c6c51f7 plat: rockchip: rk3588: Set gpll source clock div to 0
5ac4bc169 plat: rk3588: support vpu reset
00ba5738d plat: rk3588: support stop cpu
Change-Id: I3cbf062958c3a78526de5a4cf6df4b94e5b5b9a3
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
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|
| 61923c83 | 18-Feb-2022 |
Zhihuan He <huan.he@rock-chips.com> |
rk3326: bl31: update version to v1.27
Build from ATF commit:
96550638e plat: px30-s: dram: phy io ctrl save and resume
Update feature:
96550638e plat: px30-s: dram: phy io ctrl save and resume
16
rk3326: bl31: update version to v1.27
Build from ATF commit:
96550638e plat: px30-s: dram: phy io ctrl save and resume
Update feature:
96550638e plat: px30-s: dram: phy io ctrl save and resume
16b51a9f9 plat: px30-s: dram: fix ck/ckb to low before deepsleep
90c6c51f7 plat: rockchip: rk3588: Set gpll source clock div to 0
c5157a42e plat: px30-s: Restore DDR PHY dfi low power function
0de2c3db8 plat: px30: sleep: enter ddr sref by software
16fda9dd6 plat: px30s: suspend: add ddr resume support
91188bd6f plat: px30: suspend: support ddr resume
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I5cc4bf115cc194a6c6c21ea452031d0898fe1b97
show more ...
|
| 9940cf2a | 17-Feb-2022 |
Zhihuan He <huan.he@rock-chips.com> |
px30: bl31: update version to v1.27
Build from ATF commit:
96550638e plat: px30-s: dram: phy io ctrl save and resume
Update feature:
96550638e plat: px30-s: dram: phy io ctrl save and resume
61fb
px30: bl31: update version to v1.27
Build from ATF commit:
96550638e plat: px30-s: dram: phy io ctrl save and resume
Update feature:
96550638e plat: px30-s: dram: phy io ctrl save and resume
61fb26d65 plat: px30-s: dram: fix ck/ckb to low before deepsleep
90c6c51f7 plat: rockchip: rk3588: Set gpll source clock div to 0
c5157a42e plat: px30-s: Restore DDR PHY dfi low power function
0de2c3db8 plat: px30: sleep: enter ddr sref by software
16fda9dd6 plat: px30s: suspend: add ddr resume support
91188bd6f plat: px30: suspend: support ddr resume
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I42b2ac01c74ad3f17a7e300fcb214993c82fe057
show more ...
|
| 37cca242 | 03-Nov-2021 |
XiaoDong Huang <derrick.huang@rock-chips.com> |
rv1126: tee: update version to v1.06
Build from OPTEE commit:
c1514b9e rockchip: rv1126: fastboot: update mmu map table
update feature:
c1514b9e rockchip: rv1126: fastboot: update mmu map ta
rv1126: tee: update version to v1.06
Build from OPTEE commit:
c1514b9e rockchip: rv1126: fastboot: update mmu map table
update feature:
c1514b9e rockchip: rv1126: fastboot: update mmu map table
3ff3b774 rv1126: fix build error without ta
bea79573
700bd12a
40f5fcb2 pta: uboot_storedata: check the value of size when read head
cef03957 otp_support: add func to get ta encryption key
994a45d4 BACKPORT: core: add framework to load REE-FS encrypted TAs
1276ad6e pta: add support for write TA encryption key
2f186b1c core: supply hash length for salt length in rockchip and oem verify
c8e0eeb3 core: arm: support Thumb entry point
416c89b5 rockchip: sip: add share mem page type define
61053b11 rv1126: monitor: don't panic if cpu_feature err
b500cf9c rv1126: monitor: motify some debug code
a53a7d99 rv1126: only register fiq_cpu_stop_handler one time
cab1372b plat-rockchip: only register fiq_debugger_irq_handler one time
9c3b5fd9 plat-rockchip: map TEE_PLAT_SHMEM as MEM_AREA_RAM_NSEC
8cd72983 rv1126: fix macro RG_MAP_SECURE
ef89b5c2 rockchip: fix err of parsing ddr_parameter
2c6573a7 rockchip: rv1126: fix error of parenthesis matching in sgrf_init
1e75c939 plat-rockchip: fiq-debugger: adjust the usage of fiq_debugger.tgt_cpu
9f935616 pta: unnecessary to free share memory when close session
7fcbc47e plat-rockchip: fix CFG_RK_STATIC_MEM_PARAM define err
d9140b1b rv1126: conf.mk: use atags to pass parameter
715df903 plat-rockchip: conf.mk: enable CFG_RK_RPMB_NO_DIRF_HASH
59d68db8 rv1126: modify otp size for oem
10ff881f scripts: modify supported platforms
ee120571 rv1126: conf.mk: enable CFG_VENDOR_PROPS
e4d16707 plat-rockchip: vendor_props: add needed head files
5da82304 rv1126: support get seed for vendor props
1e6e6afa rv1126: pta: support write toybrick seed
36e572e8 rv1126: pta: support R&W attribute hash and vbootkey hash
867c532c plat-rockchip: rv1126: dmc: add support lp4x
8fc0f55b plat-rockchip: rv1126: dmc: fix MR14 setting err for lp4
4a1a9c4d plat-rockchip: common: dram: add LP4x support
23f06a39 rockchip: rv1126: don't close usb powerdomain when suspend
36d1043e plat-rockchip: rv1126: dmc: remove dsmpd when pll setting
44c0c0f1 rockchip: rv1126: support suspend from uboot
6ae5d629
380b79bf
e3cdf903 rv1126: otp: oem ns-otp prog mask value rely on ns-otp[504-511]
d4636cc1 rv1126: pta: add support for R&W oem OTP
Change-Id: Ie6156f1cc81fc3cea0efe17e7e9dfcecf262b061
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
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|
| b773706e | 17-Feb-2022 |
Joseph Chen <chenjh@rock-chips.com> |
rv1106: Add RV1106TOS.ini
This is a placehold file for the furture.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ic5a1bebebfcb6c10c748af24f9ac540a42a4673a |
| 85def61d | 24-Feb-2022 |
Joseph Chen <chenjh@rock-chips.com> |
rk3588: bl31: update version to v1.16
Build from ATF commit:
bc02fdb23 plat: rk3588: support booting from the cpu according to atags.
Update feature:
bc02fdb23 plat: rk3588: support booting from
rk3588: bl31: update version to v1.16
Build from ATF commit:
bc02fdb23 plat: rk3588: support booting from the cpu according to atags.
Update feature:
bc02fdb23 plat: rk3588: support booting from the cpu according to atags.
3f58c537b rockchip: common: Add boot1 param for atags
a8b89552b plat: rockchip: rk3588: dmc: ddr_m0: fix the mistake about idle_ddrsch
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I98cebd043832600634aa37fcb55eedccd78256ff
show more ...
|
| 08cf703c | 18-Feb-2022 |
XiaoDong Huang <derrick.huang@rock-chips.com> |
rk3588: bl31: update version to v1.15
Build from ATF commit:
bf23f4632 plat: rk3588: support virtual poweroff
update feature:
bf23f4632 plat: rk3588: support virtual poweroff
698f83a30 r
rk3588: bl31: update version to v1.15
Build from ATF commit:
bf23f4632 plat: rk3588: support virtual poweroff
update feature:
bf23f4632 plat: rk3588: support virtual poweroff
698f83a30 rockchip: gicv3: add plat_rockchip_gic_its_quiescent function
67c9cdc3e lib: psci: Add weak psci_plat_system_suspend_prepare()
3bbb47b4e rockchip: amp: support booting rtos by linux.
29d00ad58 rockchip: gicv3: support getting routing cpu.
Change-Id: I75160138ab47a95362766977e993f8d5f4862c7b
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
show more ...
|
| 42eea816 | 15-Feb-2022 |
xb.wang <xb.wang@rock-chips.com> |
rv1126: tee: update version to v2.05
Build from OPTEE commit in develop-next branch:
d40f7e8a89 drivers: crypto: clk: rv1126: fix the clock enablement logic
Update features:
d40f7e8a89 drive
rv1126: tee: update version to v2.05
Build from OPTEE commit in develop-next branch:
d40f7e8a89 drivers: crypto: clk: rv1126: fix the clock enablement logic
Update features:
d40f7e8a89 drivers: crypto: clk: rv1126: fix the clock enablement logic
3167e37331 drivers: rockchip: hal_crypto: mask lockstep interrupt
3f0f0b0528 pta: support check oem otp key is written
Signed-off-by: xb.wang <xb.wang@rock-chips.com>
Change-Id: Iccb540999d5957243e6eeb439424666544d1769f
show more ...
|
| 86e9bb76 | 14-Feb-2022 |
Lin Jinhan <troy.lin@rock-chips.com> |
rk3568: bl32: update version to v2.07
Build from OPTEE commit in develop-next branch:
3167e3733 drivers: rockchip: hal_crypto: mask lockstep interrupt
Update features:
3167e3733 drivers: r
rk3568: bl32: update version to v2.07
Build from OPTEE commit in develop-next branch:
3167e3733 drivers: rockchip: hal_crypto: mask lockstep interrupt
Update features:
3167e3733 drivers: rockchip: hal_crypto: mask lockstep interrupt
01427344d rk3568: support R&W oem ns otp
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I5eebfd3ba3833aab2ae216427683fdef175b20fa
show more ...
|
| 23ca5627 | 26-Jan-2022 |
Hisping Lin <hisping.lin@rock-chips.com> |
rk3588: bl32: update version to v1.07
Build from OPTEE commit in develop-next branch:
9d22c1e96 rk3588: support R&W oem ns otp
Update features:
9d22c1e96 rk3588: support R&W oem ns otp
3
rk3588: bl32: update version to v1.07
Build from OPTEE commit in develop-next branch:
9d22c1e96 rk3588: support R&W oem ns otp
Update features:
9d22c1e96 rk3588: support R&W oem ns otp
3f0f0b052 pta: support check oem otp key is written
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I7fb445fb1202e32ddbbc37cde78ccac79b5e8c32
show more ...
|
| 01c979f7 | 26-Jan-2022 |
Hisping Lin <hisping.lin@rock-chips.com> |
rk3568: bl32: update version to v2.06
Build from OPTEE commit in develop-next branch:
01427344d rk3568: support R&W oem ns otp
Update features:
01427344d rk3568: support R&W oem ns otp
6
rk3568: bl32: update version to v2.06
Build from OPTEE commit in develop-next branch:
01427344d rk3568: support R&W oem ns otp
Update features:
01427344d rk3568: support R&W oem ns otp
631d7ed9a pta: modify secure boot enable flag for rk3568
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I191b2a601143eaec45a686ff757ba860a2f56727
show more ...
|
| aede8bdb | 25-Jan-2022 |
XiaoDong Huang <derrick.huang@rock-chips.com> |
rk3588: bl31: update version to v1.14
Build from ATF commit:
5cc525277 plat: rockchip: rk3588: dmc: set pclk_center_root_sel to 100MHz
update feature:
5cc525277 plat: rockchip: rk3588: dmc:
rk3588: bl31: update version to v1.14
Build from ATF commit:
5cc525277 plat: rockchip: rk3588: dmc: set pclk_center_root_sel to 100MHz
update feature:
5cc525277 plat: rockchip: rk3588: dmc: set pclk_center_root_sel to 100MHz
7a36b2800 plat: rk3588: reset: don't check pmu1grf_os_reg0
990ded4ee plat: rk3588: sleep: clear some pmu register in resume
ac8148b75 plat: rk3588: change macro SLP_ARMOFF_PMUOFF/SLP_FROM_UBOOT
620cebc9f plat: rk3588: disable tsadc_shut_m0 if reboot_cmd=BOOT_BROM_DOWNLOAD
898fdcd8a rockchip: only use plat_uart_base to initialize console
Change-Id: Iaf81ade15a16c76d9626e30f920a003dcbff1a92
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
show more ...
|
| 4d7b4c0a | 21-Jan-2022 |
Wesley Yao <wesley.yao@rock-chips.com> |
rk3326: bl31: update version to v1.26
Build from ATF commit:
12a2070163 plat: px30-s: dram: Disable LPDDR4 CA(except CK CS) ODT of CS1
Update feature:
12a2070163 plat: px30-s: dram: Disable LPDDR4
rk3326: bl31: update version to v1.26
Build from ATF commit:
12a2070163 plat: px30-s: dram: Disable LPDDR4 CA(except CK CS) ODT of CS1
Update feature:
12a2070163 plat: px30-s: dram: Disable LPDDR4 CA(except CK CS) ODT of CS1
f968b05b21 plat: px30-s: dram: Fix value of LPDDR3/LPDDR2 MR3 in cal_ds_odt()
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Ic33a19750036de0b326bf717cf1e8603a4228e30
show more ...
|
| f1ddc055 | 21-Jan-2022 |
Wesley Yao <wesley.yao@rock-chips.com> |
px30: bl31: update version to v1.26
Build from ATF commit:
12a2070163 plat: px30-s: dram: Disable LPDDR4 CA(except CK CS) ODT of CS1
Update feature:
12a2070163 plat: px30-s: dram: Disable LPDDR4 C
px30: bl31: update version to v1.26
Build from ATF commit:
12a2070163 plat: px30-s: dram: Disable LPDDR4 CA(except CK CS) ODT of CS1
Update feature:
12a2070163 plat: px30-s: dram: Disable LPDDR4 CA(except CK CS) ODT of CS1
f968b05b21 plat: px30-s: dram: Fix value of LPDDR3/LPDDR2 MR3 in cal_ds_odt()
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I84f7b76cb95353691bb115d511f1ea3fb26da628
show more ...
|
| 726b6c1f | 18-Jan-2022 |
XiaoDong Huang <derrick.huang@rock-chips.com> |
rk3588: bl31: update version to v1.13
Build from ATF commit:
378cb8595 plat: rockchip: rk3588: dmc: support ddr frequency scan after dmc resume
The ATF code for this version is same with The AT
rk3588: bl31: update version to v1.13
Build from ATF commit:
378cb8595 plat: rockchip: rk3588: dmc: support ddr frequency scan after dmc resume
The ATF code for this version is same with The ATF code for v1.12.
Change-Id: Ibdf3603321ed5155c7623bfcf9b2200a3af45a81
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
show more ...
|
| 8ff1cbf3 | 18-Jan-2022 |
Hisping Lin <hisping.lin@rock-chips.com> |
rk3568: bl32: update version to v2.05
Build from OPTEE commit in develop-next branch:
631d7ed9a pta: modify secure boot enable flag for rk3568
Update features:
631d7ed9a pta: modify secure b
rk3568: bl32: update version to v2.05
Build from OPTEE commit in develop-next branch:
631d7ed9a pta: modify secure boot enable flag for rk3568
Update features:
631d7ed9a pta: modify secure boot enable flag for rk3568
be93c3390 Revert "pta: modify secure boot enable flag length for rk3568"
3f0f0b052 pta: support check oem otp key is written
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I3e8f84e6c20bf452ce486e61f3ac63f64e80239e
show more ...
|
| 4759370e | 18-Jan-2022 |
Liang Chen <cl@rock-chips.com> |
rk3326: bl31: update version to v1.25
Build from ATF commit:
661655f41 plat: px30-s: Avoid DDR phy enter dfi low power
update feature:
661655f41 plat: px30-s: Avoid DDR phy e
rk3326: bl31: update version to v1.25
Build from ATF commit:
661655f41 plat: px30-s: Avoid DDR phy enter dfi low power
update feature:
661655f41 plat: px30-s: Avoid DDR phy enter dfi low power
35395b77a plat: px30-s: Get params of ssmod from dtsi to support dpll ssmod
898a221ec plat: px30s: Support LPDDR2
3f01db333 plat: px30-s: Prefetch DDR_STDBY_BASE and PMU_BASE before ddr freq change
bd02b56fd plat: px30s: ddr: fix tdqs2dq calculate err
942c5527a plat: px30s: ddr: set sr idle en/dis in ddr_set_auto_self_refresh()
6ff7126b5 plat: px30s: ddr: modify to timeout waiting dqs gate train done
0646dc72c plat: px30s: pmu: fix upctl save and recovery err
a1fd805fb plat: px30: pmu: disable ddr clk gate before suspend
d1670dca4 plat: px30s: ddr: modify dqs training default point
47fe4a754 plat: px30s: ddr: enable gate phy training logic clk
59ad9f9b0 plat: px30: sleep: use pmu_debug_sout function
898fdcd8a rockchip: only use plat_uart_base to initialize console
6e2576df1 plat: px30s: sleep: do pvtplls_suspend/pvtplls_resume
Change-Id: I46e198a4b474266210a651534d3e9ef8ceebb0de
Signed-off-by: Liang Chen <cl@rock-chips.com>
show more ...
|
| bc46ca80 | 18-Jan-2022 |
Liang Chen <cl@rock-chips.com> |
px30: bl31: update version to v1.25
Build from ATF commit:
661655f41 plat: px30-s: Avoid DDR phy enter dfi low power
update feature:
661655f41 plat: px30-s: Avoid DDR phy enter dfi low pow
px30: bl31: update version to v1.25
Build from ATF commit:
661655f41 plat: px30-s: Avoid DDR phy enter dfi low power
update feature:
661655f41 plat: px30-s: Avoid DDR phy enter dfi low power
35395b77a plat: px30-s: Get params of ssmod from dtsi to support dpll ssmod
898a221ec plat: px30s: Support LPDDR2
3f01db333 plat: px30-s: Prefetch DDR_STDBY_BASE and PMU_BASE before ddr freq change
bd02b56fd plat: px30s: ddr: fix tdqs2dq calculate err
942c5527a plat: px30s: ddr: set sr idle en/dis in ddr_set_auto_self_refresh()
6ff7126b5 plat: px30s: ddr: modify to timeout waiting dqs gate train done
0646dc72c plat: px30s: pmu: fix upctl save and recovery err
a1fd805fb plat: px30: pmu: disable ddr clk gate before suspend
d1670dca4 plat: px30s: ddr: modify dqs training default point
47fe4a754 plat: px30s: ddr: enable gate phy training logic clk
59ad9f9b0 plat: px30: sleep: use pmu_debug_sout function
898fdcd8a rockchip: only use plat_uart_base to initialize console
6e2576df1 plat: px30s: sleep: do pvtplls_suspend/pvtplls_resume
Change-Id: I9bcabb3ac709a63f78d0a24510296fa9d7aa9d9f
Signed-off-by: Liang Chen <cl@rock-chips.com>
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| 93957875 | 15-Jan-2022 |
XiaoDong Huang <derrick.huang@rock-chips.com> |
rk3588: bl31: update version to v1.12
Build from ATF commit:
f8de35126 plat: rk3588: sleep: do pvtplls_suspend/pvtplls_resume
update feature:
f8de35126 plat: rk3588: sleep: do pvtplls_suspen
rk3588: bl31: update version to v1.12
Build from ATF commit:
f8de35126 plat: rk3588: sleep: do pvtplls_suspend/pvtplls_resume
update feature:
f8de35126 plat: rk3588: sleep: do pvtplls_suspend/pvtplls_resume
83d5ed164 plat: rk3588: sleep: restore some pmugrf registers
7df9da22d plat: rockchip: rk3588: Don't change dsu, gpu and npu rate when suspend
8c6980eee plat: rockchip: rk3588: Add support change length for cpub
17b064e8e plat: rk3588: change to normal pll for cpul and dsu before reset
e77134726 plat: rockchip: rk3588: Change length for cpub 1416MHz
7f3e9680f plat: rockchip: rk3588: Make cpub 400MHz and 600MHz come from gpll
1f4fba30f plat: rockchip: rk3588: dmc: support ddr frequency scan after dmc resume
52f2c3453 plat: rk3588: pull up sleep pin 3~6 by hardware
b5cea4f47 plat: rk3588: sleep: slow down bcore0/1's pclk before retore dsu registers
ad1c15595 plat: rk3588: pull up sleep 3~6 in suspend
bd5d03195 plat: rk3588: support suspend mode config
01aa6c724 plat: rk3588: change pmu1 suspend magic
Change-Id: Ideb33a3e29ff3e36adb6d9e928eaa8afdc823d2e
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
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| db4d6bf2 | 14-Jan-2022 |
xb.wang <xb.wang@rock-chips.com> |
rv1126: tee: update version to v2.04
Build from OPTEE commit in develop-next branch:
3f0f0b0528 pta: support check oem otp key is written
Update features:
3f0f0b0528 pta: support check oem o
rv1126: tee: update version to v2.04
Build from OPTEE commit in develop-next branch:
3f0f0b0528 pta: support check oem otp key is written
Update features:
3f0f0b0528 pta: support check oem otp key is written
9af9076b0b rockchip: sys_ctrl: move sys ctrl code to common/ dir
b3f212d172 drivers: rockchip: hal_crypto: add pd crypto enable for rv1126
Signed-off-by: xb.wang <xb.wang@rock-chips.com>
Change-Id: If055254b1f90393600afe56178b0fdd2944f4690
show more ...
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