rk3568: bl32: update version to v2.03

Build from OPTEE commit in develop-next branch:
48b7c13e2 pta: uboot_storedata_otp: modify parameter check
Update features:
48b7c13e2 pta: uboot_storeda

rk3568: bl32: update version to v2.03

Build from OPTEE commit in develop-next branch:
48b7c13e2 pta: uboot_storedata_otp: modify parameter check
Update features:
48b7c13e2 pta: uboot_storedata_otp: modify parameter check

Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I556ecff6a2fc4c3548abce87a9060f58a55a18c4

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rk3568: bl32: update version to v2.02

Build from OPTEE commit in develop-next branch:
3ef0e4f48 rv1126: otp: not allow 24-byte key
Update features:
65daed964 pta: crypto_service: support oem

rk3568: bl32: update version to v2.02

Build from OPTEE commit in develop-next branch:
3ef0e4f48 rv1126: otp: not allow 24-byte key
Update features:
65daed964 pta: crypto_service: support oem otp key phys cipher
72143b283 rk3568: otp: support write oem otp key
a1cf21a24 rk3568: add OEM cipher keys in otp map

Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: Ib6bad61440f2354fc50895ce3ef37dace2834baa

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rk3568: bl32: update version to v2.01

Build from optee commit in develop-next branch:
f5add58b core: TEE_GenerateKey support RSA key e = 3

Update feature:
93218d76 plat-rockchip: otp: refin

rk3568: bl32: update version to v2.01

Build from optee commit in develop-next branch:
f5add58b core: TEE_GenerateKey support RSA key e = 3

Update feature:
93218d76 plat-rockchip: otp: refine otp map defines
6e7c7880 core: otp: move otp map defines to platform respective file
d103e799 rk3568: otp: initialize clock variables

Test: CtsKeystoreTestCases

Change-Id: If32f0b5610ceae52f7a34b44f8dfc5e77e072f99
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

show more ...

rk3568: bl31: update version to v1.32

Build from ATF commit:
c9a647cae plat: rk3568: dmc: update dcf code to v1.08
update feature:
c9a647cae plat: rk3568: dmc: update dcf code to v1.08
ea2a85a1c

rk3568: bl31: update version to v1.32

Build from ATF commit:
c9a647cae plat: rk3568: dmc: update dcf code to v1.08
update feature:
c9a647cae plat: rk3568: dmc: update dcf code to v1.08
ea2a85a1c rockchip: fix error in plat_mpidr_by_core_pos
109d7d0c3 rockchip: fiq-debugger: put SPSR_EL3 and ELR_EL3 in fiq_dbg_ctx+0x110 and +0x118
16de7aecc plat: rk3568: enable sending bus idle request to BIU_VPU by hardware

Change-Id: I0b0a4f524c6f6af8351b1824d34329c07de5d801
Signed-off-by: Liang Chen <cl@rock-chips.com>

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rk3568: bl31: update version to v1.31

Build from ATF commit:
16de7aecc plat: rk3568: enable sending bus idle request to BIU_VPU by hardware
update feature:
16de7aecc plat: rk3568: enable sending b

rk3568: bl31: update version to v1.31

Build from ATF commit:
16de7aecc plat: rk3568: enable sending bus idle request to BIU_VPU by hardware
update feature:
16de7aecc plat: rk3568: enable sending bus idle request to BIU_VPU by hardware
d89e43deb plat: rk3568: dfs: set dcf to sign-off rate when change ddr frequency
364c6a19b plat: px30: add scmi support
4ea66c757 plat: px30: port code from brach develop-rk3399 to develop-v2.3
84c6e64f0 rockchip: gicv2: add GICV2_G0_FOR_EL3 macro
968422912 rockchip: gicv2: add target_masks initialization
a2580fa7e rockchip: fix compile error for px30
205fc61a6 plat: rockchip: dram: update some common code about dram
d5719f63a plat: rk3568: the suspend clock switch to pvtm/32k_from_io
76228bab3 plat: rk3568: dmc: set ddr clock in phase when suspend

Change-Id: Icbcd89bb686c1cd7fdfc8eb0ad186925d5a1d8f7
Signed-off-by: Liang Chen <cl@rock-chips.com>

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rk3568: bl32: update version to v2.00

Build from optee commit in develop-next branch:
7b427573 rockchip: sip: add share mem page type define

Update feature:
1. Update OP-TEE version to V3.1

rk3568: bl32: update version to v2.00

Build from optee commit in develop-next branch:
7b427573 rockchip: sip: add share mem page type define

Update feature:
1. Update OP-TEE version to V3.13.0
2. Add build user info in boot up log

Change-Id: Icac12851bb18acd672e865c0d6a9e6a3c5cd2335
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

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rk3568: bl31: update version to v1.30

Build from ATF commit:
367a3ffb3 plat: rk3568: dfs: configure the response type in advance
update feature:
367a3ffb3 plat: rk3568: dfs: configure the response

rk3568: bl31: update version to v1.30

Build from ATF commit:
367a3ffb3 plat: rk3568: dfs: configure the response type in advance
update feature:
367a3ffb3 plat: rk3568: dfs: configure the response type in advance

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: If057b6d21da837f67c0539009d8bc3efe6af11c1

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rk3568: bl31: update version to v1.29

Build from ATF commit:
81e0b993a rockchip: amp: support pass boot args0~3
update feature:
81e0b993a rockchip: amp: support pass boot args0~3
509c38d82 plat:

rk3568: bl31: update version to v1.29

Build from ATF commit:
81e0b993a rockchip: amp: support pass boot args0~3
update feature:
81e0b993a rockchip: amp: support pass boot args0~3
509c38d82 plat: rk3568: dmc: support dmc dbg
eeaefb54f plat: rockchip: common: dram: add dram dbg support
88e34fd5f plat: rk3568: fix vsys-low protect reboot when ultra suspend
357d751ea plat: rk3568: add comments for ultra implementation
d5f2fbfeb plat: rk3568: disable time event stream before wfe
06b1a8d87 plat: rk3568: modify ACLK_SECURE_FLASH freq to 297HZ
997b7421f plat: rk3568: support vpu reset
43d60557f (resume-debug) plat: rk3568: use pmusram_reuse secion
0f3c09798 plat: rk3568: define cpu_stop_for_event function in pmusram.
f36ed00ef rockchip: support pmusram_reuse section
53ea26673 plat: rk3568: dmc: update dcf code for add add idle_discrete_port
1fd48d65d rockchip: scmi: clock: adjust code style
4e2a22d37 rockchip: scmi: adjust declaration of some functions
1692ced5c rockchip: scmi: support perf and reset

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I9ff971c8b9837c7e5c9ec14c834e61cd3eb63f1a

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rk3568: bl31: update version to v1.28

Build from ATF commit:
4e725b15f plat: rk3568: adjust pvtpll config
update feature:
4e725b15f plat: rk3568: adjust pvtpll config

Change-Id: I88

rk3568: bl31: update version to v1.28

Build from ATF commit:
4e725b15f plat: rk3568: adjust pvtpll config
update feature:
4e725b15f plat: rk3568: adjust pvtpll config

Change-Id: I88b8e7c898aa78d88d99e2f6c8b574c214284e93
Signed-off-by: Liang Chen <cl@rock-chips.com>

show more ...

rk3568: bl31: update version to v1.27

Build from ATF commit:
ea50cdb22 plat: rk3568: dmc: add idle_rkvdec before disable AXI port
update feature:
ea50cdb22 plat: rk3568: dmc: add idle_rkvdec befor

rk3568: bl31: update version to v1.27

Build from ATF commit:
ea50cdb22 plat: rk3568: dmc: add idle_rkvdec before disable AXI port
update feature:
ea50cdb22 plat: rk3568: dmc: add idle_rkvdec before disable AXI port

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: Id324e9baa530f9b1cfca959525a1aad1149ca679

show more ...

rk3568: bl31: update version to v1.26

Build from ATF commit:
0f7c02de8 plat: rk3568: dump wakeup pin number
update feature:
0f7c02de8 plat: rk3568: dump wakeup pin number
3493ed30b plat: rk3568:

rk3568: bl31: update version to v1.26

Build from ATF commit:
0f7c02de8 plat: rk3568: dump wakeup pin number
update feature:
0f7c02de8 plat: rk3568: dump wakeup pin number
3493ed30b plat: rk3568: add clk_scmi_ddr
fbc892360 plat: rk3568: support virtual poweroff
23bfcc0d6 plat: rk3568: support uboot charge low power mode
7bc959925 plat: rk3568: dmc: update version to V1.01 and add ddr_get_freq_info

Change-Id: I9abcddf815e79fd3615202364ff410571022931d
Signed-off-by: shengfei Xu <xsf@rock-chips.com>

show more ...

rk3568: bl31: update version to v1.25

Build from ATF commit:
bd3bc346f plat: rk3568: select the default suspend 32k clock from the PVTM
update feature:
bd3bc346f plat: rk3568: select the default s

rk3568: bl31: update version to v1.25

Build from ATF commit:
bd3bc346f plat: rk3568: select the default suspend 32k clock from the PVTM
update feature:
bd3bc346f plat: rk3568: select the default suspend 32k clock from the PVTM
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: Ifcf9119cfd26d158a7f0b7c7e2a5d16a8849255f

show more ...

rk3568: bl31: update version to v1.24

Build from ATF commit:
cda1658bc plat: rk3568: config the pmugrf_reset_hold bit
update feature:
cda1658bc plat: rk3568: config the pmugrf_reset_hold bit

Sign

rk3568: bl31: update version to v1.24

Build from ATF commit:
cda1658bc plat: rk3568: config the pmugrf_reset_hold bit
update feature:
cda1658bc plat: rk3568: config the pmugrf_reset_hold bit

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: Iff421e98ab2ab7ebfb6555f254ab6159fd65cb6c

show more ...

rk3568: bl31: update version to v1.23

Build from ATF commit:
c2d509965 plat: rk3568: save and restore PMUCRU_PMUCLKSEL_CON00
update feature:
c2d509965 plat: rk3568: save and restore PMUCRU_PMUCLKS

rk3568: bl31: update version to v1.23

Build from ATF commit:
c2d509965 plat: rk3568: save and restore PMUCRU_PMUCLKSEL_CON00
update feature:
c2d509965 plat: rk3568: save and restore PMUCRU_PMUCLKSEL_CON00
9b05de3a1 plat: rk3568: dump the wakeup irq
270aa3847 plat: rk3568: dmc: rectiyf LPDDR4 MR14 value
4214e1b9b plat: rk3568: correct osc 24M switch logic
6bac5da6d plat: rk3568: dmc: don't power down DDR4 VREF_OUT when suspend
c75f366a6 plat: rk3568: disable GPIO debounce for system suspend
3c3da02d4 plat: rk3568: add comment for easy to backtrack the reason
3876f0dda plat: rk3568: add RK_ENABLE_JTAG configure

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I59ffde2a0fd3fa16411a26d79a6327e5a841a53f

show more ...

rk3568: bl31: update version to v1.22

Build from ATF commit:
6b10c1bb5 plat: rk3568: put status info in ultra_info()
update feature:
6b10c1bb5 plat: rk3568: put status info in ultra_info()
b83481

rk3568: bl31: update version to v1.22

Build from ATF commit:
6b10c1bb5 plat: rk3568: put status info in ultra_info()
update feature:
6b10c1bb5 plat: rk3568: put status info in ultra_info()
b834819eb plat: rk3568: disable pclk_stimer clk when VD_LOGIC keep on
34585499d plat: rk3568: disable gpio2B input_enable for reduce power
dissipation
8104e1d0f plat: rk3568: keep osc 24M on lite sleep only
f191f5d49 plat: rk3568: keep vd_logic on lite sleep only

Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
Change-Id: I7733f5e5b83e1f48b5010917ce7975fdf75e86a7

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rk3568: bl32: update version to v1.05

Build from optee commit in develop-next branch:
0b06ae94 rk3568: change TEE_LOAD_ADDR to 0x08400000

Update feature:
0b06ae94 rk3568: change TEE_LOAD_ADDR to

rk3568: bl32: update version to v1.05

Build from optee commit in develop-next branch:
0b06ae94 rk3568: change TEE_LOAD_ADDR to 0x08400000

Update feature:
0b06ae94 rk3568: change TEE_LOAD_ADDR to 0x08400000
1d4f7cfd rk3568: enlarge TA_RAM from 4M to 12M
eeafddb5 otp: switch OTP R&W func to unified interface

Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
Change-Id: Ib358ac85e8936f5d18bfdfb834ce8073823c92bb

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rk3568: bl32: update version to v1.04

Build from optee commit in develop-next branch:
c38b1925 rk3568: vendor_props: support read seed from vendor props

Update feature:
b2afa116 rk3568: sup

rk3568: bl32: update version to v1.04

Build from optee commit in develop-next branch:
c38b1925 rk3568: vendor_props: support read seed from vendor props

Update feature:
b2afa116 rk3568: support write toybrick seed
786c462f rk3568: support R&W oem otp
be244a17 rk3568: pta: support R&W attribute hash

Change-Id: I25c8fa0da9798fa7929a6e5e70ea33b93725b83a
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

show more ...

rk3568: bl31: update version to v1.21

Build from ATF commit:
ae0d3958f plat: rk3568: adjust npu pvtpll config
update feature:
ae0d3958f plat: rk3568: adjust npu pvtpll config
b86e22653 plat: rk35

rk3568: bl31: update version to v1.21

Build from ATF commit:
ae0d3958f plat: rk3568: adjust npu pvtpll config
update feature:
ae0d3958f plat: rk3568: adjust npu pvtpll config
b86e22653 plat: rk3568: dmc: set ddr clock in phase when suspend
4f2434ad5 plat: rk3568: save/restore the clock gate contol
5803d89e7 plat: rk3568: add core_dbgprcr_pwrdown_wfi() for common
d17c40da3 plat: rk3568: dmc: setting clk_msch_div base on DPLL
405a815fd plat: rk3568: dmc: ignore CRU_DPLL_CON1.dsmpd when dfs
a5f3cd0d1 plat: rk3568: add ddr ecc support

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I5a8cba8784690df13cdf5b471b813b8199175cc6

show more ...

rk3568: bl32: update version to v1.03

Build from optee commit in develop-next branch:
be244a17 rk3568: pta: support R&W attribute hash

Update feature:
55d21464 rk3358: support rk3358 platfo

rk3568: bl32: update version to v1.03

Build from optee commit in develop-next branch:
be244a17 rk3568: pta: support R&W attribute hash

Update feature:
55d21464 rk3358: support rk3358 platform
08bf63e7 rk3568: otp: read ns otp with ecc
e88a188c rk3568: otp: add otp check ecc for read

Change-Id: I55892604c6f65d8a93cefdf02b5b64d46f5bf2ab
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

show more ...

rk3568: bl31: update version to v1.20

Build from ATF commit:
8504c6c97 plat: rk3568: dmc: add 4cs ddr support
update feature:
8504c6c97 plat: rk3568: dmc: add 4cs ddr support
10d61b569 plat: rk35

rk3568: bl31: update version to v1.20

Build from ATF commit:
8504c6c97 plat: rk3568: dmc: add 4cs ddr support
update feature:
8504c6c97 plat: rk3568: dmc: add 4cs ddr support
10d61b569 plat: rk3568: fsp_param add ca_skew

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I1a30f9776d8836e59adb0c82febf7d14876ed58b

show more ...

rk3568: bl31: update version to v1.19

Build from ATF commit:
197265b9d
update feature:
197265b9d
0ae1e09f6 plat: rk3568: adjust gpu pvtpll config
f226684c2 plat: rk3568 ultra: set pm

rk3568: bl31: update version to v1.19

Build from ATF commit:
197265b9d
update feature:
197265b9d
0ae1e09f6 plat: rk3568: adjust gpu pvtpll config
f226684c2 plat: rk3568 ultra: set pmic_sleep none effect after resume
3ae935b36 plat: rk3568: add delay after ldo9(cke) enable
a31e4abc5 plat: rk3568: set pmic_sleep none function before reboot
5cd064225 plat: rk3568: print suspend mode configuration from linux
39f2bca0f plat: rk3568: rename "suspend_mode" to "pm_suspend_mode"
129460bf4 plat: rk3568: add soc sram allocation layout
306f0471b plat: rk3568: correct DDR_RSV0_BASE
cd228aa15 plat: rk3568: make suspend mode configration more clearly
0ff386a7f plat: rk3568: support wakeup when there is a PMIC interrupt
0fad8ae94 rockchip: cpus on: pass ddr data to ddr function
136012da6 tools: rockchip: sync reason.sh from barnch develop-rk3399
3792d2232 rockchip: add decode_bl31.py to get binary from elf
56deb758c make.sh: auto detect platform for sub-command
a1806d357 plat: rk3568: pmu_ultra: Avoid compile error

Change-Id: Ic4d08a99d4ae4fd153439d671b315632344316b8
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

show more ...

rk3568: bl31: update version to v1.18

Build from ATF commit:
10c0222d1 plat: rk3568: not force power up the pll when system resume
update feature:
10c0222d1 plat: rk3568: not force power up

rk3568: bl31: update version to v1.18

Build from ATF commit:
10c0222d1 plat: rk3568: not force power up the pll when system resume
update feature:
10c0222d1 plat: rk3568: not force power up the pll when system resume
1c0dc592e plat: rk3568: support suspend mode config

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I79016cd90140348acad331ac991d577186271fc9

show more ...

rk3568: bl31: update version to v1.17

Build from ATF commit:
b09339b7b rk3568: force cpus into standby mode for pmuv0.
update feature:
b09339b7b rk3568: force cpus into standby mode for pmuv

rk3568: bl31: update version to v1.17

Build from ATF commit:
b09339b7b rk3568: force cpus into standby mode for pmuv0.
update feature:
b09339b7b rk3568: force cpus into standby mode for pmuv0.
aaf064096 plat: rk3568: support cpu suspend.

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I96c95a0cce9ce2d525cee94875db1dc914d8be36

show more ...

rk3568: bl31: update version to v1.16

Build from ATF commit:
28f8bba2b plat: rk3568: adjust cpu pvtpll config
update feature:
28f8bba2b plat: rk3568: adjust cpu pvtpll config
69e2c4ff9 p

rk3568: bl31: update version to v1.16

Build from ATF commit:
28f8bba2b plat: rk3568: adjust cpu pvtpll config
update feature:
28f8bba2b plat: rk3568: adjust cpu pvtpll config
69e2c4ff9 plat: rk3568: fixed the cpu_is_off() about getting cpu pd status

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I64e3023e364c8cf25ee9c223d0d674d74c46b0e2

show more ...

rk3568: bl31: update version to v1.15

Build from ATF commit:
4b88d8295 plat: rk3568: otp: enable ecc
update feature:
4b88d8295 plat: rk3568: otp: enable ecc
2e1358cd7 plat: rk3568: dis/e

rk3568: bl31: update version to v1.15

Build from ATF commit:
4b88d8295 plat: rk3568: otp: enable ecc
update feature:
4b88d8295 plat: rk3568: otp: enable ecc
2e1358cd7 plat: rk3568: dis/en tsadc_shut_m0 function when suspend/resume
86bae7e4d plat: rk3568: config tsadc_shut_m0 pull_down count
a297fdef0 rockchip: add some macros for bit operation.
a4fef9761 rockchip: i2c: clean ipd after r/w
982ae0cb6 rockchip: sip: support AArch64 booting AArch32 kernel
d915f4a4b plat: rockchip: support amp boot.

Change-Id: I43b2615a3053c3b41ec46658a330e296509a333f
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

show more ...