| #
9178b500 |
| 26-Aug-2021 |
Joseph Chen <chenjh@rock-chips.com> |
rk3568: bl31: update version to v2.08
Build from ATF commit: 88e34fd5f plat: rk3568: fix vsys-low protect reboot when ultra suspend update feature: 88e34fd5f plat: rk3568: fix vsys-low prote
rk3568: bl31: update version to v2.08
Build from ATF commit: 88e34fd5f plat: rk3568: fix vsys-low protect reboot when ultra suspend update feature: 88e34fd5f plat: rk3568: fix vsys-low protect reboot when ultra suspend 357d751ea plat: rk3568: add comments for ultra implementation d5f2fbfeb plat: rk3568: disable time event stream before wfe 06b1a8d87 plat: rk3568: modify ACLK_SECURE_FLASH freq to 297HZ 997b7421f plat: rk3568: support vpu reset 43d60557f plat: rk3568: use pmusram_reuse secion 0f3c09798 plat: rk3568: define cpu_stop_for_event function in pmusram. f36ed00ef rockchip: support pmusram_reuse section 53ea26673 plat: rk3568: dmc: update dcf code for add add idle_discrete_port 1fd48d65d rockchip: scmi: clock: adjust code style 4e2a22d37 rockchip: scmi: adjust declaration of some functions 1692ced5c rockchip: scmi: support perf and reset 4e725b15f plat: rk3568: adjust pvtpll config
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I3e0085750f9ad523690b4f82494cdc6928cebaab
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| #
bc186e2b |
| 15-Jul-2021 |
Liang Chen <cl@rock-chips.com> |
rk3568: bl31 ultra: update version to v2.07
Build from ATF commit: 4e725b15f plat: rk3568: adjust pvtpll config update feature: 4e725b15f plat: rk3568: adjust pvtpll config e
rk3568: bl31 ultra: update version to v2.07
Build from ATF commit: 4e725b15f plat: rk3568: adjust pvtpll config update feature: 4e725b15f plat: rk3568: adjust pvtpll config ea50cdb22 plat: rk3568: dmc: add idle_rkvdec before disable AXI port
Change-Id: I422733d757846a23cf62e6c90d1c0b545c7e90ec Signed-off-by: Liang Chen <cl@rock-chips.com>
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| #
6184cbf5 |
| 09-Jul-2021 |
Joseph Chen <chenjh@rock-chips.com> |
rk3568: bl31 ultra: update version to v2.06
Build from ATF commit: 2f70923a2 plat: rk3568: clean all ipd before starting the transfer update feature: 2f70923a2 plat: rk3568: clean all ipd be
rk3568: bl31 ultra: update version to v2.06
Build from ATF commit: 2f70923a2 plat: rk3568: clean all ipd before starting the transfer update feature: 2f70923a2 plat: rk3568: clean all ipd before starting the transfer 53499c5e6 plat: rk3568: rk_i2c_uninit has been called by the next i2c operation 05988ebe1 plat: rockchip: common: add share mem page type define 4c2797c7e plat: rk3568: dmc: fix RX Vref calc err when updata drv odt 0f7c02de8 plat: rk3568: dump wakeup pin number 3493ed30b plat: rk3568: add clk_scmi_ddr fbc892360 plat: rk3568: support virtual poweroff 23bfcc0d6 plat: rk3568: support uboot charge low power mode 7bc959925 plat: rk3568: dmc: update version to V1.01 and add ddr_get_freq_info
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: Ic730290cde7f9b230c88cf2461bb976b85f5c46c
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| #
feb5aa08 |
| 08-Jun-2021 |
Joseph Chen <chenjh@rock-chips.com> |
rk3568: bl31 ultra: update version to v2.05
Build from ATF commit: 7bc959925 plat: rk3568: dmc: update version to V1.01 and add ddr_get_freq_info update feature: 7bc959925 plat: rk3568: dmc:
rk3568: bl31 ultra: update version to v2.05
Build from ATF commit: 7bc959925 plat: rk3568: dmc: update version to V1.01 and add ddr_get_freq_info update feature: 7bc959925 plat: rk3568: dmc: update version to V1.01 and add ddr_get_freq_info d2e0ef53d plat: rk3568: select the default suspend 32k clock from the PVTM f8297ce88 rockchip_exceptions: adjust the usage of uartdbg_uart_info.tgt_cpu d053a1087 rockchip: fiq debugger: don't disable fiq if fiq from el2 354236216 rockchip_exceptions: save/restore el2 register if fiq-debugger from el2 02bab0c8f BACKPORT: lib: el3_runtime: Fix SPE system registers in el2_sysregs_context 2c7c36d92 plat: rk3568: support cache ecc. cda1658bc plat: rk3568: config the pmugrf_reset_hold bit c2d509965 plat: rk3568: save and restore PMUCRU_PMUCLKSEL_CON00 9b05de3a1 plat: rk3568: dump the wakeup irq 270aa3847 plat: rk3568: dmc: rectiyf LPDDR4 MR14 value
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I3e00968594fae0ceed781dbc130157b6d114cf76
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| #
22b0d3f6 |
| 18-May-2021 |
Joseph Chen <chenjh@rock-chips.com> |
rk3568: bl31 ultra: update version to v2.04
Build from ATF commit: 270aa3847 plat: rk3568: dmc: rectiyf LPDDR4 MR14 value update feature: 270aa3847 plat: rk3568: dmc: rectiyf LPDDR4 MR14 val
rk3568: bl31 ultra: update version to v2.04
Build from ATF commit: 270aa3847 plat: rk3568: dmc: rectiyf LPDDR4 MR14 value update feature: 270aa3847 plat: rk3568: dmc: rectiyf LPDDR4 MR14 value 4214e1b9b plat: rk3568: correct osc 24M switch logic 6bac5da6d plat: rk3568: dmc: don't power down DDR4 VREF_OUT when suspend c75f366a6 plat: rk3568: disable GPIO debounce for system suspend 3c3da02d4 plat: rk3568: add comment for easy to backtrack the reason 3876f0dda plat: rk3568: add RK_ENABLE_JTAG configure 6b10c1bb5 plat: rk3568: put status info in ultra_info()
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: Iff7291034744a0cd263b4c82531a7262921fae6e
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| #
2937f64c |
| 07-May-2021 |
Elon Zhang <zhangzj@rock-chips.com> |
rk3568: bl32: update version to v1.05
Build from optee commit in develop-next branch: 0b06ae94 rk3568: change TEE_LOAD_ADDR to 0x08400000
Update feature: 0b06ae94 rk3568: change TEE_LOAD_ADDR to
rk3568: bl32: update version to v1.05
Build from optee commit in develop-next branch: 0b06ae94 rk3568: change TEE_LOAD_ADDR to 0x08400000
Update feature: 0b06ae94 rk3568: change TEE_LOAD_ADDR to 0x08400000 1d4f7cfd rk3568: enlarge TA_RAM from 4M to 12M eeafddb5 otp: switch OTP R&W func to unified interface
Signed-off-by: Elon Zhang <zhangzj@rock-chips.com> Change-Id: Ib358ac85e8936f5d18bfdfb834ce8073823c92bb
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| #
3681c3b8 |
| 08-May-2021 |
Joseph Chen <chenjh@rock-chips.com> |
rk3568: bl31 ultra: update version to v2.03
Build from: 6b10c1bb5 plat: rk3568: put status info in ultra_info()
Update features: 6b10c1bb5 plat: rk3568: put status info in ultra_info() b834819eb
rk3568: bl31 ultra: update version to v2.03
Build from: 6b10c1bb5 plat: rk3568: put status info in ultra_info()
Update features: 6b10c1bb5 plat: rk3568: put status info in ultra_info() b834819eb plat: rk3568: disable pclk_stimer clk when VD_LOGIC keep on 34585499d plat: rk3568: disable gpio2B input_enable for reduce power dissipation 8104e1d0f plat: rk3568: keep osc 24M on lite sleep only f191f5d49 plat: rk3568: keep vd_logic on lite sleep only ae0d3958f plat: rk3568: adjust npu pvtpll config b86e22653 plat: rk3568: dmc: set ddr clock in phase when suspend 4f2434ad5 plat: rk3568: save/restore the clock gate contol 5803d89e7 plat: rk3568: add core_dbgprcr_pwrdown_wfi() for common d17c40da3 plat: rk3568: dmc: setting clk_msch_div base on DPLL 405a815fd plat: rk3568: dmc: ignore CRU_DPLL_CON1.dsmpd when dfs a5f3cd0d1 plat: rk3568: add ddr ecc support 1e9739b4e plat: rk3568: fix typo
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I36c4f37e80520556eaf04dd105e971de8e1ab2d6
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| #
4dcabc8a |
| 16-Apr-2021 |
Hisping Lin <hisping.lin@rock-chips.com> |
rk3568: bl32: update version to v1.04
Build from optee commit in develop-next branch: c38b1925 rk3568: vendor_props: support read seed from vendor props
Update feature: b2afa116 rk3568: sup
rk3568: bl32: update version to v1.04
Build from optee commit in develop-next branch: c38b1925 rk3568: vendor_props: support read seed from vendor props
Update feature: b2afa116 rk3568: support write toybrick seed 786c462f rk3568: support R&W oem otp be244a17 rk3568: pta: support R&W attribute hash
Change-Id: I25c8fa0da9798fa7929a6e5e70ea33b93725b83a Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
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| #
dbe5b629 |
| 30-Mar-2021 |
Hisping Lin <hisping.lin@rock-chips.com> |
rk3568: bl32: update version to v1.03
Build from optee commit in develop-next branch: be244a17 rk3568: pta: support R&W attribute hash
Update feature: 55d21464 rk3358: support rk3358 platfo
rk3568: bl32: update version to v1.03
Build from optee commit in develop-next branch: be244a17 rk3568: pta: support R&W attribute hash
Update feature: 55d21464 rk3358: support rk3358 platform 08bf63e7 rk3568: otp: read ns otp with ecc e88a188c rk3568: otp: add otp check ecc for read
Change-Id: I55892604c6f65d8a93cefdf02b5b64d46f5bf2ab Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
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| #
41544c30 |
| 27-Mar-2021 |
Joseph Chen <chenjh@rock-chips.com> |
rk3568: bl31 ultra: update version to v2.02
Build from: c85f7a8e8 plat: rk3568: scmi clock: validate the rate to be set
Update feature: c85f7a8e8 plat: rk3568: scmi clock: validate the rate to be
rk3568: bl31 ultra: update version to v2.02
Build from: c85f7a8e8 plat: rk3568: scmi clock: validate the rate to be set
Update feature: c85f7a8e8 plat: rk3568: scmi clock: validate the rate to be set 280b15cfe plat: rk3568: remove dsb() loop on rockchip_uart_debug_init()
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I849dc42265f18c77c007050db50bf22648d2c7c9
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| #
3e9ae10c |
| 12-Mar-2021 |
Joseph Chen <chenjh@rock-chips.com> |
rk3568: bl31 ultra: update version to v2.01
Build from: f226684c2 plat: rk3568 ultra: set pmic_sleep none effect after resume
Update feature: f226684c2 plat: rk3568 ultra: set pmic_sleep none eff
rk3568: bl31 ultra: update version to v2.01
Build from: f226684c2 plat: rk3568 ultra: set pmic_sleep none effect after resume
Update feature: f226684c2 plat: rk3568 ultra: set pmic_sleep none effect after resume
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: If6e79096d581776aea5d3a72ee451099fc241440
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| #
0ef03fe5 |
| 08-Mar-2021 |
Joseph Chen <chenjh@rock-chips.com> |
rk3568: bl31 ultra: update version to v2.00
Build from: b6cfa0bb2
Update feature: 1. fix reboot issue; 2. add delay after ldo9(cke) enable, before wfi 3. support "rockchip_suspend" configure fro
rk3568: bl31 ultra: update version to v2.00
Build from: b6cfa0bb2
Update feature: 1. fix reboot issue; 2. add delay after ldo9(cke) enable, before wfi 3. support "rockchip_suspend" configure from linux 4. fix can't wakeup because of PMIC interrupt occur
Note: initial version with full and stable state for ultra support
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I6cce5b02edeb2f1f74d61990ad3db3069ed719c7
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| #
e3f821d8 |
| 21-Feb-2021 |
Joseph Chen <chenjh@rock-chips.com> |
rk3568 bl31 ultra: update version to v1.05
version string: "v2.3():v2.3-79-ge623dbfa1:chenjh"
- add debug msg for pll resume - add 20ms delay before power off soc - print entry: "UUUUUUUU" - add de
rk3568 bl31 ultra: update version to v1.05
version string: "v2.3():v2.3-79-ge623dbfa1:chenjh"
- add debug msg for pll resume - add 20ms delay before power off soc - print entry: "UUUUUUUU" - add debug msg for dfs
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I2b5d0446176fdd9f46471ee5967462bbe6881eec
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| #
88dcde34 |
| 07-Feb-2021 |
Joseph Chen <chenjh@rock-chips.com> |
rk3568: bl31 ultra: update version to v1.04
Build from: a4fef9761 rockchip: i2c: clean ipd after r/w
Update feature: a4fef9761 rockchip: i2c: clean ipd after r/w 982ae0cb6 rockchip: sip: support
rk3568: bl31 ultra: update version to v1.04
Build from: a4fef9761 rockchip: i2c: clean ipd after r/w
Update feature: a4fef9761 rockchip: i2c: clean ipd after r/w 982ae0cb6 rockchip: sip: support AArch64 booting AArch32 kernel d915f4a4b plat: rockchip: support amp boot. 42a743eb1 plat: rk3568: dmc: fix the issue about ddr suspend/resume 390190d14 plat: rk3568: dmc: save and restore byte4 de-skew for ECC 456bf4b41 plat: rk3568: dmc: update dcf code to fix code mistake
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I23ec03b17fae92b27070a394162c6a3b3f415c31
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| #
d7db799c |
| 04-Feb-2021 |
Joseph Chen <chenjh@rock-chips.com> |
rk3568: bl31 ultra: update version to v1.03
Build from: 459f65721 plat: rk3568: update suspend/resume message
Update feature: 1. add more suspend/resume message 2. fix system reset issue due to
rk3568: bl31 ultra: update version to v1.03
Build from: 459f65721 plat: rk3568: update suspend/resume message
Update feature: 1. add more suspend/resume message 2. fix system reset issue due to pvtplls
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I9e35b9e68c5b63961b4155badd46e34f9bee621d
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| #
f34d1eba |
| 04-Feb-2021 |
Hisping Lin <hisping.lin@rock-chips.com> |
rk3568: bl32: update version to v1.02
Build from optee commit in develop-next branch: 2b112e40 rk3568: otp: remove otp boot code from otp init
Update feature: 2c700b62 core: Add support for
rk3568: bl32: update version to v1.02
Build from optee commit in develop-next branch: 2b112e40 rk3568: otp: remove otp boot code from otp init
Update feature: 2c700b62 core: Add support for multi-threaded MPIDR values 68113cdd rk3326: modify TA and Share memory size 573c7454 rk3568: enable CFG_RK_UBOOT_STORE
Change-Id: I7c25e8623cbdb165e4243c0249a86d4f4050fc5a Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
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| #
cb49ca5e |
| 27-Jan-2021 |
Joseph Chen <chenjh@rock-chips.com> |
rk3568: bl31 ultra: update version to v1.02
Build from: d15096265 plat: rk3568: add suspend flow order character
Update feature: d15096265 plat: rk3568: add suspend flow order character 42b75bb1
rk3568: bl31 ultra: update version to v1.02
Build from: d15096265 plat: rk3568: add suspend flow order character
Update feature: d15096265 plat: rk3568: add suspend flow order character 42b75bb1c plat: rk3568: remove legacy rockchip version abc2febf0 plat: rockchip: add a function to set sp for rockchip bl31 entrypoint. fbec16fe0 plat: rk3568: dmc: disable zqcalib to saving power 61d1f55c5 plat: rk3568: dmc: add support ddr auto sr always on bf2380d93 plat: rk3568: add the share mem and set it with MT_DEVICE. f38b7c01a plat: rk3568: fix compiler error if RK_ULTRA_SUSPEND=0
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I136f0a5d81e3a69886f5045b0c684e371c1f3ef3
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| #
76074cfc |
| 27-Jan-2021 |
Joseph Chen <chenjh@rock-chips.com> |
rk3568: rename RK3568TRUST_ULTRA.ini -> RK3566TRUST_ULTRA.ini
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: Idb3026b58664c24d7ec4b6d9035bf274e401fa93
|