| 5141960b | 01-Sep-2016 |
Jason Song <sxj@rock-chips.com> |
px5: update PX5MINIALL.ini version
Change-Id: I8c163744bb79f9c3ff14c90316a6eff9831f4786 Signed-off-by: Jason Song <sxj@rock-chips.com> |
| a48fdd47 | 30-Aug-2016 |
William Zhang <william.zhang@rock-chips.com> |
rk322x: MiniLoader update to V2.32
Support soft sign 1024bits RSA key only
Change-Id: Ie1e9aaf6cbe362e1c9e4739ce44bd2548b97bd59 Signed-off-by: William Zhang <william.zhang@rock-chips.com> |
| c9c4655c | 31-Aug-2016 |
Jason Song <sxj@rock-chips.com> |
px5: add init config for px5 chip.
compile cmd:
make px5_defconfig make ARCHV=aarch64
ini, must modify this two file:
tools/rk_tools/RKBOOT/PX5MINIALL.ini tools/rk_tools/RKTRUST/PX5TRUST.ini
Cha
px5: add init config for px5 chip.
compile cmd:
make px5_defconfig make ARCHV=aarch64
ini, must modify this two file:
tools/rk_tools/RKBOOT/PX5MINIALL.ini tools/rk_tools/RKTRUST/PX5TRUST.ini
Change-Id: I81250ebc3b49b59cff64a05f86d7ed19a13a6a7d Signed-off-by: Jason Song <sxj@rock-chips.com>
show more ...
|
| 0ebdeb8e | 25-Aug-2016 |
Tang Yun ping <typ@rock-chips.com> |
rk3399: ddr: update ddr init bin version to v1.05
Amend msch ddrconfig register write error and make sure row numbers configure in msch is equal to row numbers configure in ddr controller
Change-Id
rk3399: ddr: update ddr init bin version to v1.05
Amend msch ddrconfig register write error and make sure row numbers configure in msch is equal to row numbers configure in ddr controller
Change-Id: I03f673075ffc68f177a65e08a50896144eda1b4b Signed-off-by: Tang Yun ping <typ@rock-chips.com>
show more ...
|
| cea4976d | 16-Aug-2016 |
Tang Yun ping <typ@rock-chips.com> |
rk3368: ddr: ddr init code update to v1.18
ddr init code update to v1.18 to supporting px5
Change-Id: I7b00188711d08c735809376a0511cd728566f30c Signed-off-by: Tang Yun ping <typ@rock-chips.com> |
| ed4c4667 | 16-Aug-2016 |
chenfen <chenfen@rock-chips.com> |
3368:minloader: add PX5 support
Change-Id: Ifd2cf9ab71176a9a22fcbe05e34c5a623ac0eacf Signed-off-by: chenfen <chenfen@rock-chips.com> |
| 9c5bf7a6 | 03-Aug-2016 |
Hecanyang <hcy@rock-chips.com> |
RK3288: DDR: DDR Version 1.01 20160803
All DRAM type init frequency increase to 400MHz, because some type of screen display gilitter before kernel set DDR rate to high frequency.
Change-Id: I519b60
RK3288: DDR: DDR Version 1.01 20160803
All DRAM type init frequency increase to 400MHz, because some type of screen display gilitter before kernel set DDR rate to high frequency.
Change-Id: I519b606db92e10ae6807efecf361fe2379cbf28d Signed-off-by: Hecanyang <hcy@rock-chips.com>
show more ...
|
| 65fcf677 | 27-Jul-2016 |
Hecanyang <hcy@rock-chips.com> |
RK3399: ddr: update ddr init bin version to v1.04
1. enable lpddr4 mask write 2. support only one channel
Change-Id: I64eec491abb35203d8055c8dffa111bcfdb1a710 Signed-off-by: Hecanyang <hcy@rock-chi
RK3399: ddr: update ddr init bin version to v1.04
1. enable lpddr4 mask write 2. support only one channel
Change-Id: I64eec491abb35203d8055c8dffa111bcfdb1a710 Signed-off-by: Hecanyang <hcy@rock-chips.com>
show more ...
|
| 92b06cf5 | 26-Jul-2016 |
Tang Yun ping <typ@rock-chips.com> |
RK3399: ddr: update ddr init bin version to v1.03
1. support lpddr4. 2. ajdust phy vref value when enable soc odt.
Change-Id: I8ea02f6079c487f75f513fb3db7677d4550d485b Signed-off-by: Tang Yun ping
RK3399: ddr: update ddr init bin version to v1.03
1. support lpddr4. 2. ajdust phy vref value when enable soc odt.
Change-Id: I8ea02f6079c487f75f513fb3db7677d4550d485b Signed-off-by: Tang Yun ping <typ@rock-chips.com>
show more ...
|
| 2128cee0 | 14-Jul-2016 |
chenfen <chenfen@rock-chips.com> |
rk3368 miniloader and usbplug support PX5
Change-Id: I4823e8aaa7ade88db4b9f559b99d87a026249ce4 Signed-off-by: chenfen <chenfen@rock-chips.com> |
| 2783e526 | 14-Jul-2016 |
chenfen <chenfen@rock-chips.com> |
rk3399 miniloader and usbplug fix box update fail
Change-Id: I62272cefa58211b4cff04467f728032f6e3d7837 Signed-off-by: chenfen <chenfen@rock-chips.com> |
| 723d6e77 | 23-Jun-2016 |
cwz <cwz@rock-chips.com> |
rk3366: enable merge miniloader when build.
rk3366miniloaderall: v1.02, ddr version: 20160624.
Change-Id: I31f2e9e3dedc13503b6e10effb470cd2cdb32ff5 Signed-off-by: cwz <cwz@rock-chips.com> |
| ff61d300 | 23-Jun-2016 |
cwz <cwz@rock-chips.com> |
rk3399: enable merge miniloader when build.
rk3399miniloaderall version 1.04, ddr version: v1.00 666M.
Change-Id: I9489d36096dce881176626be3bf705103afead89 Signed-off-by: cwz <cwz@rock-chips.com> |
| 5b275a99 | 30-May-2016 |
Hecanyang <hcy@rock-chips.com> |
ddr: DDR Version 1.00 20160530
2GB/1cs per channel, ddr init error. fix this bug to support 2GB/1cs per channel. 2GB/1cs that is: row=16, col=10, bank=3, bw=2, cs=1
Change-Id: I222d1615d3df2c01312a
ddr: DDR Version 1.00 20160530
2GB/1cs per channel, ddr init error. fix this bug to support 2GB/1cs per channel. 2GB/1cs that is: row=16, col=10, bank=3, bw=2, cs=1
Change-Id: I222d1615d3df2c01312a04e5e0beab96fc1c2354 Signed-off-by: Hecanyang <hcy@rock-chips.com>
show more ...
|
| e30f3673 | 23-May-2016 |
Hecanyang <hcy@rock-chips.com> |
DDR: DDR Version 1.00 20160523
customer find 4GB LPDDR3 performance is poor than 2GB, after analyse, we find the reason is: 4GB just select a more low power setting, but it effect the performance. s
DDR: DDR Version 1.00 20160523
customer find 4GB LPDDR3 performance is poor than 2GB, after analyse, we find the reason is: 4GB just select a more low power setting, but it effect the performance. so this version we just select the more performance setting, no longer select the more low power setting.
Change-Id: I8899d19d6b8456e6a67f3cccbfbdd27c31b821f9 Signed-off-by: Hecanyang <hcy@rock-chips.com>
show more ...
|
| fede51e3 | 13-May-2016 |
Tang Yun ping <typ@rock-chips.com> |
RK3368: DDR: ddr init bin update
ddr init bin update to version 1.17 20160513 to fix bug about 4GB dram detect fail.
Change-Id: Ib1ddc6409cda1040f4e8dd37ac8f0433ea2c217d Signed-off-by: Tang Yun pin
RK3368: DDR: ddr init bin update
ddr init bin update to version 1.17 20160513 to fix bug about 4GB dram detect fail.
Change-Id: Ib1ddc6409cda1040f4e8dd37ac8f0433ea2c217d Signed-off-by: Tang Yun ping <typ@rock-chips.com>
show more ...
|
| 5d30ce7c | 05-May-2016 |
Tang Yun ping <typ@rock-chips.com> |
Rk322x: ddr: update ddr init code version to v1.04
ddr init code version update to v1.04 20160505. This update including 1.supporting 16bit bandwidth. 2.fix bug to supporting 8Gb dram.
Change-Id: I
Rk322x: ddr: update ddr init code version to v1.04
ddr init code version update to v1.04 20160505. This update including 1.supporting 16bit bandwidth. 2.fix bug to supporting 8Gb dram.
Change-Id: I10ef22722d152b0e0e14855969d9df21b168b599 Signed-off-by: Tang Yun ping <typ@rock-chips.com>
show more ...
|
| 1666df54 | 25-Mar-2016 |
Zhaoyifeng <zyf@rock-chips.com> |
rk3288: nand: fix sandisk flash upgrade problems
Change-Id: I7a17fb78d56c3866ef22a79c7aaf96f152ad3e6e Signed-off-by: Zhaoyifeng <zyf@rock-chips.com> |
| 666aaae0 | 11-Mar-2016 |
Zhaoyifeng <zyf@rock-chips.com> |
322x: miniloader: support toshiba 15nm 4GB nand flash
Change-Id: I932ecda0fc4dea301edfbb8b281b41653c9a7d89 Signed-off-by: Zhaoyifeng <zyf@rock-chips.com> |
| cdd879b3 | 11-Mar-2016 |
Zhaoyifeng <zyf@rock-chips.com> |
312x: miniloader: support toshiba 15nm 4GB nand
Change-Id: I1b346242a4370faec0171162de0c4dd9414a58d2 Signed-off-by: Zhaoyifeng <zyf@rock-chips.com> |
| 610e86cd | 18-Feb-2016 |
Zhaoyifeng <zyf@rock-chips.com> |
3288: usbplug: select general pll clock for emmc
Change-Id: I39796a4efb0c8d69a8159f2e0b816d92cd0d9f15 Signed-off-by: Zhaoyifeng <zyf@rock-chips.com> |
| ce1a8497 | 17-Feb-2016 |
Hecanyang <hcy@rock-chips.com> |
rk3288: ddr: support 3GB(8Gb+4Gb * 2channel)
by now, all supported 3GB include (1)cha: 6Gb/cs0 + 6Gb/cs1 chb: 6Gb/cs0 + 6Gb/cs1 (2)cha: 12Gb/cs0 chb: 12Gb/cs0 (3)cha: 8Gb/cs0 +
rk3288: ddr: support 3GB(8Gb+4Gb * 2channel)
by now, all supported 3GB include (1)cha: 6Gb/cs0 + 6Gb/cs1 chb: 6Gb/cs0 + 6Gb/cs1 (2)cha: 12Gb/cs0 chb: 12Gb/cs0 (3)cha: 8Gb/cs0 + 4Gb/cs1 chb: 8Gb/cs0 + 4Gb/cs1 (4)cha: 16Gb/cs0 chb: 8Gb/cs0 (5)cha: 16Gb/cs0 chb: 4Gb/cs0 + 4Gb/cs1 (6)cha: 8Gb/cs0 + 8Gb/cs1 chb: 8Gb/cs0 (7)cha: 8Gb/cs0 + 8Gb/cs1 chb: 4Gb/cs0 + 4Gb/cs1
Change-Id: If12e84795ba2c1898e38202a27d660b02eed73bb Signed-off-by: Hecanyang <hcy@rock-chips.com>
show more ...
|
| c33d533a | 03-Feb-2016 |
chenfen <chenfen@rock-chips.com> |
3368:minloader: add 1024 RSA signature support.
Change-Id: I45558b87f9c97acd8f52845dcb15abcfbf96fbf4 Signed-off-by: chenfen <chenfen@rock-chips.com> |
| 4c6ab128 | 26-Jan-2016 |
chenfen <chenfen@rock-chips.com> |
3368:minloader: add RSA256 for uboot and fix SHA256 byteswap.
Change-Id: I7563561054cf2b5e7e053ed71d08127f0321fff3 Signed-off-by: chenfen <chenfen@rock-chips.com> |
| f9ede9c5 | 22-Jan-2016 |
Zhaoyifeng <zyf@rock-chips.com> |
3228: miniloader: fix secure boot fail issue.
Change-Id: Ic208647054ec7cc5fd6d5856eed0381154b7f387 Signed-off-by: Zhaoyifeng <zyf@rock-chips.com> |