rv1103c: add RV1103BMINIALL_FASTBOOT_SPI_NOR_SPI_NAND.ini

Signed-off-by: Jian zheng <zj@rock-chips.com>
Change-Id: I447e74ed26ed2a6d8200a780af2ff359a44b7d1b

rv1103b: RKBOOT: rename RV1103BMINIALL_SPI_NOR_SPI_NAND_TB.ini

Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: If453c7ca5f5704526f418a623a645c715ad29de4

rv1103b: RKBOOT: add RV1103BMINIALL_FASTBOOT_EMMC.ini

Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I2dcf3ecbbf59b654dc534016b08fdc1bd239fcf0

rv1103b: RKBOOT: add RV1103BMINIALL_EMMC_TB.ini

Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I06a664b3cdf57816d5cefd986bda49174f029ccc

rk3036: ddr: ddr init code update to v1.10

form commit:
25df035 rk3036: ddr: update to 20240801 fwver v1.10

update feature:
e4dcdd3 rk3036: ddr: fix ddr2 wr odt latency err
8defd12 rk3036: ddr:

rk3036: ddr: ddr init code update to v1.10

form commit:
25df035 rk3036: ddr: update to 20240801 fwver v1.10

update feature:
e4dcdd3 rk3036: ddr: fix ddr2 wr odt latency err
8defd12 rk3036: ddr: fix bw 16 detect err
ccdeab7 rk3036: ddr: add support x8 bw
c8250c7 rk3036: ddr: add PLL power down and up

Change-Id: I8e130a75dfda023beb1be6add001fb1c341ed5ce
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

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rv1103B: RKBOOT: add RV1103BMINIALL_UART0M2_SPI_NOR_SPI_NAND.ini

Signed-off-by: Jkand Huang <jkand.huang@rock-chips.com>
Change-Id: Id61fb6b411fc8bd26089c45ce3dde6719e37bb66

rk3576: ddr: Update to v1.06 20240727

Build from:
a6303af65c dram_init: rk3576: Updata to v1.06

Update feature:
1f4bed6cd5 dram_init: dram_scan_eye: Add JEDEC Rx Mask for scan_eye
460fd2cd00 dri

rk3576: ddr: Update to v1.06 20240727

Build from:
a6303af65c dram_init: rk3576: Updata to v1.06

Update feature:
1f4bed6cd5 dram_init: dram_scan_eye: Add JEDEC Rx Mask for scan_eye
460fd2cd00 drivers: ram: rk3576: Use read_training to do rd_dqs_vref_training
61434c2f84 dram_init: rk3576: set PMU1_GRF_SOC_CON7.uart0rx_low_dly to 1 second
c7e65f408b dram_init: rk3576: ultra suspend support mixed package
376adcf740 drivers: ram: sdram_rk3588: Support mixed package
849f6ada3e dram_init: rk3576: ultra suspend: clear PMIC PWRCTRL1_FUN
9b8791b013 dram_init: common: poll USR.trans_fifo_not_full in uart_write

Change-Id: I877fcb6296dc097e2bbd42c61fb34bada05e5c75
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>

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rv1103b: ddr/spl/usbplug/mcu: Add initial version

== ddr v1.02
build from:
1b742cd9d6 dram_init: rv1103b: Update to v1.02
update feature:
51afcca2a0 dram_init: rv1103b: modify uart baudrate

rv1103b: ddr/spl/usbplug/mcu: Add initial version

== ddr v1.02
build from:
1b742cd9d6 dram_init: rv1103b: Update to v1.02
update feature:
51afcca2a0 dram_init: rv1103b: modify uart baudrate
4391b15f69 dram_init: rv1103b: add support DDR2 burst length 4
0b0c03b84a dram_init: rk2118: modify trfc if frequency is less than 400MHz

== spl v1.00
build from:
3687236ab1c spi: rockchip_sfc: Support sclk_x2_bypass

== usbplug v1.00
Build from:
c53c564 src: platform: rv1103b: modify chip name to RV110E

== rv1103b: Add UART0_M2_SPI_NOR_TB configuration

== rv1103b_mcu_tb_v1.00.bin:
build from commit:
rtt:3143c22c#hal:939ec3d5#battery_ipc:06ccc158

build from rt-thread commit in develop branch:
3143c22c: project: rv1103b-mcu: add mkimage.sh

build from hal commit in for-fpga branch:
939ec3d5: project: rk3506-mcu: Remove unneed code and switch to UART4

build from battery-ipc commit in master branch:
06ccc15: first frame params config for 1103b

Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Signed-off-by: Su Yuefu <yuefu.su@rock-chips.com>
Change-Id: I7ab3c5531b6efa445f672b37f8a52a25f27bbced

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rk3506: ddr/spl/usbplug/tee: Add initial version

== ddr v1.00
Build from:
8bd2e95bb9 rk3506: ddr: update ddrbin to v1.00

== spl v1.00
Build from:
c80444b1e9a TEMP: Disable sd card for rk3506

==

rk3506: ddr/spl/usbplug/tee: Add initial version

== ddr v1.00
Build from:
8bd2e95bb9 rk3506: ddr: update ddrbin to v1.00

== spl v1.00
Build from:
c80444b1e9a TEMP: Disable sd card for rk3506

== usbplug v1.00
Build from:
b9b1493 src: platform: rk3506: fix emmc clock error.

== tee v1.00
Build from:
1bfd9b50333 scripts: build_optee_os: Add FW_VERSION_PRINT

Change-Id: I84f22433390e818f47bd7496a40b6d44c0bce48a
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>

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rk3528: ddr: update ddrbin to v1.10

build from:
44ec2e0a51 dram_init: rk3528: Update to v1.10

update feature:
50ac41ccf3 rk356x: ddr: fix osreg encode bug
2a8512e9eb rk356x: add Manufacturer ID

rk3528: ddr: update ddrbin to v1.10

build from:
44ec2e0a51 dram_init: rk3528: Update to v1.10

update feature:
50ac41ccf3 rk356x: ddr: fix osreg encode bug
2a8512e9eb rk356x: add Manufacturer ID print
0cebc08d48 rk356x: ddr: disable vref training below 600MHz
063d9bffdd DDR4: spec: enable MR2.LPASR saving self-refresh power

Change-Id: I65425646382782a7689b3769e7c1b303df4c84b3
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

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rk3562: ddr: update ddrbin to v1.06

build from:
a2efbe6ac4 dram: adjust version format

build command:
./make.sh rk3562

update feature:
1. fix probabilistic read/write training failures under DD

rk3562: ddr: update ddrbin to v1.06

build from:
a2efbe6ac4 dram: adjust version format

build command:
./make.sh rk3562

update feature:
1. fix probabilistic read/write training failures under DDR4 2cs
introduced in ddrbin v1.06
2. Undo vref training below 600MHz
3. The CLK/DQS slew rate supports different values at high and low frequencies.
4. Added DRAM Manufacturer ID printing.
5. DDR4 enable LPASR to reduce DDR4 self-refresh power.

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I405a7505d81df18baea2abf8abcd8d2d9ce5785a

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rk3568: ddr: update ddrbin to v1.22

build from:
f8ac117e9c rk356x: ddr: fix eyescan build fail

build command:
./make.sh rk3568

update feature:
1. fix probabilistic read/write training failures

rk3568: ddr: update ddrbin to v1.22

build from:
f8ac117e9c rk356x: ddr: fix eyescan build fail

build command:
./make.sh rk3568

update feature:
1. fix probabilistic read/write training failures under DDR4 2cs
introduced in ddrbin v1.21.
2. Fixed some DRAM compatibility issues at LP4x low frequency.
3. Undo vref training below 600MHz
4. The CLK/DQS slew rate supports different values at high and low frequencies.
5. Added DRAM Manufacturer ID printing.
6. DDR4 enable LPASR to reduce DDR4 self-refresh power.

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I262c513bfcae188c4a6469a4c1c45bd7428e186a

show more ...

rk3566: ddr: update ddrbin to v1.22

build from:
f8ac117e9c rk356x: ddr: fix eyescan build fail

build command:
./make.sh rk3568

update feature:
1. fix probabilistic read/write training failures

rk3566: ddr: update ddrbin to v1.22

build from:
f8ac117e9c rk356x: ddr: fix eyescan build fail

build command:
./make.sh rk3568

update feature:
1. fix probabilistic read/write training failures under DDR4 2cs
introduced in ddrbin v1.21.
2. Fixed some DRAM compatibility issues at LP4x low frequency.
3. Undo vref training below 600MHz
4. The CLK/DQS slew rate supports different values at high and low frequencies.
5. Added DRAM Manufacturer ID printing.
6. DDR4 enable LPASR to reduce DDR4 self-refresh power.

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I0977c713416a3614ec1b22f40cfb7ba9dbaa188c

show more ...

rk3576: spl: update to v1.05

Build from u-boot(next-dev):
884f049582f rockchip: spl, usbplug: Add OS_REG0 write or clear support

Build command:
./make.sh rk3576 --spl-new --spl-fwver v1.05

Updat

rk3576: spl: update to v1.05

Build from u-boot(next-dev):
884f049582f rockchip: spl, usbplug: Add OS_REG0 write or clear support

Build command:
./make.sh rk3576 --spl-new --spl-fwver v1.05

Update feature:
Add spl write OS_REG0 support.

Change-Id: I5821dd52975847afd35fbdf40c289fc4e02175de
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>

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rk3576: usbplug: update to v1.02

Build from u-boot(next-dev):
0fe85c2474 mtd: spinand: print flash id information

Build command:
./make.sh rk3576-usbplug

Update feature:
Add usbplug clear OS_RE

rk3576: usbplug: update to v1.02

Build from u-boot(next-dev):
0fe85c2474 mtd: spinand: print flash id information

Build command:
./make.sh rk3576-usbplug

Update feature:
Add usbplug clear OS_REG0 support.

Change-Id: Ic230ed55350fd3b0bf5a7185ed0d3815b6a039d8
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

show more ...

rk3576: ddr: Update to v1.05 20240617

Build from:
da1087e33f dram_init: rk3576: Updata to v1.05

Update feature:
a43f4e75d1 dram_init: rk3576: ensure VOP bandwidth in extreme situations
486ac1798

rk3576: ddr: Update to v1.05 20240617

Build from:
da1087e33f dram_init: rk3576: Updata to v1.05

Update feature:
a43f4e75d1 dram_init: rk3576: ensure VOP bandwidth in extreme situations
486ac1798e drivers: ram: sdram_rk3588: ......
1c3e8c77d2 drivers: ram: sdram_rk3588: Add 1 to x1024 timing

Change-Id: Ia1583d9b9d977aa4ca55180eb1fcdb824fb9e26f
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>

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rk3568: spl: Update version to v1.14

Build from:
606f72bd97a video/drm: vop2: add te config for mipi cmd mode in rk3562

Update features:
5ddf1f49b71 drivers: mmc: rockchip_dw_mmc: set default sam

rk3568: spl: Update version to v1.14

Build from:
606f72bd97a video/drm: vop2: add te config for mipi cmd mode in rk3562

Update features:
5ddf1f49b71 drivers: mmc: rockchip_dw_mmc: set default sample phase for initializate
0953e389873 dw-mmc: spl: modify the timeout for reading data to 50ms
57b8ceed1c3 mmc: rockchip_dw_mmc: Fix compile error
b512fec4ea9 mmc: rockchip_dw_mmc: Add internal phase support
3e4b5e88701 mmc: dw_mmc: add card detect by DWMCI_CDETECT
de03e0e0d1d clk: rockchip: Extend pll timeout value
05891810f6d rockchip: dts: add pinctrl support for spl
2285b68d280 lib: rsa: Add burn-key-hash flag check
9b9c232a050 drivers: crypto: v2: fix switch case fallthrough
3afc76530fc clk: rockchip: fix the 32-bit may overflow
f38030747b8 common: spl_ab: Update slot_set_unbootable from U-Boot
a0f322f5407 dw_mmc: add a delay before reset controller
e09ef32e9e8 mmc: send stop command when tuning error occurs
b77c257eaed lib: rsa: Add support for rsa key repair

Change-Id: I98fc387db187728ce658dce46b7511bed62e59c7
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>

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rk3576: ddr: Update to v1.04 20240528

Build from:
27ded95582 dram_init: rk3588: set t_refi_x1_sel=1 when per-bank refresh enable

Update features:
27ded95582 dram_init: rk3588: set t_refi_x1_sel=1

rk3576: ddr: Update to v1.04 20240528

Build from:
27ded95582 dram_init: rk3588: set t_refi_x1_sel=1 when per-bank refresh enable

Update features:
27ded95582 dram_init: rk3588: set t_refi_x1_sel=1 when per-bank refresh enable
150b0a9e1f dram_init: rk3576: Updata to v1.04
4e4f99b482 dram_init: rk3576: config CNTFRQ_EL0 according to the OSC frequency
e071b977b0 Revert "rk3588: ddr: fixed DERATEINT.mr4_read_interval configuration"
27a3c08b05 dram_init: rk3576: fix the tag_ddr_mem error when cs0_row less than cs1_row
20b0fabfa9 dram_init: rk3576: fix ultra suspend error by modify the resume flow
bf0c0a13ec drivers: ram: rk3576: Disable auto clk stop when pd/sr_idle disable
e1bff7719a drivers: ram: rk3576: Modify CTRL_OFFSET_DQ before read training
7dd6853eb2 drivers: ram: sdram_rk3588: Modify the calc of rddata_en (tTOT)
c619ebf7a3 drivers: ram: sdram_rk3588: Print eye_scan resluts of all channels
110186f7c9 dram_init: dram_scan_eye: Store real vref in result
c54cbb7162 dram_init: dram_scan_eye: Set tt_err if def setup memtest fail
c672e6e73c drivers: ram: sdram_rk3588: Fix CS1 addr in eye_scan
b28d838a92 drivers: ram: rk3576: fix the error of pclk_ddr during DMC initialization
3c42a42383 drivers: ram: rk3588: avoid the change of dfi_init_complete single during DLL lock

Change-Id: I4ce7b37308e3288e781ca265defe478391d06e46
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>

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rk3288: ddr: update ddr bin to DDR 20240527 fwver: v1.12

build in:
c9991c2 rk3288: update DDR 20240527 fwver: v1.12

update feature:
30829bb rk3288: ddr fix 194MHz DQ/DQS phase not suitable
10b27

rk3288: ddr: update ddr bin to DDR 20240527 fwver: v1.12

build in:
c9991c2 rk3288: update DDR 20240527 fwver: v1.12

update feature:
30829bb rk3288: ddr fix 194MHz DQ/DQS phase not suitable
10b27fc project: move project to Arm Development Studio IDE

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I0c5b8fe4f77a1568c2672a053e2ab1702bf56076

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rk3576: boost: update boost bin to v1.02

build from:
85a3a9ac98 rk_boost: rk3576: update to v1.02
update feature:
1. Close uart print.

Signed-off-by: chenfen <chenfen@rock-chips.com

rk3576: boost: update boost bin to v1.02

build from:
85a3a9ac98 rk_boost: rk3576: update to v1.02
update feature:
1. Close uart print.

Signed-off-by: chenfen <chenfen@rock-chips.com>
Change-Id: I78edd60641cdf5bed8ac64f32ede70bfc7315457

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px30: ddr: Update to DDR 20240527 fwver: v2.10

build in:
29a6ff7 rk3326/px30: ddr: Update to DDR 20240527 fwver: v2.10

update feature:
1b9746b RK3326/RK3326S: add sram base judge
23b4b9a rk3326s

px30: ddr: Update to DDR 20240527 fwver: v2.10

build in:
29a6ff7 rk3326/px30: ddr: Update to DDR 20240527 fwver: v2.10

update feature:
1b9746b RK3326/RK3326S: add sram base judge
23b4b9a rk3326s/px30s: set cke low before clk for lp3

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Idc674e20d57d332928b73dc34ce0c08f6e66e858

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rk3326: ddr: Update to DDR 20240527 fwver: v2.10

build in:
29a6ff7 rk3326/px30: ddr: Update to DDR 20240527 fwver: v2.10

update feature:
1b9746b RK3326/RK3326S: add sram base judge
23b4b9a rk332

rk3326: ddr: Update to DDR 20240527 fwver: v2.10

build in:
29a6ff7 rk3326/px30: ddr: Update to DDR 20240527 fwver: v2.10

update feature:
1b9746b RK3326/RK3326S: add sram base judge
23b4b9a rk3326s/px30s: set cke low before clk for lp3

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Ic862b16426975123e70441b53dd38029f36ccac6

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rk3576: spl: Update version to v1.04

Build from U-Boot commit:
3e169ed6d1d dvfs: rockchip_wtemp_dvfs: Check clk_set_rate() before updating voltage
update feature:
04d08ecebbb misc: rockchip decomp

rk3576: spl: Update version to v1.04

Build from U-Boot commit:
3e169ed6d1d dvfs: rockchip_wtemp_dvfs: Check clk_set_rate() before updating voltage
update feature:
04d08ecebbb misc: rockchip decompress: fix RK3576 not support LZ4
8b42c3da266 lib: lz4: Don't bail fail message when no hw decomp device
b2ea6a555cb dts: rockchip: rk3576: the power_en for SD control by the controller
f88a10fc5de dw_mmc: add default power enable config value for rk3576
0953e389873 dw-mmc: spl: modify the timeout for reading data to 50ms

Change-Id: Ie36ea2cbf23eb29950beceacd2a1a400eb9131ce
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>

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rk3036: loader: Update to v2.65

build from:
5ea1119 src: flash: Filter FE FE flash id
update feature:
Filter wrong flash id

Change-Id: I4aa7791b57d9d39b0fd6f150a534350ee468b7e4
Signed-off-by: Jon

rk3036: loader: Update to v2.65

build from:
5ea1119 src: flash: Filter FE FE flash id
update feature:
Filter wrong flash id

Change-Id: I4aa7791b57d9d39b0fd6f150a534350ee468b7e4
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

show more ...

rk3576: spl: Update version to v1.03

Build from:
e53b21c53e6 gpt: re-alloc gpt header buffer for ufs device

Change-Id: I9d5cae00ce1b0317d4469636c4a5d6a535dde67a
Signed-off-by: Xuhui Lin <xuhui.lin

rk3576: spl: Update version to v1.03

Build from:
e53b21c53e6 gpt: re-alloc gpt header buffer for ufs device

Change-Id: I9d5cae00ce1b0317d4469636c4a5d6a535dde67a
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>

show more ...