rk3308: miniloader: update RK3308MINIALL.ini

Change-Id: I3ad2a3e0ecd0aef8fef0d40464f043042ff0c10e
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

rk3308: miniloader: fix slc nand flash ecc error

Change-Id: Ife715ec12386e379f45df2403238d023948fae3e
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

rk3308: ddr: update version to v1.21

from commit:
rk3308_ddr_393MHz_v1.21.bin from 4929224 rk3308: DDR Version V1.21 in 393MHz
rk3308_ddr_451MHz_v1.21.bin from 82e6549 rk3308: DDR Version V1.21 in

rk3308: ddr: update version to v1.21

from commit:
rk3308_ddr_393MHz_v1.21.bin from 4929224 rk3308: DDR Version V1.21 in 393MHz
rk3308_ddr_451MHz_v1.21.bin from 82e6549 rk3308: DDR Version V1.21 in 451MHz
rk3308_ddr_589MHz_v1.21.bin from a321411 rk3308: DDR Version V1.21 in 589MHz
change:
enable ddr standby.

Change-Id: I7d1220e4b5823af1bc47ba9d31f31ddf9fe3dd5b
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

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px3se: add miniloader and trust configs for px3se

PX3SE uses its own miniloader and the cpu debug port
is uart1. It can share the tee binary with rk3126,
so make a soft link to RKTRUST/RK3126TOS.ini

px3se: add miniloader and trust configs for px3se

PX3SE uses its own miniloader and the cpu debug port
is uart1. It can share the tee binary with rk3126,
so make a soft link to RKTRUST/RK3126TOS.ini for RKTRUST/PX3SETOS.ini.

px3se_ddr_300MHz_v2.08.bin makes the uart1 as debug port.

Change-Id: Ifdca0e7206d5d0c38504b4f6ac7ddd6674e04f0a
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

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rk3308: miniloader: fix secure boot u-boot verify error.

from commit d61e573 fix secure boot u-boot verify error.

Change-Id: I1f3b7255f90803d40f9a088acf57baf24581e29f
Signed-off-by: chenfen <chenfe

rk3308: miniloader: fix secure boot u-boot verify error.

from commit d61e573 fix secure boot u-boot verify error.

Change-Id: I1f3b7255f90803d40f9a088acf57baf24581e29f
Signed-off-by: chenfen <chenfen@rock-chips.com>

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rk3399: ddr: update ddr init bin v1.12

built from ddr init project commit:
9e6431a Version: DDR Version 1.12 20180518

update feature:
1.fix ddr3 board power up fail because of lpddr4 commit

ddr3

rk3399: ddr: update ddr init bin v1.12

built from ddr init project commit:
9e6431a Version: DDR Version 1.12 20180518

update feature:
1.fix ddr3 board power up fail because of lpddr4 commit

ddr3 power up fail at trust, and ddr3 board download flow can pass,
can enter system, reboot also pass, only power down and up, and hardware
reset can meet this problem.
the fail log as below:
NOTICE: BL31: Rockchip release version: v1.1
INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
INFO: Using opteed sec cpu_context!
INFO: boot cpu mask: 0
ASSERT: bakery_lock_release <170> : bakery_ticket_number(bakery->lock_data[me])

Change-Id: Ie010c8f6f9c415538703256ea11218851ddd8f18
Signed-off-by: CanYang He <hcy@rock-chips.com>

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rk3308: ddr: update version to v1.20

from commit:
fdfa64b rk3308: DDR Version V1.20
change:
adjust auto power down and auto self-refresh for lower
power in VCC_DDR and VDD_CORE.

Change-Id: I17fe5

rk3308: ddr: update version to v1.20

from commit:
fdfa64b rk3308: DDR Version V1.20
change:
adjust auto power down and auto self-refresh for lower
power in VCC_DDR and VDD_CORE.

Change-Id: I17fe5d5621d2db7ea64dfb5848706c49da1c3974
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

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rk3399: ddr: update ddr init bin v1.11

built from ddr init project commit:
d6e7216 Version: DDR Version 1.11 20180509

update feature:
1.support 1 cs lpddr4
2.support lpddr4 only one channel
3.remo

rk3399: ddr: update ddr init bin v1.11

built from ddr init project commit:
d6e7216 Version: DDR Version 1.11 20180509

update feature:
1.support 1 cs lpddr4
2.support lpddr4 only one channel
3.remove some lpddr4 log

Change-Id: Iac48d346fb1e86193a82369d024100bd02dba6a5
Signed-off-by: CanYang He <hcy@rock-chips.com>

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px30: update ddr init bin to v1.07

print info: print info: DDR Version 1.07 20180323
from commit:
95d3ef5 rk3326: ddr: init code update to v1.07

Change-Id: I29c95aadd28cfcb598e5898669ea20c9aaed287

px30: update ddr init bin to v1.07

print info: print info: DDR Version 1.07 20180323
from commit:
95d3ef5 rk3326: ddr: init code update to v1.07

Change-Id: I29c95aadd28cfcb598e5898669ea20c9aaed2874
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

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rk3326: update ddr init bin to v1.07

print info: print info: DDR Version 1.07 20180423
from commit:
95d3ef5 rk3326: ddr: init code update to v1.07

Change-Id: I7eb677af124cdc8121301ed468eeebb5a76f9

rk3326: update ddr init bin to v1.07

print info: print info: DDR Version 1.07 20180423
from commit:
95d3ef5 rk3326: ddr: init code update to v1.07

Change-Id: I7eb677af124cdc8121301ed468eeebb5a76f9a01
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

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rk3308: ddr: update version to v1.19

from commit:
4a256e5ccf8d rk3308: DDR Version V1.19
change:
1.check boot memory device.If loader device turn to maskrom
device,download is normal.
2.adjust dq

rk3308: ddr: update version to v1.19

from commit:
4a256e5ccf8d rk3308: DDR Version V1.19
change:
1.check boot memory device.If loader device turn to maskrom
device,download is normal.
2.adjust dq10,dq11,dq14,dq15 de-skew for better dqs1 eye training.
3.reduce pll vco
4.change qos prority,reduce cpu QOS prority,improve
some QOS prority.
5.Do not clear grf_os_reg0 when boot mode is BOOT_BROM_DOWNLOAD

Change-Id: Ie7cb666c634ce41ea558acbd71096f0811fe3444
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

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rk322xh/rk3328: ddr: update ddr init code to v1.13

print info: DDR Version 1.13 20180428
from commit:
c25a53d rk322xh: ddr: update init code to v1.13

Change-Id: Iace65e548d00b9d50abf41aac9a29d2e5b

rk322xh/rk3328: ddr: update ddr init code to v1.13

print info: DDR Version 1.13 20180428
from commit:
c25a53d rk322xh: ddr: update init code to v1.13

Change-Id: Iace65e548d00b9d50abf41aac9a29d2e5bf7e1bb
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

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rk3128: update ddr init bin to v2.08

1. Init timer5 as arch timer for ARM.
2. Improve DDR stability.
print info: DDR Version 2.08 20180426
from commit:
30b95fd rk3128: ddr: init code update to v2.0

rk3128: update ddr init bin to v2.08

1. Init timer5 as arch timer for ARM.
2. Improve DDR stability.
print info: DDR Version 2.08 20180426
from commit:
30b95fd rk3128: ddr: init code update to v2.08

Change-Id: I2f57b758a5a3e3b631d82a3ee92b038dcf5c179c
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

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rk322x: update ddr init bin to v1.07

print info: DDR Version V1.07 20180426
from commit:
1ab07b4 rk322x: ddr update to v1.07

Change-Id: I0ecb4c3ba23a6034196f3d1a4c6acc5fe95e6876
Signed-off-by: Tan

rk322x: update ddr init bin to v1.07

print info: DDR Version V1.07 20180426
from commit:
1ab07b4 rk322x: ddr update to v1.07

Change-Id: I0ecb4c3ba23a6034196f3d1a4c6acc5fe95e6876
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

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rk3326: update ddr init bin to v1.06

print info: print info: DDR Version 1.06 20180323
from commit:
32fd6bc rk3326: ddr: init code update to v1.06

Change-Id: I3b2ff1490e58090cc73997859879ac78f6

rk3326: update ddr init bin to v1.06

print info: print info: DDR Version 1.06 20180323
from commit:
32fd6bc rk3326: ddr: init code update to v1.06

Change-Id: I3b2ff1490e58090cc73997859879ac78f6d2e840
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

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px30: update ddr init bin to v1.06

print info: print info: DDR Version 1.06 20180323
from commit:
32fd6bc rk3326: ddr: init code update to v1.06

Change-Id: Ied9760d8e1474217f58b3fc1fa4170bbce865fc

px30: update ddr init bin to v1.06

print info: print info: DDR Version 1.06 20180323
from commit:
32fd6bc rk3326: ddr: init code update to v1.06

Change-Id: Ied9760d8e1474217f58b3fc1fa4170bbce865fc8
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

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rk3128x: add ini files and bin files

Change-Id: I5fd2af4b3240126b0ade346ccffc81d8ee2fb80d
Signed-off-by: Liang Chen <cl@rock-chips.com>

rk3308: ddr: add initial version v1.11

from commit :
7b62dfc rk3308: DDR Version V1.11
add
1.set vpll0 in 1179.648MHz,vpll1 in 903.168MHz
2.ddr in vpll0,set 589MHz
3.adjusted deskew for a

rk3308: ddr: add initial version v1.11

from commit :
7b62dfc rk3308: DDR Version V1.11
add
1.set vpll0 in 1179.648MHz,vpll1 in 903.168MHz
2.ddr in vpll0,set 589MHz
3.adjusted deskew for aligning DQS and CK
4.delete clk 50% duty ratio setting in cru
5.set APLL,DPLL,VPLL0,VPLL1 without level shift
6.set pll vco high,but lower 3.2GHz,for minimum jitter.
7.add ddr scramble,include enable pmu pvtm.
8.updata ddr config grf_os_reg2,grf_os_reg3 to v1.08.

Change-Id: Ia459f53d7d9623f3af7e0de1edc2f99735d57c80
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

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rk3326: zftl: improve the processing mechanism of nand flash read and write

from loader commit 0d94125e9: zftl: improve the processing mechanism of nand flash read and write

Change-Id: I13c37f1a56f

rk3326: zftl: improve the processing mechanism of nand flash read and write

from loader commit 0d94125e9: zftl: improve the processing mechanism of nand flash read and write

Change-Id: I13c37f1a56f288f13bf17c5ed1992d363a0e6080
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

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rk3399: ddr: update ddr init bin v1.10

built from ddr init project commit:
6ac5927 Version: DDR Version 1.10 20180410

update feature:
1.the init code change lpddr4 frequency from 50MHz to 400MHz,

rk3399: ddr: update ddr init bin v1.10

built from ddr init project commit:
6ac5927 Version: DDR Version 1.10 20180410

update feature:
1.the init code change lpddr4 frequency from 50MHz to 400MHz,
and final to 800MHz, this version is a good support for
system suspend resume.
2.fix global reset fail when vdd_gpu power off

Change-Id: I490d26f243540d60bd6af2bfda3bddebf4218d1a
Signed-off-by: CanYang He <hcy@rock-chips.com>

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rk3288: usbplug: support upgrade by LBA.

from commit: ca6111834 rk3288 usbplug support upgrade by LBA.

Change-Id: I5b3bccfdcd58b92bfc9016deee6d4c6e23a8bde3
Signed-off-by: chenfen <chenfen@rock-chip

rk3288: usbplug: support upgrade by LBA.

from commit: ca6111834 rk3288 usbplug support upgrade by LBA.

Change-Id: I5b3bccfdcd58b92bfc9016deee6d4c6e23a8bde3
Signed-off-by: chenfen <chenfen@rock-chips.com>

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PX30: miniloader: update when chip_id is null,cann't use PX30 loader upgrade.

from commit: 0d94125e9 update when chip_id is null,cann't use PX30 loader upgrade.

Change-Id: Ic696d2c76685545d49b4fc8

PX30: miniloader: update when chip_id is null,cann't use PX30 loader upgrade.

from commit: 0d94125e9 update when chip_id is null,cann't use PX30 loader upgrade.

Change-Id: Ic696d2c76685545d49b4fc8a786b2fd29606f5a6
Signed-off-by: chenfen <chenfen@rock-chips.com>

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rk3326: miniloader: update when chip_id is null,use rk3326 loader upgrade.

from commit: 0d94125e9 update when chip_id is null,use rk3336 loader upgrade.

Change-Id: I3fd593beaaf78a83b073797abc8f5f6

rk3326: miniloader: update when chip_id is null,use rk3326 loader upgrade.

from commit: 0d94125e9 update when chip_id is null,use rk3336 loader upgrade.

Change-Id: I3fd593beaaf78a83b073797abc8f5f657517ce2a
Signed-off-by: chenfen <chenfen@rock-chips.com>

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rk3399: usbplug: support upgrade by LBA.

from commit: ca6111834 rk3399 usbplug support upgrade by LBA.

Change-Id: Ib4f979f3e60bbd335fc394cac3544b8cbb669d2c
Signed-off-by: chenfen <chenfen@rock-chip

rk3399: usbplug: support upgrade by LBA.

from commit: ca6111834 rk3399 usbplug support upgrade by LBA.

Change-Id: Ib4f979f3e60bbd335fc394cac3544b8cbb669d2c
Signed-off-by: chenfen <chenfen@rock-chips.com>

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Merge branch 'rkbin' into rkbin_master