| #
a31ac036 |
| 21-May-2019 |
Tang Yun ping <typ@rock-chips.com> |
px30: ddr: update ddr init bin to v1.12
print info: print info: DDR Version 1.12 20190528
from commit:
cbe7c08 rk3326: ddr: init code update to v1.12
update feature:
6e65fc3 rk3326: ddr: enable 2
px30: ddr: update ddr init bin to v1.12
print info: print info: DDR Version 1.12 20190528
from commit:
cbe7c08 rk3326: ddr: init code update to v1.12
update feature:
6e65fc3 rk3326: ddr: enable 2T mode for DDR3
4bd8b62 RK3326: ddr: fix wrong uart base address for atags
Change-Id: I8c0be9bd8e448732292957bf2900850173982aa0
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
show more ...
|
| #
fd4e26d3 |
| 28-Mar-2019 |
Tang Yun ping <typ@rock-chips.com> |
px30: ddr: update ddr init bin to v1.11
print info: print info: DDR Version 1.11 20190328
from commit:
48fccd8 rk3326: ddr: init code update to v1.11
update feature:
7220391 rk3326: config:
px30: ddr: update ddr init bin to v1.11
print info: print info: DDR Version 1.11 20190328
from commit:
48fccd8 rk3326: ddr: init code update to v1.11
update feature:
7220391 rk3326: config: support unalign access
3a63040 rk3326: ddr: set uart2 m0 iomux if not sd boot
70cb2ca rk3326: ddr: add atags initialize
0327858 rk3326: using unify global argument for uart, dram info config
Change-Id: I2b2b165560023b9c57f62c0fe7ad8812ad5a6928
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
show more ...
|
| #
900b3a24 |
| 20-Feb-2019 |
Jon Lin <jon.lin@rock-chips.com> |
px30: miniloader: separate release 1.15 version loader for supporting SLC along
from commit: bab4a04c6945c5fa13a617ec02baadd50314b7ce
adjust the way of building tables to increase ftl init
Change-
px30: miniloader: separate release 1.15 version loader for supporting SLC along
from commit: bab4a04c6945c5fa13a617ec02baadd50314b7ce
adjust the way of building tables to increase ftl init
Change-Id: I17831195ea97c4ae95bdd16ed913369c649aeb5b
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
show more ...
|