| #
10172962 |
| 18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: spl: Support device tree when BSS is in a different section
At present in SPL we place the device tree immediately after BSS. This avoids needing to copy it out of the way before BSS can be used
dm: spl: Support device tree when BSS is in a different section
At present in SPL we place the device tree immediately after BSS. This avoids needing to copy it out of the way before BSS can be used. However on some boards BSS is not placed with the image - e.g. it can be in RAM if available.
Add an option to tell U-Boot that the device tree should be placed at the end of the image binary (_image_binary_end) instead of at the end of BSS.
Note: A common reason to place BSS in RAM is to support the FAT filesystem. We should update the code so that it does not use so much BSS.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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| #
3bc37a50 |
| 18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property
It is sometimes useful to find a property in the chosen node. Add a function for this.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by:
fdt: Add a function to look up a /chosen property
It is sometimes useful to find a property in the chosen node. Add a function for this.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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| #
e573bdb3 |
| 30-Oct-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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| #
2431492a |
| 27-Oct-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
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| #
4ea5243a |
| 02-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT
PCI addresses are always represented as 3 cells in DT. (one cell for bus and device, and two cells for a 64-bit addres). This does not vary based
fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT
PCI addresses are always represented as 3 cells in DT. (one cell for bus and device, and two cells for a 64-bit addres). This does not vary based on either the physical address size of the CPU, nor any #address-cells property in DT (or more precisely, #address-cells must be set to 3 in any PCIe controller's node).
Fix fdtdec_get_pci_addr() to use conversion functions that operate on (fixed) cell-sized data rather than (varying) physical-address-sized data, so that the function works on 64-bit systems.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Thierry Reding <treding@nvidia.com>
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| #
f74dc51b |
| 15-Oct-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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| #
13a39725 |
| 14-Oct-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge remote-tracking branch 'u-boot/master'
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| #
996ec1dc |
| 03-Oct-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-fdt
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| #
ff0a6358 |
| 30-Sep-2015 |
Przemyslaw Marczak <p.marczak@samsung.com> |
fdtdec: fix parsing 'reg' property with zero value in '#size-cells'
After rework of lib/fdtdec.c by:
commit: 02464e3 fdt: add new fdt address parsing functions
the function fdtdec_get_addr() doesn
fdtdec: fix parsing 'reg' property with zero value in '#size-cells'
After rework of lib/fdtdec.c by:
commit: 02464e3 fdt: add new fdt address parsing functions
the function fdtdec_get_addr() doesn't work as previous, because the implementation assumes that properties '#address-cells' and '#size-cells' are equal to 1, which can be not true sometimes.
The new API introduced fdtdec_get_addr_size_auto_parent() for the 'reg' property parsing, but the implementation assumes, that #size-cells can't be less than 1.
This causes that the following children's 'reg' property can't be reached:
parent@0x0 { #address-cells = <1>; #size-cells = <0>; children@0x100 { reg = < 0x100 >; }; };
Change the condition value from '1' to '0', which allows parsing property with at least zero #size-cells, fixes the issue.
Now, fdtdec_get_addr_size_auto_parent() works properly.
Tested on: Odroid U3/X2, Trats, Trats2, Odroid XU3, Snow (by Simon).
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
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| #
d93b9a07 |
| 25-Sep-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: fix fdtdec_get_addr_size not to require any size cells
fdtdec_get_addr_size() may be used in two cases: a) With sizep supplied, in which case both an address and a size are parsed from DT. In t
fdt: fix fdtdec_get_addr_size not to require any size cells
fdtdec_get_addr_size() may be used in two cases: a) With sizep supplied, in which case both an address and a size are parsed from DT. In this case, the DT property must be large enough to contain both values. b) With sizep NULL, in which case only an address is parsed from DT. In this case, the DT property only need be large enough to contain this address value. Commit 02464e386bb5 "fdt: add new fdt address parsing functions" broke this relaxed checking, and required the DT property to contain both an address and a size value in all cases.
Fix fdtdec_get_addr_size() to vary ns based on whether the size value is being parsed from the DT or not. This is safe since the function only parses the first entry in the property, so the overall value of (na + ns) need not be accurate, since it is never used to step through the property data to find other entries. Besides, this fixed behaviour essentially matches the original behaviour before the patch this patch fixes. (The original code validated that the property was exactly the length of either na or (na + ns), whereas the current code only validates that the property is at least that long. For non-failure cases, the two behaviours are identical).
Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Thierry Reding <treding@nvidia.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Suchanek <hramrach@gmail.com> Fixes: 02464e386bb5 ("fdt: add new fdt address parsing functions") Reported-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
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| #
fa43ce84 |
| 16-Sep-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fdt
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| #
02464e38 |
| 06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions
fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT bindi
fdt: add new fdt address parsing functions
fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties.
This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells.
dev_get_addr() is updated to use the new functions.
Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them.
Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit".
Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
a6003397 |
| 07-Sep-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
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| #
129adf5b |
| 25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF
Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header
mmc: dw_mmc: Probe the MMC from OF
Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files.
This patch now also removes previous temporary workaround.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com>
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| #
80cd58b9 |
| 31-Aug-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
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| #
b697e0ff |
| 23-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model
Convert the tpm_tis_i2c driver to use driver model and update boards which use it.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ric
dm: tpm: Convert I2C driver to driver model
Convert the tpm_tis_i2c driver to use driver model and update boards which use it.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
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| #
79c884d7 |
| 26-Aug-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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| #
bc6351eb |
| 20-Aug-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Fix possible infinite loop in fdtdec_get_pci_vendev()
When there is no valid compatible string in current list, we should advance to next one in the compatible string list.
Signed-off-by: B
fdtdec: Fix possible infinite loop in fdtdec_get_pci_vendev()
When there is no valid compatible string in current list, we should advance to next one in the compatible string list.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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| #
0f925822 |
| 11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals
We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in
of: clean up OF_CONTROL ifdef conditionals
We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h:
#ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif
Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL.
Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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| #
632093b5 |
| 14-Aug-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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| #
236efe36 |
| 03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
Revert "fdt: Fix fdtdec_get_addr_size() for 64-bit"
This reverts commit 5b34436035fc862b5e8d0d2c3eab74ba36f1a7f4.
This function has a few problems. It calls fdt_parent_offset() which as mentioned i
Revert "fdt: Fix fdtdec_get_addr_size() for 64-bit"
This reverts commit 5b34436035fc862b5e8d0d2c3eab74ba36f1a7f4.
This function has a few problems. It calls fdt_parent_offset() which as mentioned in code review is very slow.
https://patchwork.ozlabs.org/patch/499482/ https://patchwork.ozlabs.org/patch/452604/
It also happens to break SPI flash on Minnowboard max which is how I noticed that this was applied. I can send a patch to tidy that up, but in any case I think we should consider a revert until the function is better implemented.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
f3b84a30 |
| 07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree
Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself.
Modify the MinnowMax
x86: baytrail: Configure FSP UPD from device tree
Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself.
Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used.
Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
6ab00db2 |
| 25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF
Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework
arm: socfpga: misc: Reset ethernet from OF
Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
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| #
ae27120c |
| 06-Aug-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
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| #
5ae3a5e8 |
| 03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge
This has moved to driver model so we can drop the fdtdec support.
Signed-off-by: Simon Glass <sjg@chromium.org>
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