mmc: fsl_esdhc: Poll until card is not busy anymore

This patch imports parts of two patches from the Freescale U-Boot with the following
commit messages:

ENGR00156405 ESDHC: Add workaround for auto

mmc: fsl_esdhc: Poll until card is not busy anymore

This patch imports parts of two patches from the Freescale U-Boot with the following
commit messages:

ENGR00156405 ESDHC: Add workaround for auto-clock gate errata ENGcm03648
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01&id=e436525a70fe47623d346bc7d9f08f12ff8ad787
The errata, not applicable to USDHC, causes ESDHC to shut off clock to the card
when auto-clock gating is enabled for commands with busy signalling and no data
phase. The card might require the clock to exit the busy state, so the workaround
is to disable the auto-clock gate bits in SYSCTL register for such commands. The
workaround also entails polling on DAT0 bit in the PRSSTAT register to learn when
busy state is complete. Auto-clock gating is re-enabled at the end of busy state.

ENGR00156670-1 ESDHC/USDHC: Remove delay before each cmd and some bug fixes
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01&id=a77c6fec8596891be96b2cdbc742c9824844b92a
Removed delay of 10 ms before each command. There should not be a need to have this
delay after the ENGR00156405 patch that polls until card is not busy anymore before
proceeding to next cmd.

This patch imports the polling part of both patches. The auto-clock gating code
don't apply for i.MX6 as implemented in these two patches.

SYSCTL_RSTA was defined twice. Remove one definition.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Andy Fleming <afleming@freescale.com>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Stefano Babic <sbabic@denx.de>

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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

fsl_esdhc: Deal with watermark level register related changes

P1010 and P1014 has v2.3 version of FSL eSDHC controller in which watermark
level register description has been changed:

9-15 bits repr

fsl_esdhc: Deal with watermark level register related changes

P1010 and P1014 has v2.3 version of FSL eSDHC controller in which watermark
level register description has been changed:

9-15 bits represent WR_WML[0:6], Max value = 128 represented by 0x00
25-31 bits represent RD_WML[0:6], Max value = 128 represented by 0x00

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:
arch/arm/include/asm/mach-types.h
common/serial.c

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

Merge branch 'master' of git://git.denx.de/u-boot-mmc

ppc/85xx: PIO Support for FSL eSDHC Controller Driver

On some Freescale SoC Internal DMA of eSDHC controller has bug.
So PIO Mode has been introduced to do data transfer using CPU.

Signed-off-by: D

ppc/85xx: PIO Support for FSL eSDHC Controller Driver

On some Freescale SoC Internal DMA of eSDHC controller has bug.
So PIO Mode has been introduced to do data transfer using CPU.

Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>

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Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:
cpu/arm1176/cpu.c
cpu/arm1176/start.S
cpu/arm_cortexa8/s5pc1xx/Makefile
cpu/arm_cortexa8/s5pc1xx/clock.c
drivers/serial/serial_s

Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:
cpu/arm1176/cpu.c
cpu/arm1176/start.S
cpu/arm_cortexa8/s5pc1xx/Makefile
cpu/arm_cortexa8/s5pc1xx/clock.c
drivers/serial/serial_s5p.c
include/asm-arm/arch-s5pc1xx/clk.h
include/asm-arm/arch-s5pc1xx/gpio.h
include/asm-arm/arch-s5pc1xx/uart.h

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

fsl_esdhc: Only modify the field we are changing in WML

When we set the read or write watermark in WML we should maintain the
rest of the register as is, rather than using some hard coded value.

Si

fsl_esdhc: Only modify the field we are changing in WML

When we set the read or write watermark in WML we should maintain the
rest of the register as is, rather than using some hard coded value.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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fsl_esdhc: Add function to reset the eSDHC controller

To support multiple block read command we must set abort or use auto
CMD12. If we booted from eSDHC controller neither of these are used
and th

fsl_esdhc: Add function to reset the eSDHC controller

To support multiple block read command we must set abort or use auto
CMD12. If we booted from eSDHC controller neither of these are used
and thus we need to reset the controller to allow multiple block read
to function.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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fsl_esdhc: Always stop clock before changing frequency

We need to stop the clocks on 83xx/85xx as well as imx. No need to make
this code conditional to just imx.

Signed-off-by: Kumar Gala <galak@k

fsl_esdhc: Always stop clock before changing frequency

We need to stop the clocks on 83xx/85xx as well as imx. No need to make
this code conditional to just imx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefano Babic <sbabic@denx.de>

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Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:

board/davinci/da830evm/da830evm.c
board/edb93xx/sdram_cfg.c
board/esd/otc570/otc570.c
board/netstar/eeprom.c
board/netstar/eepr

Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:

board/davinci/da830evm/da830evm.c
board/edb93xx/sdram_cfg.c
board/esd/otc570/otc570.c
board/netstar/eeprom.c
board/netstar/eeprom_start.S
cpu/arm920t/ep93xx/timer.c
include/configs/netstar.h
include/configs/otc570.h

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

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fsl_esdhc: add support for mx51 processor

The esdhc controller in the mx51 processor is quite
the same as the one in some powerpc processors
(MPC83xx, MPC85xx). This patches adapts the driver
to sup

fsl_esdhc: add support for mx51 processor

The esdhc controller in the mx51 processor is quite
the same as the one in some powerpc processors
(MPC83xx, MPC85xx). This patches adapts the driver
to support the arm mx51.

Signed-off-by: Stefano Babic <sbabic@denx.de>

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Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:

cpu/arm_cortexa8/s5pc1xx/cache.c
include/configs/spear6xx.h
lib_ppc/reloc.S

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

fsl_esdhc: fix wrong clock mask

Fix typo in SYSCTL_CLOCK_MASK, which caused residual in high bits of SDCLKFS.

Signed-off-by: Jin Qing <B24347@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.

fsl_esdhc: fix wrong clock mask

Fix typo in SYSCTL_CLOCK_MASK, which caused residual in high bits of SDCLKFS.

Signed-off-by: Jin Qing <B24347@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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fsl_esdhc: Add device tree fixups

This patch implements fdt_fixup_esdhc() function that is used to fixup
the device tree.

The function adds status = "disabled" propery if esdhc pins muxed away,
oth

fsl_esdhc: Add device tree fixups

This patch implements fdt_fixup_esdhc() function that is used to fixup
the device tree.

The function adds status = "disabled" propery if esdhc pins muxed away,
otherwise it fixups clock-frequency for esdhc nodes.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>

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Add support for the Freescale eSDHC found on 8379 and 8536 SoCs

This uses the new MMC framework

Some contributions by Dave Liu <daveliu@freescale.com>

Signed-off-by: Andy Fleming <afleming@freesca

Add support for the Freescale eSDHC found on 8379 and 8536 SoCs

This uses the new MMC framework

Some contributions by Dave Liu <daveliu@freescale.com>

Signed-off-by: Andy Fleming <afleming@freescale.com>

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