| ee562dc3 | 13-Sep-2016 |
Stephen Warren <swarren@nvidia.com> |
ARM: tegra: pull Tegra210 SoC DT from Linux v4.7
The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to mig
ARM: tegra: pull Tegra210 SoC DT from Linux v4.7
The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future.
Main changes: * Brought in the correct Tegra210 CAR binding; the old file in U-Boot appears to be a renamed version of the Tegra124 bindings rather than the real Tegra210 version. * Conversion of SPI and UART nodes to standard DMA bindings. U-Boot doesn't use DMA so isn't affected. * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all information required by U-Boot, so U-Boot is not affected. * Conversion of many magic numbers to named defines. * Addition of many nodes not used by U-Boot, including separation of the Tegra LIC (Legacy IRQ controller) and GIC. * Node sort order fixes.
Remaining deltas relative to the Linux DT: * U-Boot has enabled PCIe for Tegra210, but the kernel hasn't yet. * The GPIO node compatible value in the kernel explicitly includes Tegra124 values whereas U-Boot does not. I'll send a kernel patch to correct this.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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| 3b8c1b3b | 13-Sep-2016 |
Stephen Warren <swarren@nvidia.com> |
ARM: tegra: pull Tegra124 SoC DT from Linux v4.7
The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to mig
ARM: tegra: pull Tegra124 SoC DT from Linux v4.7
The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future.
Main changes: * USB phy_type property is aligned with the kernel, so board files are updated so the final DT content doesn't change. I'm not convinved that Nyan uses HSIC phy_type. However, I'd rather this change be a no-op, and any DT bug-fixes be separate. * Sync misc changes from the kernel: missing DT content, minor compatible value fixes, typos.
Remaining deltas relative to the Linux DT: * U-Boot uses #address-cells/#size-cells of 1 whereas the kernel uses 2. I believe U-Boot's DT parsing currently assumes that these values match the physical address size, so I didn't synchronize this part of the DT. * U-Boot uses the original XUSB PHY DT binding, wherease the kernel DT has moved to a newer version. Thus, XUSB client nodes include properties names phys and phy-names that do not appear in the kernel, and don't include pad definitions in the padctl node.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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| 5c31e7ab | 13-Sep-2016 |
Stephen Warren <swarren@nvidia.com> |
ARM: tegra: pull Tegra114 SoC DT from Linux v4.7
The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to mig
ARM: tegra: pull Tegra114 SoC DT from Linux v4.7
The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future.
Main changes: * Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use DMA so isn't affected. * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all information required by U-Boot, so U-Boot is not affected. * Boards need to define the clk32k_in clock that feeds the Tegra PMC. * Addition of tegra114-mc.h since tegra114.dtsi now includes it. * Conversion of many magic numbers to named defines. * Addition of many nodes not used by U-Boot. * Node sort order fixes.
Remaining deltas relative to the Linux DT: * USB node compatible values in U-Boot explicitly list Tegra114 values whereas the kernel does not. I'll send a kernel patch to correct this.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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| ce2f2d2a | 13-Sep-2016 |
Stephen Warren <swarren@nvidia.com> |
ARM: tegra: pull Tegra30 SoC DT from Linux v4.7
The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migr
ARM: tegra: pull Tegra30 SoC DT from Linux v4.7
The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future.
Main changes: * Modification of PCIe memory region addresses. The HW memory layout is programmable, so this should work fine, and Beaver PCIe was tested without issue. * Removal of pcie_xclk from the PCIe node and clock binding header. This clock doesn't exist and isn't used; only a reset with this ID exists. * Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use DMA so isn't affected. * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all information required by U-Boot, so U-Boot is not affected. * Changed the phy_type value for the second USB port. This required board DTs to be updated to keep the same configuration. * Boards need to define the clk32k_in clock that feeds the Tegra PMC. * Addition of tegra30-mc.h since tegra30.dtsi now includes it. * Conversion of many magic numbers to named defines. * Addition of many nodes not used by U-Boot. * Node sort order fixes.
Remaining deltas relative to the Linux DT: * None.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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| 7b9cb494 | 27-Jul-2016 |
Stephen Warren <swarren@nvidia.com> |
ARM: tegra: add BPMP DT bindings
The Tegra BPMP (Boot and Power Management Processor) is a separate auxiliary CPU embedded into Tegra to perform power management work, and controls related features
ARM: tegra: add BPMP DT bindings
The Tegra BPMP (Boot and Power Management Processor) is a separate auxiliary CPU embedded into Tegra to perform power management work, and controls related features such as clocks, resets, power domains, PMIC I2C bus, etc. These bindings dictate how to represent the BPMP in device tree.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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