| #
ec8b7528 |
| 24-Feb-2016 |
Chin Liang See <clsee@altera.com> |
arm: socfpga: Enabling U-Boot environment support in QSPI
Enabling the support of storing U-Boot environment within serial NOR flash. By default, its still store into SDMMC
Signed-off-by: Chin Lian
arm: socfpga: Enabling U-Boot environment support in QSPI
Enabling the support of storing U-Boot environment within serial NOR flash. By default, its still store into SDMMC
Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
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| #
73223f0e |
| 23-Feb-2016 |
Simon Glass <sjg@chromium.org> |
Kconfig: Move CONFIG_FIT and related options to Kconfig
There are already two FIT options in Kconfig but the CONFIG options are still in the header files. We need to do a proper move to fix this.
M
Kconfig: Move CONFIG_FIT and related options to Kconfig
There are already two FIT options in Kconfig but the CONFIG options are still in the header files. We need to do a proper move to fix this.
Move these options to Kconfig and tidy up board configuration:
CONFIG_FIT CONFIG_OF_BOARD_SETUP CONFIG_OF_SYSTEM_SETUP CONFIG_FIT_SIGNATURE CONFIG_FIT_BEST_MATCH CONFIG_FIT_VERBOSE CONFIG_OF_STDOUT_VIA_ALIAS CONFIG_RSA
Unfortunately the first one is a little complicated. We need to make sure this option is not enabled in SPL by this change. Also this option is enabled automatically in the host builds by defining CONFIG_FIT in the image.h file. To solve this, add a new IMAGE_USE_FIT #define which can be used in files that are built on the host but must also build for U-Boot and SPL.
Note: Masahiro's moveconfig.py script is amazing.
Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Add microblaze change, various configs/ re-applies] Signed-off-by: Tom Rini <trini@konsulko.com>
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| #
69e173eb |
| 23-Feb-2016 |
Simon Glass <sjg@chromium.org> |
Move CONFIG_OF_LIBFDT to Kconfig
Move this option to Kconfig and tidy up existing boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
cdb714d7 |
| 24-Feb-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
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| #
dc0a1a08 |
| 11-Feb-2016 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Add missing CONFIG_BUILD_TARGET
Add the missing CONFIG_BUILD_TARGET to get u-boot-with-spl.sfp built automatically upon running make in the source tree.
Signed-off-by: Marek Vasut <ma
arm: socfpga: Add missing CONFIG_BUILD_TARGET
Add the missing CONFIG_BUILD_TARGET to get u-boot-with-spl.sfp built automatically upon running make in the source tree.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com> Cc: Denis Bakhvalov <denis.bakhvalov@nokia.com>
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| #
20d08f59 |
| 13-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze
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| #
fc82edd8 |
| 07-Jan-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
arm: socfpga: Enable SPL_DM_SEQ_ALIAS for all SOCFPGA configs
This feature is required in SPL to enable support for loading from SPI flash.
Also clean up the #define in socfpga_common.h.
Signed-of
arm: socfpga: Enable SPL_DM_SEQ_ALIAS for all SOCFPGA configs
This feature is required in SPL to enable support for loading from SPI flash.
Also clean up the #define in socfpga_common.h.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Reviewed-by: Stefan Roese <sr@denx.de> Acked: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin-Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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| #
40253dd1 |
| 24-Dec-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
Conflicts: include/configs/axs101.h
Signed-off-by: Tom Rini <trini@konsulko.com>
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| #
c339ea5b |
| 20-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Add support for Denali NAND controller
Add common configuration bits for the Denali NAND controller and also support for using it as a boot device in SPL.
Signed-off-by: Marek Vasut <
arm: socfpga: Add support for Denali NAND controller
Add common configuration bits for the Denali NAND controller and also support for using it as a boot device in SPL.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
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| #
eba522a0 |
| 20-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Enable DFU MMC support only if DM_MMC is enabled
It is not possible to compile DFU MMC support if the MMC support is not compiled into U-Boot. Secure the code with an ifdef to prevent
arm: socfpga: Enable DFU MMC support only if DM_MMC is enabled
It is not possible to compile DFU MMC support if the MMC support is not compiled into U-Boot. Secure the code with an ifdef to prevent compiler splat.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
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| #
4197a0f4 |
| 20-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Enable SPL MMC/SPI support only if DM_MMC/SPI is enabled
It is not possible to compile MMC/SPI SPL if the respective DM_MMC/DM_SPI bits are not enabled. Secure the code with an ifdef t
arm: socfpga: Enable SPL MMC/SPI support only if DM_MMC/SPI is enabled
It is not possible to compile MMC/SPI SPL if the respective DM_MMC/DM_SPI bits are not enabled. Secure the code with an ifdef to prevent compiler splat.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
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| #
6cdd465c |
| 22-Dec-2015 |
Chin Liang See <clsee@altera.com> |
arm: socfpga: Enable ubi and ubifs support
When QSPI and NAND is enabled, the ubi and ubifs support will be enabled too.
Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@o
arm: socfpga: Enable ubi and ubifs support
When QSPI and NAND is enabled, the ubi and ubifs support will be enabled too.
Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
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| #
55702fe2 |
| 21-Dec-2015 |
Chin Liang See <clsee@altera.com> |
arm: socfpga: Enabling MTD default partitions
Enabling MTD default partitions if its not defined in board configuration file. The layout as below device nor0 <ff705000.spi.0>, # parts = 6 #: name
arm: socfpga: Enabling MTD default partitions
Enabling MTD default partitions if its not defined in board configuration file. The layout as below device nor0 <ff705000.spi.0>, # parts = 6 #: name size offset mask_flags 0: u-boot 0x00100000 0x00000000 0 1: env1 0x00040000 0x00100000 0 2: env2 0x00040000 0x00140000 0 3: UBI 0x03e80000 0x00180000 0 4: boot 0x00e80000 0x00180000 0 5: rootfs 0x01000000 0x01000000 0
Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
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| #
79cc48e7 |
| 21-Dec-2015 |
Chin Liang See <clsee@altera.com> |
arm: socfpga: Consolidate SDMMC environment
Remove the duplication of SDMMC environment configuration from each boards' configuration header file into socfpga_common.h
Signed-off-by: Chin Liang See
arm: socfpga: Consolidate SDMMC environment
Remove the duplication of SDMMC environment configuration from each boards' configuration header file into socfpga_common.h
Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
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| #
25af71c4 |
| 07-Dec-2015 |
Thomas Chou <thomas@wytron.com.tw> |
net: eth_designware: select PHYLIB in Kconfig
Select PHYLIB in drivers/net/Kconfig. And remove CONFIG_PHYLIB from legacy board header files.
This fixed the warnings when both ALTERA_TSE and ETH_DES
net: eth_designware: select PHYLIB in Kconfig
Select PHYLIB in drivers/net/Kconfig. And remove CONFIG_PHYLIB from legacy board header files.
This fixed the warnings when both ALTERA_TSE and ETH_DESIGNWARE are selected.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reported-by: Pavel Machek <pavel@denx.de> Acked-by: Chin Liang See <clsee@altera.com> Acked-by: Pavel Machek <pavel@denx.de> Tested-by: Pavel Machek <pavel@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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| #
34059d8f |
| 20-Dec-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-socfpga
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| #
48275c96 |
| 03-Dec-2015 |
Dinh Nguyen <dinguyen@opensource.altera.com> |
arm: socfpga: fix trivial header preprocessor for socfpga_common.h
Replace__CONFIG_SOCFPGA_CYCLONE5_COMMON_H__ with __CONFIG_SOCFPGA_COMMON_H__ as the file is now called socfpga_common.h
Signed-off
arm: socfpga: fix trivial header preprocessor for socfpga_common.h
Replace__CONFIG_SOCFPGA_CYCLONE5_COMMON_H__ with __CONFIG_SOCFPGA_COMMON_H__ as the file is now called socfpga_common.h
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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| #
ccf5648e |
| 07-Dec-2015 |
Dinh Nguyen <dinguyen@opensource.altera.com> |
arm: socfpga: remove note to add CONFIG_USB_DWC2_REG_ADDR
Now that the USB DWC2 probing is done from OF, remove this note to add CONFIG_USB_DWC2_REG_ADDR.
Signed-off-by: Dinh Nguyen <dinguyen@opens
arm: socfpga: remove note to add CONFIG_USB_DWC2_REG_ADDR
Now that the USB DWC2 probing is done from OF, remove this note to add CONFIG_USB_DWC2_REG_ADDR.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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| #
ea082346 |
| 05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Switch CONFIG_HOSTNAME to CONFIG_SYS_BOARD
We already have the CONFIG_SYS_BOARD variable, which defines the name of the board. The value in CONFIG_HOSTNAME is exactly the same and is t
arm: socfpga: Switch CONFIG_HOSTNAME to CONFIG_SYS_BOARD
We already have the CONFIG_SYS_BOARD variable, which defines the name of the board. The value in CONFIG_HOSTNAME is exactly the same and is thus just a duplicity, so switch it to reuse CONFIG_SYS_BOARD .
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
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| #
a5cad677 |
| 05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Switch CONFIG_G_DNL_MANUFACTURER to CONFIG_SYS_VENDOR
We already have the CONFIG_SYS_VENDOR variable, which defines the manufacturer of the board. The value in CONFIG_G_DNL_MANUFACTURE
arm: socfpga: Switch CONFIG_G_DNL_MANUFACTURER to CONFIG_SYS_VENDOR
We already have the CONFIG_SYS_VENDOR variable, which defines the manufacturer of the board. The value in CONFIG_G_DNL_MANUFACTURER is just a duplicity, so switch it to reuse CONFIG_SYS_VENDOR .
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
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| #
123b7017 |
| 18-Dec-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-usb
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| #
e30824f4 |
| 19-Aug-2015 |
Marek Vasut <marex@denx.de> |
usb: s3c-otg: Rename USB_GADGET_S3C_UDC_OTG* to USB_GADGET_DWC2_OTG*
The s3c-otg IP block is in fact a DWC2 OTG one, so finally rename the config option to make it less misleading. No functional cha
usb: s3c-otg: Rename USB_GADGET_S3C_UDC_OTG* to USB_GADGET_DWC2_OTG*
The s3c-otg IP block is in fact a DWC2 OTG one, so finally rename the config option to make it less misleading. No functional change, just a mechanical change done using the following script:
git grep USB_GADGET_S3C_UDC_OTG | cut -d : -f 1 | sort -u | \ while read line ; do sed -i "s/USB_GADGET_S3C_UDC_OTG/USB_GADGET_DWC2_OTG/g" $line ; done
Signed-off-by: Marek Vasut <marex@denx.de>
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| #
2a8696df |
| 30-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
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| #
9a41404d |
| 26-Nov-2015 |
Chin Liang See <clsee@altera.com> |
mmc: socfpga_dw_mmc: Move drvsel and smplsel to dts
socfpga_dw_mmc driver will obtain the drvsel and smplsel value from device tree instead of definition in config header file.
Signed-off-by: Chin
mmc: socfpga_dw_mmc: Move drvsel and smplsel to dts
socfpga_dw_mmc driver will obtain the drvsel and smplsel value from device tree instead of definition in config header file.
Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Marek Vasut <marex@denx.de>
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| #
68d53420 |
| 25-Nov-2015 |
Bin Meng <bmeng.cn@gmail.com> |
sf: Move SPI flash drivers to defconfig
There are already Kconfig options for SPI flash drivers, but we have not moved them from config.h to defconfig files. This commit does this in a batch.
Signe
sf: Move SPI flash drivers to defconfig
There are already Kconfig options for SPI flash drivers, but we have not moved them from config.h to defconfig files. This commit does this in a batch.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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