| #
3285e6cb |
| 22-Apr-2015 |
Yangbo Lu <yangbo.lu@freescale.com> |
powerpc/t2080qds: enable eSDHC peripheral clock support
Enable eSDHC peripheral clock support. u-boot and linux will
use SD clock generated by peripheral clock instead of platform
clock.
Signed-off
powerpc/t2080qds: enable eSDHC peripheral clock support
Enable eSDHC peripheral clock support. u-boot and linux will
use SD clock generated by peripheral clock instead of platform
clock.
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
b46cf1b1 |
| 22-Apr-2015 |
Yangbo Lu <yangbo.lu@freescale.com> |
powerpc/t2080qds: enable eSDHC adapter card type identification
Enable eSDHC adapter card type identification and this will do
some corresponding operations and set 'adapter-type' property
for devic
powerpc/t2080qds: enable eSDHC adapter card type identification
Enable eSDHC adapter card type identification and this will do
some corresponding operations and set 'adapter-type' property
for device tree according SDHC Card ID.
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
5066e628 |
| 26-Mar-2015 |
Zhao Qiang <B45475@freescale.com> |
T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for down-training issue
T2080QDS PEX1/Slot#1 will down-train from x4 to x2,
with SRDS_PRTCL_S1 = 0x66 and SRDS_PRTCL_S2 = 0x15.
Soft reset PCIe can fix thi
T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for down-training issue
T2080QDS PEX1/Slot#1 will down-train from x4 to x2,
with SRDS_PRTCL_S1 = 0x66 and SRDS_PRTCL_S2 = 0x15.
Soft reset PCIe can fix this issue.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
b491d975 |
| 10-Apr-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master'
|
| #
482cbd55 |
| 31-Mar-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-nand-flash
|
| #
073adf98 |
| 03-Feb-2015 |
Peter Tyser <ptyser@xes-inc.com> |
nand: Remove CONFIG_MTD_NAND_VERIFY_WRITE
The CONFIG_MTD_NAND_VERIFY_WRITE has been removed from Linux for some
time and a more generic method of NAND verification now exists in U-Boot.
Signed-off-
nand: Remove CONFIG_MTD_NAND_VERIFY_WRITE
The CONFIG_MTD_NAND_VERIFY_WRITE has been removed from Linux for some
time and a more generic method of NAND verification now exists in U-Boot.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
show more ...
|
| #
e3bf81b1 |
| 16-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
|
| #
3fa66db4 |
| 08-Dec-2014 |
Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com> |
mpc85xx: inhibit qman and bman portals by default
Not all portals might be managed and therefore visible.
Set the isdr register so that the corresponding isr register
won't be set. This is required
mpc85xx: inhibit qman and bman portals by default
Not all portals might be managed and therefore visible.
Set the isdr register so that the corresponding isr register
won't be set. This is required when supporting power management.
Signed-off-by: Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
272a1acf |
| 08-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-mpc85xx
|
| #
3ad2737e |
| 31-Oct-2014 |
Ying Zhang <b40530@freescale.com> |
powerpc/t208xqds: VID support
The fuse status register provides the values from on-chip
voltage ID efuses programmed at the factory.
These values define the voltage requirements for
the chip. u-boot
powerpc/t208xqds: VID support
The fuse status register provides the values from on-chip
voltage ID efuses programmed at the factory.
These values define the voltage requirements for
the chip. u-boot reads FUSESR and translates the values
into the appropriate commands to set the voltage output
value of an external voltage regulator.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
ed9e4e42 |
| 27-Oct-2014 |
York Sun <yorksun@freescale.com> |
mpc85xx/t208xqds: Adjust DDR timing parameters
Adjust timing for dual-rank UDIMM, verified on M3CQ-8GHS3C0E for speed of
1066, 1333, 1600, 1866MT/s. The 1866 timing is copied to 2133 timing in
case
mpc85xx/t208xqds: Adjust DDR timing parameters
Adjust timing for dual-rank UDIMM, verified on M3CQ-8GHS3C0E for speed of
1066, 1333, 1600, 1866MT/s. The 1866 timing is copied to 2133 timing in
case such DIMM comes available.
Also update single-rank 1866 timing. Enable interactive debugging as well.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Shengzhou Liu <Shengzhou.Liu@freescale.com>
show more ...
|
| #
c66109cd |
| 13-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
config: remove redundant CONFIG_SYS_PROMPT defines
Since commit 0defddc851ed (config: Add a default CONFIG_SYS_PROMPT),
each board header does not need to define CONFIG_SYS_PROMPT
as long as it uses
config: remove redundant CONFIG_SYS_PROMPT defines
Since commit 0defddc851ed (config: Add a default CONFIG_SYS_PROMPT),
each board header does not need to define CONFIG_SYS_PROMPT
as long as it uses the default prompt "=> ".
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
show more ...
|
| #
a84c8107 |
| 20-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
|
| #
789490b6 |
| 07-Oct-2014 |
Ruchika Gupta <ruchika.gupta@freescale.com> |
mpc85xx: configs - Enable blob command in freescale platforms
Enable blob commands for platforms having SEC 4.0 or greater
for secure boot scenarios
Signed-off-by: Ruchika Gupta <ruchika.gupta@free
mpc85xx: configs - Enable blob command in freescale platforms
Enable blob commands for platforms having SEC 4.0 or greater
for secure boot scenarios
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
737537ef |
| 15-Oct-2014 |
Ruchika Gupta <ruchika.gupta@freescale.com> |
mpc85xx: configs - Add hash command in freescale platforms
Enable CAAM in platforms supporting the hardware block.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256
mpc85xx: configs - Add hash command in freescale platforms
Enable CAAM in platforms supporting the hardware block.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
e82abaeb |
| 11-Aug-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
boards.cfg
Signed-off-by: Stefano Babic <sbabic@denx.de>
|
| #
25b4adbb |
| 30-Jul-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
include: remove CONFIG_SPL/CONFIG_TPL definition in config headers
Now CONFIG_SPL and CONFIG_TPL are defined in Kconfig.
Remove the redundant definition in config headers.
Signed-off-by: Masahiro
include: remove CONFIG_SPL/CONFIG_TPL definition in config headers
Now CONFIG_SPL and CONFIG_TPL are defined in Kconfig.
Remove the redundant definition in config headers.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
4ce99570 |
| 30-Jul-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
include: define CONFIG_SPL and CONFIG_TPL as 1
We are about to switch to Kconfig in the next commit.
But there are something to get done beforehand.
In Kconfig, include/generated/autoconf.h defines
include: define CONFIG_SPL and CONFIG_TPL as 1
We are about to switch to Kconfig in the next commit.
But there are something to get done beforehand.
In Kconfig, include/generated/autoconf.h defines boolean
CONFIG macros as 1.
CONFIG_SPL and CONFIG_TPL, if defined, must be set to 1.
Otherwise, when switching to Kconfig, the build log
would be sprinkled with warning messages like this:
warning: "CONFIG_SPL" redefined [enabled by default]
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
d5f8a6dd |
| 28-Jul-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
|
| #
fb536878 |
| 23-Jul-2014 |
Shengzhou Liu <Shengzhou.Liu@freescale.com> |
board/freescale: use generic board architecture for t2080qds and t2080rdb
Tested with NOR boot and NAND boot on T2080QDS and T2080RDB.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
|
| #
09c2046f |
| 21-May-2014 |
Shengzhou Liu <Shengzhou.Liu@freescale.com> |
board/t2080qds: enable sst and eon spi flash for nor boot
Remove unnecessary condition CONFIG_RAMBOOT_PBL to
have SST and EON SPI flash work in case of NOR boot.
Signed-off-by: Shengzhou Liu <Sheng
board/t2080qds: enable sst and eon spi flash for nor boot
Remove unnecessary condition CONFIG_RAMBOOT_PBL to
have SST and EON SPI flash work in case of NOR boot.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
dab5e346 |
| 16-Jul-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
Conflicts:
boards.cfg
|
| #
ed1d98d8 |
| 25-Jun-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
|
| #
3e1fa221 |
| 05-Jun-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
|
| #
40483e1e |
| 20-May-2014 |
Shengzhou Liu <Shengzhou.Liu@freescale.com> |
board/t2080qds: some update for ddr
- add support for 2nd DIMM slot.
- make it work with DIMM which is less than 2GB.
Verified with two 2GB UDIMM MT9JSF25672AZ-2G1K1 in two DIMM slots.
Signed-off-
board/t2080qds: some update for ddr
- add support for 2nd DIMM slot.
- make it work with DIMM which is less than 2GB.
Verified with two 2GB UDIMM MT9JSF25672AZ-2G1K1 in two DIMM slots.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|