| #
1f6aa622 |
| 13-Oct-2008 |
Stefan Roese <sr@denx.de> |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
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| #
1e841086 |
| 12-Oct-2008 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of ssh://10.10.0.7/home/wd/git/u-boot/master
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| #
7fd0bea2 |
| 24-Sep-2008 |
Kim Phillips <kim.phillips@freescale.com> |
mpc83xx: don't disable autoboot
bootdelay set to -1 'permanently' disables autobooting, even if bootcmd is specified. Change to a positive value to allow autobooting when a bootcmd is set.
Reporte
mpc83xx: don't disable autoboot
bootdelay set to -1 'permanently' disables autobooting, even if bootcmd is specified. Change to a positive value to allow autobooting when a bootcmd is set.
Reported-by: Coray Tate <Coray.Tate@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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| #
162c41c0 |
| 23-Sep-2008 |
Kim Phillips <kim.phillips@freescale.com> |
mpc83xx: add h/w flash protection to board configs
the operating system may leave flash in a h/w locked state after writing. This allows u-boot to continue to write flash by enabling h/w unlocking b
mpc83xx: add h/w flash protection to board configs
the operating system may leave flash in a h/w locked state after writing. This allows u-boot to continue to write flash by enabling h/w unlocking by default.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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| #
225f0eaa |
| 12-Sep-2008 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of /home/wd/git/u-boot/custodians
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| #
afbc5263 |
| 12-Sep-2008 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'Makefile-next' of git://git.denx.de/u-boot-arm
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| #
0e8d1586 |
| 10-Sep-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ENV macros to CONFIG_ENV
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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| #
5a1aceb0 |
| 10-Sep-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASH
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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| #
93f6d725 |
| 10-Sep-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ENV_IS_NOWHERE in CONFIG_ENV_IS_NOWHERE
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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| #
becbbc7b |
| 14-Aug-2008 |
Stefan Roese <sr@denx.de> |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot into next
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| #
2fd0aad4 |
| 13-Aug-2008 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'Makefile' of git://git.denx.de/u-boot-arm
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| #
00b1883a |
| 12-Aug-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
drivers/mtd: Move conditional compilation to Makefile
rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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| #
794a5924 |
| 10-Jul-2008 |
Markus Klotzbuecher <mk@denx.de> |
Merge branch 'master' of git://www.denx.de/git/u-boot
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| #
e44f3ea4 |
| 09-Jun-2008 |
Ben Warren <biggerbadderben@gmail.com> |
Merge branch 'master' of git://git.denx.de/u-boot
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| #
1a247ba7 |
| 06-Jun-2008 |
Jon Loeliger <jdl@freescale.com> |
Merge commit 'wd/master'
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| #
8155efbd |
| 04-Jun-2008 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of ssh://mercury/home/wd/git/u-boot/master
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| #
31d82672 |
| 09-May-2008 |
Becky Bruce <becky.bruce@freescale.com> |
PPC: Create and use CONFIG_HIGH_BATS
Change all code that conditionally operates on high bat registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS instead of the myriad ways this is done now. D
PPC: Create and use CONFIG_HIGH_BATS
Change all code that conditionally operates on high bat registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS instead of the myriad ways this is done now. Define the option for every config for which high bats are supported (and enabled by early boot, on parts where they're not always enabled)
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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| #
57533b88 |
| 25-Apr-2008 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx
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| #
b2115757 |
| 24-Apr-2008 |
Kim Phillips <kim.phillips@freescale.com> |
mpc83xx: bump loadaddr over fdtaddr to 0x500000
this seems as a good compromise between human memory, typing, and last but not least, to accommodate for current and future kernel bloat.
Signed-off-
mpc83xx: bump loadaddr over fdtaddr to 0x500000
this seems as a good compromise between human memory, typing, and last but not least, to accommodate for current and future kernel bloat.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Dave Liu <daveliu@freescale.com>
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| #
e59af4b6 |
| 07-Apr-2008 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx
Conflicts:
lib_ppc/board.c
Signed-off-by: Wolfgang Denk <wd@denx.de>
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| #
3596d55e |
| 29-Mar-2008 |
Gerald Van Baren <vanbaren@cideas.com> |
Merge git://www.denx.de/git/u-boot into uboot
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| #
5b2793a3 |
| 27-Mar-2008 |
Michael Barkowski <michael.barkowski@freescale.com> |
mpc8323erdb: fix EEPROM page size and get MAC from EEPROM
This patch fixes eeprom page size so that you can now write more than 64 bytes at a time.
It also makes the board take MAC addresses, if fo
mpc8323erdb: fix EEPROM page size and get MAC from EEPROM
This patch fixes eeprom page size so that you can now write more than 64 bytes at a time.
It also makes the board take MAC addresses, if found, from EEPROM.
User should place up to 4 addresses at offset 0x7f00, for eth{,1,2,3}addr. Any unused addresses should be zero. This group of four six-byte values should have it's CRC at the end. crc32 and eeprom commands can be used to accomplish this.
If CRC fails, MAC addresses come from the environment. If CRC succeeds, the environment is overwritten at startup.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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| #
8f325cff |
| 28-Mar-2008 |
Michael Barkowski <michael.barkowski@freescale.com> |
mpc8323erdb: define CONFIG_PCI_SKIP_HOST_BRIDGE
Commit 55774b512fdf63c0516d441cc5da7c54bbffb7f2 broke the onboard USB controller on the PCI bus in Linux on the MPC8323ERDB.
This fixes it by definin
mpc8323erdb: define CONFIG_PCI_SKIP_HOST_BRIDGE
Commit 55774b512fdf63c0516d441cc5da7c54bbffb7f2 broke the onboard USB controller on the PCI bus in Linux on the MPC8323ERDB.
This fixes it by defining CONFIG_PCI_SKIP_HOST_BRIDGE in the board's config file.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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| #
0fa7a1b4 |
| 20-Mar-2008 |
Michael Barkowski <michael.barkowski@freescale.com> |
mpc8323erdb: remove RTC and add EEPROM
There's no on-board RTC on the MPC8323ERDB, but there is an EEPROM.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Acked-by: Kim Phillips
mpc8323erdb: remove RTC and add EEPROM
There's no on-board RTC on the MPC8323ERDB, but there is an EEPROM.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
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| #
5bbeea86 |
| 20-Mar-2008 |
Michael Barkowski <michael.barkowski@freescale.com> |
mpc8323erdb: Improve the system performance
The following changes are based on kernel UCC ethernet performance:
1. Make the CSB bus pipeline depth as 4, and enable the repeat mode 2. Optimize tra
mpc8323erdb: Improve the system performance
The following changes are based on kernel UCC ethernet performance:
1. Make the CSB bus pipeline depth as 4, and enable the repeat mode 2. Optimize transactions between QE and CSB. Added CFG_SPCR_OPT switch to enable this setting.
The following changes are based on the App Note AN3369 and verified to improve memory latency using LMbench:
3. CS0_CONFIG[AP_n_EN] is changed from 1 to 0 4. CS0_CONFIG[ODT_WR_CONFIG] set to 1. Was a reserved setting previously. 5. TIMING_CFG_1[WRREC] is changed from 3clks to 2clks (based on Twr=15ns, and this was already the setting in DDR_MODE) 6. TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on Trp=15ns) 7. TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on Tras=40ns) 8. TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on Trcd=15ns) 9. TIMING_CFG_1[REFREC] changed from 21 clks to 11clks. (based on Trfc=75ns) 10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks. (based on Tfaw=50ns) 11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based on CL=3 and WL=2).
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
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