| #
707acd01 |
| 26-Jan-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
| #
d40ddae4 |
| 15-Jan-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
powerpc: mpc85xx: move CONFIG_MPC85xx definition to CPU config.mk
Define CONFIG_MPC85xx in arch/powerpc/cpu/mpc85xx/config.mk because all target boards with mpc85xx cpu define it.
Signed-off-by: Ma
powerpc: mpc85xx: move CONFIG_MPC85xx definition to CPU config.mk
Define CONFIG_MPC85xx in arch/powerpc/cpu/mpc85xx/config.mk because all target boards with mpc85xx cpu define it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
show more ...
|
| #
e222b1f3 |
| 14-Jan-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx:Increase binary size for P, B & T series boards.
u-boot binary size for Freescale mpc85xx platforms is 512KB. This has been reached to upper limit for some of the platforms causig li
powerpc/mpc85xx:Increase binary size for P, B & T series boards.
u-boot binary size for Freescale mpc85xx platforms is 512KB. This has been reached to upper limit for some of the platforms causig linker error.
So, Increase the u-boot binary size to 768KB.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
show more ...
|
| #
690e4258 |
| 13-Jan-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc:Rename CONFIG_PBLRCW_CONFIG & CONFIG_SYS_FSL_PBL_PBI
Rename CONFIG_PBLRCW_CONFIG and CONFIG_PBLRCW_CONFIG.
Also add their details in README.
Signed-off-by: Prabhakar Kushwaha <prabhakar@fr
powerpc:Rename CONFIG_PBLRCW_CONFIG & CONFIG_SYS_FSL_PBL_PBI
Rename CONFIG_PBLRCW_CONFIG and CONFIG_PBLRCW_CONFIG.
Also add their details in README.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
e7be1822 |
| 06-Jan-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
|
| #
ab13ad58 |
| 17-Dec-2013 |
York Sun <yorksun@freescale.com> |
powerpc/B4860QDS: Define new nand_ecclayout structure macros
Define CONFIG_SYS_NAND_MAX_ECCPOS and CONFIG_SYS_NAND_MAX_OOBFREE to reduce the image size, by taking advantage of the new nand_ecclayout
powerpc/B4860QDS: Define new nand_ecclayout structure macros
Define CONFIG_SYS_NAND_MAX_ECCPOS and CONFIG_SYS_NAND_MAX_OOBFREE to reduce the image size, by taking advantage of the new nand_ecclayout structure.
Signed-off-by: York Sun <yorksun@freescale.com> CC: Prabhakar Kushwaha <prabhakar@freescale.com> CC: Scott Wood <scottwood@freescale.com>
show more ...
|
| #
2c808a12 |
| 01-Dec-2013 |
Vladimir Zapolskiy <vz@mleia.com> |
kgdb: configs: remove obsolete CONFIG_KGDB_SER_INDEX
The last users of CONFIG_KGDB_SER_INDEX were removed more than 3 years ago in commits 550650ddd0 and bf16500f79, either kgdb subsystem should car
kgdb: configs: remove obsolete CONFIG_KGDB_SER_INDEX
The last users of CONFIG_KGDB_SER_INDEX were removed more than 3 years ago in commits 550650ddd0 and bf16500f79, either kgdb subsystem should care about this parameter or it should be gone completely.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
show more ...
|
| #
f15ea6e1 |
| 10-Dec-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard
Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compul
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard
Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compulab/cm_t335/u-boot.lds
show more ...
|
| #
77fdd6d1 |
| 02-Dec-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
|
| #
5614e71b |
| 30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Moving Freescale DDR driver to a common driver
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs.
Signed
Driver/DDR: Moving Freescale DDR driver to a common driver
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs.
Signed-off-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
cdb23792 |
| 04-Oct-2013 |
Rob Herring <rob.herring@calxeda.com> |
config: remove platform CONFIG_SYS_HZ definition part 1/2
Remove platform CONFIG_SYS_HZ definition for configs A-Z*.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
|
| #
0defddc8 |
| 30-Sep-2013 |
Rob Herring <rob.herring@calxeda.com> |
config: Add a default CONFIG_SYS_PROMPT
The definitions for CONFIG_SYS_PROMPT are varied with little reason other than to display the board name. Over half the definitions are "==> ", so make this t
config: Add a default CONFIG_SYS_PROMPT
The definitions for CONFIG_SYS_PROMPT are varied with little reason other than to display the board name. Over half the definitions are "==> ", so make this the default. The rest of the boards remain unchanged to avoid breaking any external scripts expecting a certain prompt.
Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
show more ...
|
| #
83d92566 |
| 22-Sep-2013 |
Shaohui Xie <Shaohui.Xie@freescale.com> |
powerpc/B4860: enable PBL tool for B4860
Use a default RCW of protocol 0x2A_0x98, and a PBI configure file which uses CPC1 as 512KB SRAM, then PBL tool can be used on B4860 to build a pbl boot image
powerpc/B4860: enable PBL tool for B4860
Use a default RCW of protocol 0x2A_0x98, and a PBI configure file which uses CPC1 as 512KB SRAM, then PBL tool can be used on B4860 to build a pbl boot image.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
show more ...
|
| #
0d2cff2d |
| 21-Aug-2013 |
Po Liu <po.liu@freescale.com> |
powerpc: add CONFIG_SECURE_BOOT condition into fsl_secure_boot.h
This patch is for board config file not to add CONFIG_SECURE_BOOT condition for include the asm/fsl_secure_boot.h.
Signed-off-by: Po
powerpc: add CONFIG_SECURE_BOOT condition into fsl_secure_boot.h
This patch is for board config file not to add CONFIG_SECURE_BOOT condition for include the asm/fsl_secure_boot.h.
Signed-off-by: Po Liu <Po.Liu@freescale.com>
show more ...
|
| #
b98d9341 |
| 13-Aug-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
|
| #
0795eff3 |
| 03-Jul-2013 |
Minghuan Lian <Minghuan.Lian@freescale.com> |
powerpc/rman: fix RMan support for t4240 and b4860
1. Add CONFIG_SYS_DPAA_RMAN macro to t4240 and b4860. 2. Decrease RMan liodn offset number. SET_RMAN_LIODN() is used to set liodn offset of RMan bl
powerpc/rman: fix RMan support for t4240 and b4860
1. Add CONFIG_SYS_DPAA_RMAN macro to t4240 and b4860. 2. Decrease RMan liodn offset number. SET_RMAN_LIODN() is used to set liodn offset of RMan blocks 0-3. For t4240 and b4860, RMan liodn base is assigned to 922, the original offset number is too large that the liodn (base+offset 922+678 = 1600) is greater than 0x500 the maximum liodn number.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
cb033741 |
| 02-Jul-2013 |
Shaveta Leekha <shaveta@freescale.com> |
board/b4860qds: Add support for configuring SerDes1 Refclks
1) Add support in B4860 board files for using IDT driver where IDT8T49N222A is a low phase noise Frequency Translator / Synthesizer
board/b4860qds: Add support for configuring SerDes1 Refclks
1) Add support in B4860 board files for using IDT driver where IDT8T49N222A is a low phase noise Frequency Translator / Synthesizer that generate different refclks for SerDes modules, used this driver for reconfiguring SerDes1 Refclks(based on SerDes1 protocols) for CPRI to work. CPRI works on 122.88MHz and default refclks coming on board are not suitable for it 2) Move SerDes1 refclk1 source selection from eth_b4860qds.c file to b4860qds board file, as SerDes1 Refclk1 would come from PHY MUX in case of certain protocols, that have been checked here. This change would make on board SGMIIs to work 3) Add I2C addresses for IDT8T49N222A devices in board/include file 4) Add define for PCA-I2C bus multiplexer, on which IDT devices exist
Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
d2ab4bbc |
| 25-Jun-2013 |
York Sun <yorksun@freescale.com> |
powerpc/corenet: Move CONFIG_FSL_CORENET out of board header file
Move CONFIG_FSL_CORENET define to config_mpc85xx.h. It is not board specific feature and belongs to SoC header.
Signed-off-by: York
powerpc/corenet: Move CONFIG_FSL_CORENET out of board header file
Move CONFIG_FSL_CORENET define to config_mpc85xx.h. It is not board specific feature and belongs to SoC header.
Signed-off-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
326ea986 |
| 31-Jul-2013 |
Stefano Babic <sbabic@denx.de> |
Merge git://git.denx.de/u-boot-arm
Conflicts: board/freescale/mx6qsabrelite/Makefile board/freescale/mx6qsabrelite/mx6qsabrelite.c include/configs/mx6qsabrelite.h
Signed-off-by: Stefano Babic <s
Merge git://git.denx.de/u-boot-arm
Conflicts: board/freescale/mx6qsabrelite/Makefile board/freescale/mx6qsabrelite/mx6qsabrelite.c include/configs/mx6qsabrelite.h
Signed-off-by: Stefano Babic <sbabic@denx.de>
show more ...
|
| #
8b485ba1 |
| 25-Jul-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into u-boot-arm/master
|
| #
c2120fbf |
| 24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c
The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion.
Conflicts: board/sandburst/common/ppc440gx_i
Merge branch 'master' of git://git.denx.de/u-boot-i2c
The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion.
Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h
Signed-off-by: Tom Rini <trini@ti.com>
show more ...
|
| #
1a459660 |
| 08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
|
| #
00f792e0 |
| 24-Oct-2012 |
Heiko Schocher <hs@denx.de> |
i2c, fsl_i2c: switch to new multibus/multiadapter support
- added to fsl_i2c driver new multibus/multiadpater support - adapted all config files, which uses this driver
Signed-off-by: Heiko Schoche
i2c, fsl_i2c: switch to new multibus/multiadapter support
- added to fsl_i2c driver new multibus/multiadpater support - adapted all config files, which uses this driver
Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
show more ...
|
| #
4d0e6e0d |
| 17-May-2013 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
board/b4860qds: Relax NOR flash teadc timing parameter
Relax parameters to give address latching more time to setup.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy
board/b4860qds: Relax NOR flash teadc timing parameter
Relax parameters to give address latching more time to setup.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
show more ...
|
| #
5870fe44 |
| 07-May-2013 |
Liu Gang <Gang.Liu@freescale.com> |
powerpc/b4860qds: Slave module for boot from SRIO and PCIE
When a b4860qds board boots from SRIO or PCIE, it needs to finish these processes: 1. Set all the cores in holdoff status. 2. Set the boo
powerpc/b4860qds: Slave module for boot from SRIO and PCIE
When a b4860qds board boots from SRIO or PCIE, it needs to finish these processes: 1. Set all the cores in holdoff status. 2. Set the boot location to one PCIE or SRIO interface by RCW. 3. Set a specific TLB entry for the boot process. 4. Set a LAW entry with the TargetID of one PCIE or SRIO for the boot. 5. Set a specific TLB entry in order to fetch ucode and ENV from master. 6. Set a LAW entry with the TargetID one of the PCIE ports for ucode and ENV. 7. Slave's u-boot image should be generated specifically by make xxxx_SRIO_PCIE_BOOT_config. This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.
For more information about the feature of Boot from SRIO/PCIE, please refer to the document doc/README.srio-pcie-boot-corenet.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
show more ...
|