usb: dwc3: Fix warnings on 64-bit builds

Change aritmentics to use 64bit types to be compatible with 64bit
builds.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

usb: dwc3: Correct clean up code for requests

For u-boot dwc3 driver the scatter gather list support has been removed
from original linux code. It is correct, since we try to send one request
at a t

usb: dwc3: Correct clean up code for requests

For u-boot dwc3 driver the scatter gather list support has been removed
from original linux code. It is correct, since we try to send one request
at a time.
However, the cleanup left spurious break, which caused early exit from
loop at dwc3_cleanup_done_reqs() function. As a result the dwc3_gadget_giveback()
wasn't called and caused USB Mass Storage to hang.

This commit removes this problem and refactor the code to remove superfluous
do { } while(1) loop.

Test HW: Odroid XU3 (with ./test/ums/ums_gadget_test.sh)

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>

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usb: dwc3: gadget: Set non EP0 max packet limit to 512B

Commit "drivers/dwc3: add a workaround for too small OUT requests"
sets max packet for OUT requests when transfer is smaller.

Until this chan

usb: dwc3: gadget: Set non EP0 max packet limit to 512B

Commit "drivers/dwc3: add a workaround for too small OUT requests"
sets max packet for OUT requests when transfer is smaller.

Until this change the default maxpacket for non EP0 EPs was 1024. This is
too much, since UMS LBA size is 512B

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>

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usb: dwc3: gadget: Set all ctrl fields of Transfer Control Blocks (TRB) to be LST

It turned out that current dwc3 gadget code is preparing multiple TRBs
for a transfer. Unfortunately, when multiple

usb: dwc3: gadget: Set all ctrl fields of Transfer Control Blocks (TRB) to be LST

It turned out that current dwc3 gadget code is preparing multiple TRBs
for a transfer. Unfortunately, when multiple requests are in the same
queue, only for the last one the LST (last) ctrl bit is set.

Due to that dwc3 HW executes all TRBs up till the one marked as last.
Unfortunately, UMS requires call of ->complete callback after any send TRB.
This is the reason for "hangs" in executing UMS.

This code simplifies this situation and set each TRB's ctrl field bit to be
last (LST bit).

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>

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usb: dwc3: optimize interrupt loop

There is no point in calling dwc3_thread_interrupt() if no event is
pending. There is also no point in flushing event cache in EVERY loop
iteration.

Signed-off-by

usb: dwc3: optimize interrupt loop

There is no point in calling dwc3_thread_interrupt() if no event is
pending. There is also no point in flushing event cache in EVERY loop
iteration.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

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usb: dwc3: add a workaround for too small OUT requests

DWC3 hangs on OUT requests smaller than maxpacket size,
so HACK the request length to be at least equal to maxpacket size.

Signed-off-by: Mare

usb: dwc3: add a workaround for too small OUT requests

DWC3 hangs on OUT requests smaller than maxpacket size,
so HACK the request length to be at least equal to maxpacket size.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

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usb: dwc3: Remove BIT(x) macro from DWC3's gadget code

The BIT() macro is used only in those places, so it is reasonable to
replace it by a constant value.

Signed-off-by: Lukasz Majewski <l.majewsk

usb: dwc3: Remove BIT(x) macro from DWC3's gadget code

The BIT() macro is used only in those places, so it is reasonable to
replace it by a constant value.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>

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usb: dwc3: Add chained TRB support for ep0

dwc3 can do only max packet aligned transfers. So in case request length
is not max packet aligned and is bigger than DWC3_EP0_BOUNCE_SIZE
two chained TRBs

usb: dwc3: Add chained TRB support for ep0

dwc3 can do only max packet aligned transfers. So in case request length
is not max packet aligned and is bigger than DWC3_EP0_BOUNCE_SIZE
two chained TRBs is required to handle the transfer.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>

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dwc3: flush the buffers before using it

In the linux kernel, non cacheable buffers are used. However in uboot
since there are no APIs to allocate non cacheable memory, all
the buffers should be flus

dwc3: flush the buffers before using it

In the linux kernel, non cacheable buffers are used. However in uboot
since there are no APIs to allocate non cacheable memory, all
the buffers should be flushed before using it.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

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usb: dwc3: gadget: make dwc3 gadget build in uboot

Did a bunch of things to get dwc3/gadget.c compile in u-boot without
build errors and warnings
*) Changed the included header files to that used in

usb: dwc3: gadget: make dwc3 gadget build in uboot

Did a bunch of things to get dwc3/gadget.c compile in u-boot without
build errors and warnings
*) Changed the included header files to that used in u-boot.
*) Used dma_alloc_coherent and dma_free_coherent APIs of u-boot
*) removed sg support
*) remove jiffies and used a simple while loop
*) removed irq support and added a function to call these interrupt handler.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>

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usb: dwc3: remove pm related operations from dwc3 driver

Removed all pm related operations including pm_runtime APIs,
suspend/resume hooks as support for these are not present in u-boot.

Signed-off

usb: dwc3: remove pm related operations from dwc3 driver

Removed all pm related operations including pm_runtime APIs,
suspend/resume hooks as support for these are not present in u-boot.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>

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usb: dwc3: remove trace_* APIs from dwc3 driver

Removed most of the trace_* APIs from dwc3 driver since tracepoints are not
supported in u-boot. Replaced some of the trace_* API with dev_dbg/dev/vdb

usb: dwc3: remove trace_* APIs from dwc3 driver

Removed most of the trace_* APIs from dwc3 driver since tracepoints are not
supported in u-boot. Replaced some of the trace_* API with dev_dbg/dev/vdbg.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Review-by: Lukasz Majewski <l.majewski@samsung.com>

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usb: dwc3: Modify the file headers to u-boot format

Modified the file header to the format that is used in u-boot. Also
included in the header, the commit in linux kernel from which each of
these fi

usb: dwc3: Modify the file headers to u-boot format

Modified the file header to the format that is used in u-boot. Also
included in the header, the commit in linux kernel from which each of
these files are added.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>

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usb: dwc3: add dwc3 folder from linux kernel to u-boot

Added dwc3 folder from linux kernel 3.19-rc1 (97bf6af1f9)
to u-boot. This will be adapted to work with u-boot in the
following patches.

Signed

usb: dwc3: add dwc3 folder from linux kernel to u-boot

Added dwc3 folder from linux kernel 3.19-rc1 (97bf6af1f9)
to u-boot. This will be adapted to work with u-boot in the
following patches.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>

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