| 22b43223 | 13-Jan-2021 |
Zhihuan He <huan.he@rock-chips.com> |
drivers: ram: rv1126: workaround pageclose bug
If setting pageclose = 1 && pageclose_timer = 0, will data err
in lp4 328MHz. But running ok in 1056MHz.
Signed-off-by: Zhihuan He <huan.he@rock-chips
drivers: ram: rv1126: workaround pageclose bug
If setting pageclose = 1 && pageclose_timer = 0, will data err
in lp4 328MHz. But running ok in 1056MHz.
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Iebc32d05ea0740c0e848bfd1abd341d8bc12f44d
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| bf922fc8 | 19-May-2021 |
Wesley Yao <wesley.yao@rock-chips.com> |
drivers: ram: rv1126: fix calculating of MSCH_DeviceSize
Shifting 1llu to generate cs_cap[0] in dram_all_config(), in order to
avoid the shift calculation error.
Signed-off-by: Wesley Yao <wesley.y
drivers: ram: rv1126: fix calculating of MSCH_DeviceSize
Shifting 1llu to generate cs_cap[0] in dram_all_config(), in order to
avoid the shift calculation error.
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I61a1f22955407bb5a32db1c893f78df900be7f96
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| e2dc1cc0 | 12-May-2021 |
Wesley Yao <wesley.yao@rock-chips.com> |
drivers: ram: rv1126: Modify tRFC and related timing based on DDR
capacity
Add pctl_modify_trfc() in ddr_set_rate() to modify tRFC, tXS/tXSR,
tXS_ABORT & tXS_FAST based on DDR capacity
Signed-off-b
drivers: ram: rv1126: Modify tRFC and related timing based on DDR
capacity
Add pctl_modify_trfc() in ddr_set_rate() to modify tRFC, tXS/tXSR,
tXS_ABORT & tXS_FAST based on DDR capacity
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I53649af1a32a4eca49348afbc26d68cd2aec6d3c
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| 330cd12f | 26-May-2021 |
Wesley Yao <wesley.yao@rock-chips.com> |
drivers: ram: rv1126: fix return value of read_mr()
In read_mr(), return the value corrected by dq_map for LPDDR3.
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Ib9de5b9b10e776f5
drivers: ram: rv1126: fix return value of read_mr()
In read_mr(), return the value corrected by dq_map for LPDDR3.
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Ib9de5b9b10e776f53f6fe686ccfdd198f1a0acd1
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| 3993b0c7 | 07-May-2021 |
Wesley Yao <wesley.yao@rock-chips.com> |
drivers: ram: rv1126: Set default value of die bus with to x16 when bus
width is x16/x32 of DDR3
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I4808d2e723e6b238b52482d4d67e7502da9
drivers: ram: rv1126: Set default value of die bus with to x16 when bus
width is x16/x32 of DDR3
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I4808d2e723e6b238b52482d4d67e7502da9f7cb4
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| 9050e1f8 | 07-May-2021 |
Wesley Yao <wesley.yao@rock-chips.com> |
drivers: ram: rv1126: fix tZQLAT of LPDDR4
set t_zq_short_nop(reg ZQCTL0) to tZQLAT for LPDDR4
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I5fa2e65b642b83529caa60bf5893398bcb84
drivers: ram: rv1126: fix tZQLAT of LPDDR4
set t_zq_short_nop(reg ZQCTL0) to tZQLAT for LPDDR4
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I5fa2e65b642b83529caa60bf5893398bcb84cca5
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| 9d5c314b | 25-Apr-2021 |
Wesley Yao <wesley.yao@rock-chips.com> |
drivers: ram: rv1126: Support RV1126 DDR3 x8 bus width
sdram_rv1126.c: 22-28 added to ddrconfig calculate.
sdram_rv1126.c: BurstSize & BurstPenalty in NOC are set to 0x1 & 0x4
when x8 bus width
sdra
drivers: ram: rv1126: Support RV1126 DDR3 x8 bus width
sdram_rv1126.c: 22-28 added to ddrconfig calculate.
sdram_rv1126.c: BurstSize & BurstPenalty in NOC are set to 0x1 & 0x4
when x8 bus width
sdram_rv1126.c: When detecting DDR3 capacity, the initial value of bus
width is set to 8. Add detection of x8 bus width through read gate
training
sdram_common.c: When detecting DDR3 die bus width, dbw = x8 if bw == x8
sdram-rv1126-ddr3-detect-xxx.inc: Bus width defaults to x8
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Ic6a635bcb3a5902f5f7871516dca6ae5de8398fc
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| 82ad70b5 | 25-Apr-2021 |
Wesley Yao <wesley.yao@rock-chips.com> |
drivers: ram: rv1126: Modify the calculation of dqs default skew value
of write train
Ignore unused bytes when calculating dqs default skew value of write
train to fit x16/x8 bus width.
Signed-off-
drivers: ram: rv1126: Modify the calculation of dqs default skew value
of write train
Ignore unused bytes when calculating dqs default skew value of write
train to fit x16/x8 bus width.
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I8a4464ae28162a42897374204710d516d0b9be46
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| 8889aef0 | 31-Mar-2021 |
Wesley Yao <wesley.yao@rock-chips.com> |
cmd: ddr_tool: ddr_dq_eye_tool: fix the bug if DQ byte select don't use default value
Fix the bug if DQ byte select don't use default value, and read/write training result would be saved and shown c
cmd: ddr_tool: ddr_dq_eye_tool: fix the bug if DQ byte select don't use default value
Fix the bug if DQ byte select don't use default value, and read/write training result would be saved and shown correctly for DDR DQ eye tool.
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I9624152585a6fd4a732d5a77957ebcf9a1bee563
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| 7a110f3a | 24-Mar-2021 |
Wesley Yao <wesley.yao@rock-chips.com> |
Change Flag of DDR DQ Eye Tool
Use DDR_DQ_EYE_FLAG instead of FSP_FLAG to avoid duplicate definition of FAP_FLAG in ddr branch
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I3bf1
Change Flag of DDR DQ Eye Tool
Use DDR_DQ_EYE_FLAG instead of FSP_FLAG to avoid duplicate definition of FAP_FLAG in ddr branch
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I3bf16fafc2e46d4002481ed03b5c689f26dccfad
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| c71eeac4 | 18-Mar-2021 |
Wesley Yao <wesley.yao@rock-chips.com> |
cmd: ddr_tool: ddr_dq_eye.c: Add DDR DQ eye tool for RV1126 and RK356x
In the loader, store DDR read & write eye training results.
In U-Boot, use "ddr_dq_eye" command to show DDR DQ eye with the tra
cmd: ddr_tool: ddr_dq_eye.c: Add DDR DQ eye tool for RV1126 and RK356x
In the loader, store DDR read & write eye training results.
In U-Boot, use "ddr_dq_eye" command to show DDR DQ eye with the training
results.
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Ib360acdc843e3a6a6298d598341176746bf463e9
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| c69667e0 | 13-Jan-2021 |
Tang Yun ping <typ@rock-chips.com> |
drivers: ram: sdram_common: add os reg v3 define
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I2cedcddcebdfd32da113edd1e18d2498b5813e22 |
| 1a6462e1 | 13-Jan-2021 |
Tang Yun ping <typ@rock-chips.com> |
drivers: ram: sdram_common: add 4rank support for sdram_cap_info
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Icda7bdc73e6c36c1351f0671b374a9d906dafec8 |
| bc45a182 | 23-Dec-2020 |
Zhihuan He <huan.he@rock-chips.com> |
drivers: ram: rockchip: rk3308: coding style
Change-Id: Icf1bb1d8ca588b244eb7b736d0e033013d023851
Signed-off-by: Zhihuan He <huan.he@rock-chips.com> |
| de9242dc | 04-Nov-2020 |
Tang Yun ping <typ@rock-chips.com> |
drivers: ram: sdram_common: add 4rank support for rk3568
Change-Id: I179ff4ef1f07a881f76ac086c4ab330e3ff82d73
Signed-off-by: Tang Yun ping <typ@rock-chips.com> |
| bc5b1ed8 | 19-Dec-2020 |
Joseph Chen <chenjh@rock-chips.com> |
Revert "rockchip: rk3568: remove TPL code"
This reverts commit d77dbb6e1cf17678b428f8b44763177c6b5fcc50.
Reason: if we remove TPL code, there will be different compile
path for SPL to initial platf
Revert "rockchip: rk3568: remove TPL code"
This reverts commit d77dbb6e1cf17678b428f8b44763177c6b5fcc50.
Reason: if we remove TPL code, there will be different compile
path for SPL to initial platform, which takes some unknonw issue
in kernel. So let's bring back TPL.
Change-Id: Iee1ab45d0a622425b616b22f8fbcdb7b28f057f7
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
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| d77dbb6e | 15-Dec-2020 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: rk3568: remove TPL code
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I4b7d7f830d7cc9a5d6623f2add9a4755ce833f2c |
| 379e9cab | 17-Nov-2020 |
Zhihuan He <huan.he@rock-chips.com> |
drivers: ram: rk3308: add sdram_rk3308.c build
Change-Id: I43079e6709d6eeb691eb73786bba7920c081b9c9
Signed-off-by: Zhihuan He <huan.he@rock-chips.com> |
| 8ec8d58e | 09-Nov-2020 |
Zhihuan He <huan.he@rock-chips.com> |
drivers: ram: rockchip: add rk3308 sdram driver
Change-Id: I96160af2095ba21b440c6d3789349d8cbc4fea75
Signed-off-by: Zhihuan He <huan.he@rock-chips.com> |
| b86c816c | 09-Nov-2020 |
Zhihuan He <huan.he@rock-chips.com> |
drivers: ram: rockchip: rv1108: clean up the code
Change-Id: I3446805fd9c320ddd49b9cb12df82943057ed9ee
Signed-off-by: Zhihuan He <huan.he@rock-chips.com> |
| 547ad455 | 03-Nov-2020 |
YouMin Chen <cym@rock-chips.com> |
drivers: ram: rockchip: add rk3568 sdram_init for build only
Change-Id: I09a83b3192f4b332aad37f709949011f173a3dac
Signed-off-by: YouMin Chen <cym@rock-chips.com> |
| 1040f70a | 23-Oct-2020 |
Tang Yun ping <typ@rock-chips.com> |
rockchip: rv1126: tpl: add ddr3 16bit support
This patch auto detect BW16 constitute by byte0 and byte2 or
byte0 and byte3.
Change-Id: I22a8fa70db1d996573004320196c0892d5380f64
Signed-off-by: Tang
rockchip: rv1126: tpl: add ddr3 16bit support
This patch auto detect BW16 constitute by byte0 and byte2 or
byte0 and byte3.
Change-Id: I22a8fa70db1d996573004320196c0892d5380f64
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
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| e8885e24 | 23-Oct-2020 |
CanYang He <hcy@rock-chips.com> |
drivers: ram: rv1126: dram 32bit interface use pageclose
after system test, 32bit interface use pageclose can improve
performance, 16bit interface not improve.
Change-Id: Iecac7aae1e5f8ec4f162200d8
drivers: ram: rv1126: dram 32bit interface use pageclose
after system test, 32bit interface use pageclose can improve
performance, 16bit interface not improve.
Change-Id: Iecac7aae1e5f8ec4f162200d80be16f1b91180f5
Signed-off-by: CanYang He <hcy@rock-chips.com>
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| da1862e9 | 22-Oct-2020 |
YouMin Chen <cym@rock-chips.com> |
drivers: ram: rv1126: fix the timing about noc burstpenalty
Change-Id: I1ce56c57f8798dfc4fbefd68d47fbe97de6c390a
Signed-off-by: YouMin Chen <cym@rock-chips.com> |
| 958e04de | 15-Sep-2020 |
Tang Yun ping <typ@rock-chips.com> |
rockchip: rv1126: tpl: thunder boot use SPL_KERNEL_BOOT
Use CONFIG_SPL_KERNEL_BOOT for thunder boot to stay the same with SPL.
Change-Id: I0d2f0a91a5f628233de1cb848519fd76b692a2af
Signed-off-by: Ta
rockchip: rv1126: tpl: thunder boot use SPL_KERNEL_BOOT
Use CONFIG_SPL_KERNEL_BOOT for thunder boot to stay the same with SPL.
Change-Id: I0d2f0a91a5f628233de1cb848519fd76b692a2af
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
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