| #
f9515756 |
| 17-Mar-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-rockchip
This includes support for rk3188 from Heiko Stübner and and rk3328 from Kever Yang. Also included is SPL support for rk3399 and a fix for rk3288 to get it bo
Merge git://git.denx.de/u-boot-rockchip
This includes support for rk3188 from Heiko Stübner and and rk3328 from Kever Yang. Also included is SPL support for rk3399 and a fix for rk3288 to get it booting again (spl_early_init()).
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| #
94d53084 |
| 12-Feb-2017 |
Vikas Manocha <vikas.manocha@st.com> |
PINCTRL: stm32f7: add pin control driver
This driver uses the same pin control binding as that of linux, binding document of this patch is copied from linux. One addition done is for GPIO input and
PINCTRL: stm32f7: add pin control driver
This driver uses the same pin control binding as that of linux, binding document of this patch is copied from linux. One addition done is for GPIO input and output mode configuration which was missing.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
d439a46e |
| 23-Feb-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3328: add pinctrl driver
Add rk3328 pinctrl driver and grf/iomux structure definition.
Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@
rockchip: rk3328: add pinctrl driver
Add rk3328 pinctrl driver and grf/iomux structure definition.
Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
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| #
155cd37f |
| 18-Feb-2017 |
Heiko Stübner <heiko@sntech.de> |
rockchip: rk3188: Add pinctrl driver
Add a driver which supports pin multiplexing setup for the most commonly used peripherals.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass
rockchip: rk3188: Add pinctrl driver
Add a driver which supports pin multiplexing setup for the most commonly used peripherals.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
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| #
0c563102 |
| 21-Feb-2017 |
Patrice Chotard <patrice.chotard@st.com> |
STiH410: Add STi pinctrl driver
Add STMicroelectronics STiH410 pinctrl driver
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon G
STiH410: Add STi pinctrl driver
Add STMicroelectronics STiH410 pinctrl driver
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
f2465934 |
| 16-Dec-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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| #
b591730c |
| 12-Dec-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://www.denx.de/git/u-boot-marvell
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| #
656e6cc8 |
| 08-Dec-2016 |
Konstantin Porotchkin <kostap@marvell.com> |
arm64: mvebu: pinctrl: Add pin control driver for A8K family
Add a DM port of Marvell pin control driver. The A8K SoC family contains several silicone dies interconnected in a single package. Every
arm64: mvebu: pinctrl: Add pin control driver for A8K family
Add a DM port of Marvell pin control driver. The A8K SoC family contains several silicone dies interconnected in a single package. Every die is normally equipped with its own pin controller unit. There are 2 pin controllers in A70x0 SoC and 3 in A80x0 SoC.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
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| #
201c9d88 |
| 22-Sep-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-rockchip
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| #
a2c08df3 |
| 16-Aug-2016 |
Kever Yang <kever.yang@rock-chips.com> |
pinctrl: add driver for rk3399
This patch add pinctrl driver for rk3399.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
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| #
677b5358 |
| 16-Aug-2016 |
Beniamino Galvani <b.galvani@gmail.com> |
pinctrl: add driver for meson-gxbb pin controller
Add a pin controller driver for Meson GXBB adapted from Linux kernel.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Gla
pinctrl: add driver for meson-gxbb pin controller
Add a pin controller driver for Meson GXBB adapted from Linux kernel.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
0fcb9f07 |
| 15-Aug-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-atmel
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| #
ac72e174 |
| 20-Jul-2016 |
Wenyou Yang <wenyou.yang@atmel.com> |
pinctrl: at91-pio4: Add pinctrl driver
AT91 PIO4 controller is a combined gpio-controller, pin-mux and pin-config module. The peripheral's pins are assigned through per-pin based muxing logic.
The
pinctrl: at91-pio4: Add pinctrl driver
AT91 PIO4 controller is a combined gpio-controller, pin-mux and pin-config module. The peripheral's pins are assigned through per-pin based muxing logic.
The pin configuration is performed on specific registers which are shared along with the gpio controller. So regard the pinctrl device as a child of atmel_pio4 device.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
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| #
041cdb5f |
| 15-Jul-2016 |
Heiko Stübner <heiko@sntech.de> |
cosmetic: rockchip: sort socs according to numbers
Having some sort of ordering proofed helpful in a lot of other places already. So for a larger number of rockchip socs it might be helpful as well
cosmetic: rockchip: sort socs according to numbers
Having some sort of ordering proofed helpful in a lot of other places already. So for a larger number of rockchip socs it might be helpful as well instead of an ever increasing unsorted list.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Andreas Färber <afaerber@suse.de> Acked-by: Simon Glass <sjg@chromium.org>
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| #
23c3042b |
| 15-Jul-2016 |
Heiko Stübner <heiko@sntech.de> |
cosmetic: rockchip: rk3036: pinctrl: fix config symbol naming
Rockchip socs are always named rkxxxx in all places, as also shown by the naming of the rk3036 pinctrl file itself. Therefore also name
cosmetic: rockchip: rk3036: pinctrl: fix config symbol naming
Rockchip socs are always named rkxxxx in all places, as also shown by the naming of the rk3036 pinctrl file itself. Therefore also name the config symbol according to this scheme.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
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| #
9f862ec7 |
| 15-Jul-2016 |
Heiko Stübner <heiko@sntech.de> |
cosmetic: rockchip: rk3288: pinctrl: fix config symbol naming
The rk3288 pinctrl is very specific to this soc, so should not hog the generic rockchip naming.
Signed-off-by: Heiko Stuebner <heiko@sn
cosmetic: rockchip: rk3288: pinctrl: fix config symbol naming
The rk3288 pinctrl is very specific to this soc, so should not hog the generic rockchip naming.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
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| #
dc557e9a |
| 18-Jun-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
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| #
d77fa2ff |
| 06-Jun-2016 |
Tom Rini <trini@konsulko.com> |
Merge http://git.denx.de/u-boot-samsung
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts: configs/peach-pi_defconfig configs/peach-pit_defconfig
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| #
16ca80ad |
| 23-Apr-2016 |
Thomas Abraham <thomas.ab@samsung.com> |
pinctrl: Add pinctrl driver support for Exynos7420 SoC
Add pinctrl driver support for Samsung's Exynos7420 SoC. The changes have been split into Exynos7420 specific and common Exynos specific portio
pinctrl: Add pinctrl driver support for Exynos7420 SoC
Add pinctrl driver support for Samsung's Exynos7420 SoC. The changes have been split into Exynos7420 specific and common Exynos specific portions so that this implementation is reusable on other Exynos SoCs as well.
The Exynos pinctrl driver supports only device tree based pin configuration. The bindings used are similar to the ones used in the linux kernel.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| #
08ca213a |
| 24-May-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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| #
d7d00031 |
| 21-May-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mips
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| #
c102453a |
| 16-Mar-2016 |
Wills Wang <wills.wang@live.com> |
drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros qca953x.
This is a simple pinctrl driver, it just support uart and spi pin-mux now.
Signed-off-by: Wills Wang <wills.wang@live.com>
drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros qca953x.
This is a simple pinctrl driver, it just support uart and spi pin-mux now.
Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Simon Glass <sjg@chromium.org> [fixed typo in commit subject line] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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| #
a79d0643 |
| 16-Mar-2016 |
Wills Wang <wills.wang@live.com> |
drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros ar933x.
This is a simple pinctrl driver, it just support uart and spi pin-mux now.
Signed-off-by: Wills Wang <wills.wang@live.com> R
drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros ar933x.
This is a simple pinctrl driver, it just support uart and spi pin-mux now.
Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Simon Glass <sjg@chromium.org> [fixed typo in commit subject line] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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| #
595af9db |
| 21-Feb-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
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| #
745df68d |
| 03-Feb-2016 |
Peng Fan <van.freenix@gmail.com> |
pinctrl: imx: Introduce pinctrl driver for i.MX6
Introduce pinctrl for i.MX6 1. pinctrl-imx.c is for common usage. It's used by i.MX6/7. 2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry. 3. To the pinc
pinctrl: imx: Introduce pinctrl driver for i.MX6
Introduce pinctrl for i.MX6 1. pinctrl-imx.c is for common usage. It's used by i.MX6/7. 2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry. 3. To the pinctrl_ops implementation, only set_state is implemented. To i.MX6/7, the pinctrl dts entry is as following: &iomuxc { pinctrl-names = "default";
pinctrl_csi1: csi1grp { fsl,pins = < MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088 MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 >; };
[.....] }; there is no property named function or groups. So pinctrl_generic_set_state can not be used here. 5. This driver is a simple implementation for i.mx iomux controller, only parse the fsl,pins property and write value to registers. 6. With DEBUG enabled, we can see log when "i2c bus 0": " set_state_simple op missing imx_pinctrl_set_state: i2c1grp mux_reg 0x14c, conf_reg 0x3bc, input_reg 0x5d8, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x14c val 0x10 select_input: offset 0x5d8 val 0x1 write config: offset 0x3bc val 0x7f mux_reg 0x148, conf_reg 0x3b8, input_reg 0x5d4, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x148 val 0x10 select_input: offset 0x5d4 val 0x1 write config: offset 0x3b8 val 0x7f " this means imx6 pinctrl driver works as expected.
Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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