| f91ba0ec | 17-Aug-2012 |
Priyanka Jain <Priyanka.Jain@freescale.com> |
net: Add Vitesse VSC8662 PHY support
-VSC8662 is Dual Port 10/100/1000Base-T Phy, 100Base-FX/1000/Base-X Gigabit Ethernt Transceiver Phy.
-Its register set and features are similar to other Vites
net: Add Vitesse VSC8662 PHY support
-VSC8662 is Dual Port 10/100/1000Base-T Phy, 100Base-FX/1000/Base-X Gigabit Ethernt Transceiver Phy.
-Its register set and features are similar to other Vitesse Phys
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
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| 041c5422 | 05-Sep-2011 |
Vladimir Zapolskiy <vz@mleia.com> |
phylib: remove a couple of redundant code lines
This change slightly improves readability of the phydev speed/duplex assignment logic.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Det
phylib: remove a couple of redundant code lines
This change slightly improves readability of the phydev speed/duplex assignment logic.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Detlev Zundel <dzu@denx.de>
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