drivers: mtd: nand: support rockchip nand driver as a DT device

Change-Id: I0023502f5121354863ed63fefa380643ec49b1e1
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

drivers: mtd: nand: add nand driver for spl

Change-Id: Ic4cd26fb670eaef7778caf045bb4be3ce89ebf29
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

nand: delete useless conditional statement

The alignment operation is always done by nand driver，so there is
no need to do alignment operation in nand logical level.

Change-Id: Ic08652e7a9574a5c8ee

nand: delete useless conditional statement

The alignment operation is always done by nand driver，so there is
no need to do alignment operation in nand logical level.

Change-Id: Ic08652e7a9574a5c8eebd505c66dc55b1e0ddce3
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

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drivers: mtd: nand: add rockchip nandc v9 drivers

Change-Id: I7019f309528d41710c5af6857a4d4f54037dd595
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

drivers: mtd: nand: rockchip nandc add bad block detect api

The data layout for rockchip nandc is:
1024 bytes data + 32 obb + 1024 data + 32 obb ...
The system detect bad block flag locate at 20

drivers: mtd: nand: rockchip nandc add bad block detect api

The data layout for rockchip nandc is:
1024 bytes data + 32 obb + 1024 data + 32 obb ...
The system detect bad block flag locate at 2048, 4096, 8192...

The system checks for bad blocks and gets the wrong bad block.
Add a bad block detect api to check the bad block.

Change-Id: I8b0f2907a851d3bbb4d1b9f5daf21319bfb047d9
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

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mtd: nand: rockchip: fix incompatible-pointer-types compile err

Fix the following compile error:
drivers/mtd/nand/rockchip_nand.c: In function ‘nand_spl_load_image’:
drivers/mtd/nand/rockchip_nand.c

mtd: nand: rockchip: fix incompatible-pointer-types compile err

Fix the following compile error:
drivers/mtd/nand/rockchip_nand.c: In function ‘nand_spl_load_image’:
drivers/mtd/nand/rockchip_nand.c:657:39: error: passing argument 3 of
‘nand_read_skip_bad’ from incompatible pointer type
[-Werror=incompatible-pointer-types]
return nand_read_skip_bad(mtd, offs, &size, NULL, size, (u_char
*)dst);
^
In file included from drivers/mtd/nand/rockchip_nand.c:11:0:
include/nand.h:101:5: note: expected ‘size_t * {aka long unsigned int
*}’ but argument is of type ‘unsigned int *’
int nand_read_skip_bad(struct mtd_info *mtd, loff_t offset, size_t
*length,

Change-Id: I44c97f21c2c2d40a7dcbdab7ddb96a1025949ee4
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

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UPSTREAM: bitops: collect BIT macros to include/linux/bitops.h

Same macros are defined in various places. Collect them into
include/linux/bitops.h like Linux.

Change-Id: I81d12e8c8151c6eb29499d2b5

UPSTREAM: bitops: collect BIT macros to include/linux/bitops.h

Same macros are defined in various places. Collect them into
include/linux/bitops.h like Linux.

Change-Id: I81d12e8c8151c6eb29499d2b5cd61ed782500492
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit ed3986ca30972c94f0076f88c948406ce030a05c)

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treewide: replace with error() with pr_err()

U-Boot widely uses error() as a bit noisier variant of printf().

This macro causes name conflict with the following line in
include/linux/compiler-gcc.h

treewide: replace with error() with pr_err()

U-Boot widely uses error() as a bit noisier variant of printf().

This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:

# define __compiletime_error(message) __attribute__((error(message)))

This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux. (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)

Let's convert error() into now treewide-available pr_err().

Done with the help of Coccinelle, excluing tools/ directory.

The semantic patch I used is as follows:

// <smpl>
@@@@
-error
+pr_err
(...)
// </smpl>

Change-Id: I921807c1770d36a91e692c48ab477558bb2ed0b8
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 9b643e312d528f291966c1f30b0d90bf3b1d43dc)

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mtd: nand: spl: allow build nand_bbt, nand_ids and nand_util

This patch allows building of nand_bbt, nand_ids, nand_util for nand drivers that need it.

Change-Id: I20beea9442a13bce926a5a2be24e3e2a6

mtd: nand: spl: allow build nand_bbt, nand_ids and nand_util

This patch allows building of nand_bbt, nand_ids, nand_util for nand drivers that need it.

Change-Id: I20beea9442a13bce926a5a2be24e3e2a69cf1b2d
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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mtd: nand: add the rockchip nand controller driver

Add basic Rockchip nand driver.

Driver in current state has 16, 24, 40, 60 per 1024B BCH/ECC ability and 8 bit asynchronous flash interface suppor

mtd: nand: add the rockchip nand controller driver

Add basic Rockchip nand driver.

Driver in current state has 16, 24, 40, 60 per 1024B BCH/ECC ability and 8 bit asynchronous flash interface support. Other features will come later.

Change-Id: I8e766afe7358a2357d75cfe094c4cd6fe92bd281
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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mtd: nand: add support for the Sandisk SDTNQGAMA chip

Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB write size and 40 bit ecc support

Change-Id: I7ff291de7406a6d43e99bc5

mtd: nand: add support for the Sandisk SDTNQGAMA chip

Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB write size and 40 bit ecc support

Change-Id: I7ff291de7406a6d43e99bc5fb8781a50abfd56ac
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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