Merge branch 'master' of git://git.denx.de/u-boot-arm

mtd: cfi_flash: fix clang warning

clang warns this check is silly; it is since s is
a local variable.

u-boot/drivers/mtd/cfi_flash.c:2363:13: warning: comparison of
array 's' not equal to a null

mtd: cfi_flash: fix clang warning

clang warns this check is silly; it is since s is
a local variable.

u-boot/drivers/mtd/cfi_flash.c:2363:13: warning: comparison of
array 's' not equal to a null pointer is always true
else if ((s != NULL) && (strcmp(s, "yes") == 0)) {

cc: Stefan Roese <sr@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>

show more ...

Merge git://git.denx.de/u-boot-arm

Conflicts:
board/freescale/mx6qsabrelite/Makefile
board/freescale/mx6qsabrelite/mx6qsabrelite.c
include/configs/mx6qsabrelite.h

Signed-off-by: Stefano Babic <s

Merge git://git.denx.de/u-boot-arm

Conflicts:
board/freescale/mx6qsabrelite/Makefile
board/freescale/mx6qsabrelite/mx6qsabrelite.c
include/configs/mx6qsabrelite.h

Signed-off-by: Stefano Babic <sbabic@denx.de>

show more ...

Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flash

Merge branch 'u-boot/master' into u-boot-arm/master

cfi_flash: use buffer length in unmap_physmem()

While the flash_detect_legacy() of drivers/mtd/cfi_flash.c
feed unmap_physmem() with MAP_NOCACHE as 2nd parameter,
the do_spi_flash_read_write() of co

cfi_flash: use buffer length in unmap_physmem()

While the flash_detect_legacy() of drivers/mtd/cfi_flash.c
feed unmap_physmem() with MAP_NOCACHE as 2nd parameter,
the do_spi_flash_read_write() of common/cmd_sf.c
feed unmap_physmem() with the length of the mapped buffer
as 2nd parameter.

It's apparently a bug, and I personally think the 2nd parameter
should be the length of the mapped buffer.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
CC: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>

show more ...

Add GPL-2.0+ SPDX-License-Identifier to source files

Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>

mtd: cfi_flash: Use ARRAY_SIZE at appropriate places

Signed-off-by: Axel Lin <axel.lin@ingics.com>

Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
common/cmd_fpga.c
drivers/usb/host/ohci-at91.c

cfi_flash: return NULL for invalid base address input

When base address given was out of valid flash address ranges,
flash_get_info() function returned the pointer to the last
element of flash_info[

cfi_flash: return NULL for invalid base address input

When base address given was out of valid flash address ranges,
flash_get_info() function returned the pointer to the last
element of flash_info[i] array.

This patch changes this function to return NULL pointer
in such a case, which is more correct behaviour.

The function flash_protect_default() calls flash_protect()
immediately after flash_get_info() invocation.
With this correction, flash_protect() function would be
able to return soon, for NULL flash_info.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Stefan Roese <sr@denx.de>

show more ...

cosmetic: cfi_flash: delete a space after an unary operator

Linux Kernel Documentation/CodingStyle says:
Do not add a space after unary operators such as &, *, ...

Signed-off-by: Masahiro Yamada <

cosmetic: cfi_flash: delete a space after an unary operator

Linux Kernel Documentation/CodingStyle says:
Do not add a space after unary operators such as &, *, ...

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Stefan Roese <sr@denx.de>

show more ...

cfi_flash: Fix unaligned accesses to cfi_qry structure

Packed structure cfi_qry contains unaligned 16- and 32-bits members,
accessing which causes problems when cfi_flash driver is compiled with
-mu

cfi_flash: Fix unaligned accesses to cfi_qry structure

Packed structure cfi_qry contains unaligned 16- and 32-bits members,
accessing which causes problems when cfi_flash driver is compiled with
-munaligned-access option: flash initialization hangs, probably
due to data error.

Since the structure is supposed to replicate the actual data layout
in CFI Flash chips, the alignment issue can't be fixed in the structure.
So, unaligned fields need using of explicit unaligned access macros.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Reviewed-By: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Stefan Roese <sr@denx.de>

show more ...

Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
drivers/video/exynos_fb.c

Revert "mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support"

This reverts commit 239cb9d904cfa8ab50d840a47b3306189d695c75.

Signed-off-by: Stefan Roese <sr@denx.de>

Revert "cfi_flash: Use uintptr_t for casts from u32 to void *"

This reverts commit 81a4f7098ba137ea1961cb997ca16d57de2b3483.

Signed-off-by: Stefan Roese <sr@denx.de>

Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flash

cfi_flash: Use uintptr_t for casts from u32 to void *

This fixes this build warning:

Configuring for qemu_mips64 - Board: qemu-mips64, Options: SYS_BIG_ENDIAN
text data bss dec he

cfi_flash: Use uintptr_t for casts from u32 to void *

This fixes this build warning:

Configuring for qemu_mips64 - Board: qemu-mips64, Options: SYS_BIG_ENDIAN
text data bss dec hex filename
215344 13082 218720 447146 6d2aa qemu_mips64/u-boot
cfi_flash.c: In function 'flash_map':
cfi_flash.c:217:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>

show more ...

mtd: cfi_flash: Write buffer size adjustment for M29EW Numonyx devices

This patch addjusted the write buffer size for M29EW devices those
are operated in 8-bit mode.

The M29EW devices seem to repor

mtd: cfi_flash: Write buffer size adjustment for M29EW Numonyx devices

This patch addjusted the write buffer size for M29EW devices those
are operated in 8-bit mode.

The M29EW devices seem to report the CFI information wrong when
it's in 8 bit mode.

There's an app note from Numonyx on this issue and there's a patch
in the open source as well for Linux, but it doesn't seem to be in mainline.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Tested-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

show more ...

mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support

This commit is based on that patch from aaron.williams@caviumnetworks.com
with same commit title. pulled the same code changes into current

mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support

This commit is based on that patch from aaron.williams@caviumnetworks.com
with same commit title. pulled the same code changes into current u-boot tree.

http://patchwork.ozlabs.org/patch/140863/
http://lists.denx.de/pipermail/u-boot/2011-April/089606.html

This patch corrects the addresses used when working with Spansion/AMD FLASH chips.
Addressing for 8 and 16 bits is almost identical except in the 16-bit case the
LSB of the address is always 0. The confusion arose because the addresses
in the datasheet for 16-bit mode are word addresses but this code assumed it was
byte addresses.

I have only been able to test this on our Octeon boards which use either an 8-bit
or 16-bit bus. I have not tested the case where there's an 8-bit part on a 16-bit
bus.

This patch also adds some delays as suggested by Spansion.

If a part can be both 8 and 16-bits, it forces it to work in 8-bit mode if an
8-bit bus is detected.

Apart from the pulled changes, fixed few minor code cleanups and tested
on 256M29EW, 512M29EW flashes.

Before this fix:
---------------
Bank # 1: CFI conformant flash (8 x 8) Size: 64 MB in 512 Sectors
AMD Standard command set, Manufacturer ID: 0xFF, Device ID: 0xFF
Erase timeout: 4096 ms, write timeout: 2 ms
Buffer write timeout: 5 ms, buffer size: 1024 bytes

After this fix:
--------------
Bank # 1: CFI conformant flash (8 x 8) Size: 64 MB in 512 Sectors
AMD Standard command set, Manufacturer ID: 0x89, Device ID: 0x7E2301
Erase timeout: 4096 ms, write timeout: 2 ms
Buffer write timeout: 5 ms, buffer size: 1024 bytes

Signed-off-by: Aaron Williams <aaron.williams@caviumnetworks.com>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Tested-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

show more ...

cfi_flash: Report Advanced Sector Protection (PPB) with flinfo cmd

Report the usage of the Advanced Sector Protection (PPB) to the user
upon 'flinfo' command. E.g:

Bank # 1: CFI conformant flash (1

cfi_flash: Report Advanced Sector Protection (PPB) with flinfo cmd

Report the usage of the Advanced Sector Protection (PPB) to the user
upon 'flinfo' command. E.g:

Bank # 1: CFI conformant flash (16 x 16) Size: 64 MB in 512 Sectors
AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2301
Advanced Sector Protection (PPB) enabled
Erase timeout: 16384 ms, write timeout: 2 ms
Buffer write timeout: 5 ms, buffer size: 32 bytes

Sector Start Addresses:
FC000000 E FC020000 E RO FC040000 E FC060000 E FC080000 E
...

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-by: Holger Brunck <holger.brunck@keymile.com>

show more ...

cfi_flash: Enable PPB protection for all AMD cmdset flash chips

Not only Spansion supports the Persistent Protection Bits (PPB) locking.
Other devices like the Micron JS28F512M29EWx also support thi

cfi_flash: Enable PPB protection for all AMD cmdset flash chips

Not only Spansion supports the Persistent Protection Bits (PPB) locking.
Other devices like the Micron JS28F512M29EWx also support this type
of locking/unlocking. Detection of support is done in the same way as
done for the Spansion chips - via the 0x49 CFI word.

This patch enables this PPB protection mechanism for all AMD type
(AMD commandset) chips.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-by: Holger Brunck <holger.brunck@keymile.com>

show more ...

cfi_flash: Read PPB sector protection from device for AMD/Spansion chips

Patch 66863b05 [cfi_flash: add support for Spansion flash PPB sector
protection] introduced the PPB (Persistent Protection Bi

cfi_flash: Read PPB sector protection from device for AMD/Spansion chips

Patch 66863b05 [cfi_flash: add support for Spansion flash PPB sector
protection] introduced the PPB (Persistent Protection Bit) locking for
Spansion chips. But right now the sector protection status (locked vs
unlocked) is set to unlocked for all sectors upon bootup. The real
sector protection status is ignored.

This patch now reads the current sector protection status and uses
it for these AMD/Spansion flash chips.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-by: Holger Brunck <holger.brunck@keymile.com>

show more ...

cfi_flash: Add manufact_match helper function

Consolidate manufacturer matching into the function manufact_match()
and use it.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Holger Brunck <hol

cfi_flash: Add manufact_match helper function

Consolidate manufacturer matching into the function manufact_match()
and use it.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Holger Brunck <holger.brunck@keymile.com>

show more ...

mtd/cfi: add support for SST 4KB sector granularity

Add support for SST 4KB sector granularity.

Many recent SST flashes, i.e. SST39VF3201B and similar of this family
are declared CFI-conformant fro

mtd/cfi: add support for SST 4KB sector granularity

Add support for SST 4KB sector granularity.

Many recent SST flashes, i.e. SST39VF3201B and similar of this family
are declared CFI-conformant from SST. They support CFI query, but implement
2 different sector sizes in the same memory: a 64KB sector (they call it
"block", std AMD erase cmd=0x30), and a 4KB sector (they call it "sector",
erase cmd=0x50). Also, CFI query on these chips, reading from address 0x2dh
of cfi query struct, detects a number of secotrs for the 4KB granularity
(flinfo shows it).

For all other aspects, they are CFI compliant, so, as Linux do, i think
it's a good idea to handle these chips in the CFI driver, with a fixup
to allow 4KB granularity, as should be expected, instead of 64KB.

Signed-off-by: Angelo Dureghello <sysamfw@gmail.com>
Signed-off-by: Stefan Rose <sr@denx.de>

show more ...

Merge git://git.denx.de/u-boot