mmc: Split mmc struct, rework mmc initialization (v2)

The way that struct mmc was implemented was a bit of a mess;
configuration and internal state all jumbled up in a single structure.

On top of t

mmc: Split mmc struct, rework mmc initialization (v2)

The way that struct mmc was implemented was a bit of a mess;
configuration and internal state all jumbled up in a single structure.

On top of that the way initialization is done with mmc_register leads
to a lot of duplicated code in drivers.

Typically the initialization got something like this in every driver.

struct mmc *mmc = malloc(sizeof(struct mmc));
memset(mmc, 0, sizeof(struct mmc);
/* fill in fields of mmc struct */
/* store private data pointer */
mmc_register(mmc);

By using the new mmc_create call one just passes an mmc config struct
and an optional private data pointer like this:

struct mmc = mmc_create(&cfg, priv);

All in tree drivers have been updated to the new form, and expect
mmc_register to go away before long.

Changes since v1:

* Use calloc instead of manually calling memset.
* Mark mmc_register as deprecated.

Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>

show more ...

mmc: Convert mmc struct's name array to a pointer

Using an array is pointless; even more pointless (and scary) is using
sprintf to fill it without a format string.

Signed-off-by: Pantelis Antoniou

mmc: Convert mmc struct's name array to a pointer

Using an array is pointless; even more pointless (and scary) is using
sprintf to fill it without a format string.

Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>

show more ...

mmc: Remove ops from struct mmc and put in mmc_ops

Remove the in-structure ops and put them in mmc_ops with
a constant pointer to it.

This makes the mmc structure smaller as well as conserving
code

mmc: Remove ops from struct mmc and put in mmc_ops

Remove the in-structure ops and put them in mmc_ops with
a constant pointer to it.

This makes the mmc structure smaller as well as conserving
code space (in theory).

All in-tree drivers are converted as well; this is done in a
single patch in order to not break git bisect.

Changes since V1:
Fix compilation b0rked issue on omap platforms where OMAP_GPIO was
not set.

Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>

show more ...

Merge branch 'master' of git://git.denx.de/u-boot-arm

esdhc: Detecting 8 bit width before mmc initialization

The upper 4 data signals of esdhc are shared with spi flash.
So detect if the upper 4 pins are assigned to esdhc before
enable sdhc 8 bit width

esdhc: Detecting 8 bit width before mmc initialization

The upper 4 data signals of esdhc are shared with spi flash.
So detect if the upper 4 pins are assigned to esdhc before
enable sdhc 8 bit width.

Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

esdhc: Workaround for card can't be detected on T4240QDS

Card detection pin is ineffective on T4240QDS Rev1.0.
There are two cards can be connected to board.
1. eMMC card is built-in board, can not

esdhc: Workaround for card can't be detected on T4240QDS

Card detection pin is ineffective on T4240QDS Rev1.0.
There are two cards can be connected to board.
1. eMMC card is built-in board, can not be removed. so
For eMMC card it is always there.
2. Card detecting pin is functional for SDHC card in Rev2.0.

This workaround force sdhc driver scan and initialize the card
regardless of whether the card is inserted or not in case Rev1.0.

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

powerpc/esdhc: Add 3.3v voltage support in esdhc capacity register

T4240QDS eSDHC host capabilities reigster should have VS33 bit define.
Add quirk CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 to deal with ca

powerpc/esdhc: Add 3.3v voltage support in esdhc capacity register

T4240QDS eSDHC host capabilities reigster should have VS33 bit define.
Add quirk CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 to deal with capacity
missing

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>

show more ...

esdhc: memset mmc struct before putting into use

struct mmc should be clear to all '0' after malloc to avoid
unexpect variable value.

Like mmc->has_init = xxx.
In this case mmcinfo will believe the

esdhc: memset mmc struct before putting into use

struct mmc should be clear to all '0' after malloc to avoid
unexpect variable value.

Like mmc->has_init = xxx.
In this case mmcinfo will believe the card had been initialized before
and skip the initialization.

Test on P5040 and T4240,
Error Log:

=> mmcinfo
Device: FSL_SDHC
Manufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 0-bit
=>

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Signed-off-by: Xie Shaohui-B21989 <B21989@freescale.com>
Tested-by: Ryan Barnett <rjbarnet@rockwellcollins.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>

show more ...

Powerpc/esdhc: Add simple description of esdhc register

Add some descriptions for esdhc register for easily using.

Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Acked-by: Pantelis Antoni

Powerpc/esdhc: Add simple description of esdhc register

Add some descriptions for esdhc register for easily using.

Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>

show more ...

powerpc/esdhc: Map register for eSDHC Host Controller V3.0

eSDHC host controller has new register to support SD Spec 3.0.
And the according host controller version was Freescale eSDHC
Version 3.0.

powerpc/esdhc: Map register for eSDHC Host Controller V3.0

eSDHC host controller has new register to support SD Spec 3.0.
And the according host controller version was Freescale eSDHC
Version 3.0.

Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>

show more ...

Merge branch 'master' of git://git.denx.de/u-boot-arm

Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

mmc: fsl_esdhc: Check the result from malloc()

malloc can fail, so we should better check its return value before using it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

Merge git://git.denx.de/u-boot-arm

Conflicts:
board/freescale/mx6qsabrelite/Makefile
board/freescale/mx6qsabrelite/mx6qsabrelite.c
include/configs/mx6qsabrelite.h

Signed-off-by: Stefano Babic <s

Merge git://git.denx.de/u-boot-arm

Conflicts:
board/freescale/mx6qsabrelite/Makefile
board/freescale/mx6qsabrelite/mx6qsabrelite.c
include/configs/mx6qsabrelite.h

Signed-off-by: Stefano Babic <sbabic@denx.de>

show more ...

Merge branch 'u-boot/master' into u-boot-arm/master

Add GPL-2.0+ SPDX-License-Identifier to source files

Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>

Merge branch 'master' of git://git.denx.de/u-boot-mmc

fsl_esdhc: Touch only relevant sys ctrl bits

Dealing with the sys ctrl register should touch only the
relevant bits and not accidently the whole register. On i.MX6,
the sys control register contains

fsl_esdhc: Touch only relevant sys ctrl bits

Dealing with the sys ctrl register should touch only the
relevant bits and not accidently the whole register. On i.MX6,
the sys control register contains bits which shouldn't be reset to
0, e.g. SYS_CTRL[3-0] and IPP_RST_N (SYS_CTRL[23]).

Do this by read/modify/write instead of just a 32bit write.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Andy Fleming <afleming@freescale.com>

show more ...

Powerpc: eSDHC: Fix mmc read write err in uboot of T4240QDS board

Fill the right command type when using CMD12 to stop data transfer.

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
CC: Fl

Powerpc: eSDHC: Fix mmc read write err in uboot of T4240QDS board

Fill the right command type when using CMD12 to stop data transfer.

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
CC: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

show more ...

Merge branch 'master' of git://www.denx.de/git/u-boot-mmc

fsl_esdhc: Do not clear interrupt status bits until data processed

After waiting for the command completion event, the interrupt status
bits, that occured to be set by that time, are cleared by writ

fsl_esdhc: Do not clear interrupt status bits until data processed

After waiting for the command completion event, the interrupt status
bits, that occured to be set by that time, are cleared by writing them
back. It is supposed, that it should be command related bits (command
complete and may be command errors).

However, in some cases the DMA already completes by that time before
the full transaction completes. The corresponding DINT bit gets set
and then cleared before even entering the loop, waiting for data part
completion. That waiting loop never gets this bit set, causing the
operation to hang. This is reported to happen, for example, for write
operation of 1 sector to upper area (block #7400000) of SanDisk Ultra II
8GB card.

The solution could be to explicitly clear only command related interrupt
status bits. However, since subsequent processing does not rely on
any command bits state, it could be easier just to remove clearing
of any bits at that point, leaving them all until all data processing
completes. After that the whole register will be cleared at once.

Also, on occasion, interrupts masking moved to before writing the command,
just for the case there should be no chance of interrupt between the first
command and interrupts masking.

Reported-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

show more ...

mmc: fsl_esdhc: Fix hang after 'save' command

Since commit 48e0b2bd (powerpc/esdhc: Correct judgement for DATA PIO mode)
we see mx6 systems to hang after doing a 'save' command.

Revert this commit

mmc: fsl_esdhc: Fix hang after 'save' command

Since commit 48e0b2bd (powerpc/esdhc: Correct judgement for DATA PIO mode)
we see mx6 systems to hang after doing a 'save' command.

Revert this commit since the original 'ifdef' logic from 7b43db92
(drivers/mmc/fsl_esdhc.c: fix compiler warnings) was the correct one.

Reported-by: Tapani Utriainen <tapani@technexion.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

show more ...

Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
common/cmd_fpga.c
drivers/usb/host/ohci-at91.c

powerpc/esdhc: Correct judgement for DATA PIO mode

The logic for the whether to configure for polling or DMA
was mistakenly reversed in this patch:

Commit 7b43db92110ec2f15c5f7187a165f2928464966b
d

powerpc/esdhc: Correct judgement for DATA PIO mode

The logic for the whether to configure for polling or DMA
was mistakenly reversed in this patch:

Commit 7b43db92110ec2f15c5f7187a165f2928464966b
drivers/mmc/fsl_esdhc.c: fix compiler warnings

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
CC: Sun Yusong-R58495 <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

show more ...

Merge branch 'master' of git://www.denx.de/git/u-boot-mmc