| #
89c1e2da |
| 17-Jun-2016 |
Stephen Warren <swarren@nvidia.com> |
Add a reset driver framework/uclass
A reset controller is a hardware module that controls reset signals that affect other hardware modules or chips.
This patch defines a standard API that connects
Add a reset driver framework/uclass
A reset controller is a hardware module that controls reset signals that affect other hardware modules or chips.
This patch defines a standard API that connects reset clients (i.e. the drivers for devices affected by reset signals) to drivers for reset controllers/providers. Initially, DT is the only supported method for connecting the two.
The DT binding specification (reset.txt) was taken from Linux kernel v4.5's Documentation/devicetree/bindings/reset/reset.txt.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
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| #
dc557e9a |
| 18-Jun-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
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| #
e4a94ce4 |
| 27-May-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
For odroid-c2 (arch-meson) for now disable designware eth as meson now needs to do some harder GPIO work.
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
Merge git://git.denx.de/u-boot-dm
For odroid-c2 (arch-meson) for now disable designware eth as meson now needs to do some harder GPIO work.
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts: lib/efi_loader/efi_disk.c
Modified: configs/odroid-c2_defconfig
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| #
6238935d |
| 13-May-2016 |
Stephen Warren <swarren@nvidia.com> |
Add a mailbox driver framework/uclass
A mailbox is a hardware mechanism for transferring small message and/or notifications between the CPU on which U-Boot runs and some other device such as an auxi
Add a mailbox driver framework/uclass
A mailbox is a hardware mechanism for transferring small message and/or notifications between the CPU on which U-Boot runs and some other device such as an auxilliary CPU running firmware or a hardware module.
This patch defines a standard API that connects mailbox clients to mailbox providers (drivers). Initially, DT is the only supported method for connecting the two.
The DT binding specification (mailbox.txt) was taken from Linux kernel v4.5's Documentation/devicetree/bindings/mailbox/mailbox.txt.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
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| #
8f695232 |
| 13-Apr-2016 |
Lokesh Vutla <lokeshvutla@ti.com> |
memory: Move TI_AEMIF config to KCONFIG
Not all Keystone2 devices has AEMIF NAND controller. So adding Kconfig entry for CONFIG_TI_AEMIF and enabling it in respective defconfigs on platforms with AE
memory: Move TI_AEMIF config to KCONFIG
Not all Keystone2 devices has AEMIF NAND controller. So adding Kconfig entry for CONFIG_TI_AEMIF and enabling it in respective defconfigs on platforms with AEMIF controller.
Reported-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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| #
04868b40 |
| 31-Mar-2016 |
Mateusz Kulikowski <mateusz.kulikowski@gmail.com> |
drivers: Add SPMI bus uclass
Qualcom processors use proprietary bus to talk with PMIC devices - SPMI (System Power Management Interface). On wiring level it is similar to I2C, but on protocol level,
drivers: Add SPMI bus uclass
Qualcom processors use proprietary bus to talk with PMIC devices - SPMI (System Power Management Interface). On wiring level it is similar to I2C, but on protocol level, it's multi-master and has simple autodetection capabilities. This commit adds simple uclass that provides bus read/write interface.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
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| #
fc760cb8 |
| 22-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: pwm: Add a PWM uclass
Add a uclass that supports Pulse Width Modulation (PWM) devices. It provides methods to enable/disable and configure the device.
Signed-off-by: Simon Glass <sjg@chromium.o
dm: pwm: Add a PWM uclass
Add a uclass that supports Pulse Width Modulation (PWM) devices. It provides methods to enable/disable and configure the device.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
5f5620ab |
| 12-Nov-2015 |
Stefano Babic <sbabic@denx.de> |
Merge git://git.denx.de/u-boot
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| #
60b25259 |
| 05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-samsung
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| #
5decbf53 |
| 27-Oct-2015 |
Przemyslaw Marczak <p.marczak@samsung.com> |
dm: adc: add simple ADC uclass implementation
This commit adds: - new uclass id: UCLASS_ADC - new uclass driver: drivers/adc/adc-uclass.c
The new uclass's API allows for ADC operation on: * single-
dm: adc: add simple ADC uclass implementation
This commit adds: - new uclass id: UCLASS_ADC - new uclass driver: drivers/adc/adc-uclass.c
The new uclass's API allows for ADC operation on: * single-channel with channel selection by a number * multti-channel with channel selection by bit mask
ADC uclass's functions: * single-channel: - adc_start_channel() - start channel conversion - adc_channel_data() - get conversion data - adc_channel_single_shot() - start/get conversion data * multi-channel: - adc_start_channels() - start selected channels conversion - adc_channels_data() - get conversion data - adc_channels_single_shot() - start/get conversion data for channels selected by bit mask * general: - adc_stop() - stop the conversion - adc_vdd_value() - positive reference Voltage value with polarity [uV] - adc_vss_value() - negative reference Voltage value with polarity [uV] - adc_data_mask() - conversion data bit mask
The device tree can provide below constraints/properties: - vdd-polarity-negative: if true: Vdd = vdd-microvolts * (-1) - vss-polarity-negative: if true: Vss = vss-microvolts * (-1) - vdd-supply: phandle to Vdd regulator's node - vss-supply: phandle to Vss regulator's node And optional, checked only if the above corresponding, doesn't exist: - vdd-microvolts: positive reference Voltage [uV] - vss-microvolts: negative reference Voltage [uV]
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| #
e573bdb3 |
| 30-Oct-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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| #
a69fdc77 |
| 23-Oct-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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| #
c8a7ba9e |
| 09-Oct-2015 |
Thomas Chou <thomas@wytron.com.tw> |
dm: implement a Timer uclass
Implement a Timer uclass to work with lib/time.c.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Simon Glass <sjg@chromium.org>
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| #
ddf56bc7 |
| 17-Sep-2015 |
Nishanth Menon <nm@ti.com> |
drivers: Introduce a simplified remoteproc framework
Many System on Chip(SoC) solutions are complex with multiple processors on the same die dedicated to either general purpose of specialized functi
drivers: Introduce a simplified remoteproc framework
Many System on Chip(SoC) solutions are complex with multiple processors on the same die dedicated to either general purpose of specialized functions. Many examples do exist in today's SoCs from various vendors. Typical examples are micro controllers such as an ARM M3/M0 doing a offload of specific function such as event integration or power management or controlling camera etc.
Traditionally, the responsibility of loading up such a processor with a firmware and communication has been with a High Level Operating System(HLOS) such as Linux. However, there exists classes of products where Linux would need to expect services from such a processor or the delay of Linux and operating system being able to load up such a firmware is unacceptable.
To address these needs, we need some minimal capability to load such a system and ensure it is started prior to an Operating System(Linux or any other) is started up.
NOTE: This is NOT meant to be a solve-all solution, instead, it tries to address certain class of SoCs and products that need such a solution.
A very simple model is introduced here as part of the initial support that supports microcontrollers with internal memory (no MMU, no execution from external memory, or specific image format needs). This basic framework can then (hopefully) be extensible to other complex SoC processor support as need be.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
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| #
80cd58b9 |
| 31-Aug-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
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| #
d90a5a30 |
| 27-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices, i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices, i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing controls switching among silicon blocks that share certain physical pins, pin configuration handles electronic properties such as pin- biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you do not need full interface support, you can disable some features to reduce memory foot print. Typically around 1.5KB is necessary to include full-featured uclass support on ARM board (CONFIG_PINCTRL + CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX), for example.
We are often limited on code size for SPL. Besides, we still have many boards that do not support device tree configuration. The full pinctrl, which requires OF_CONTROL, does not make sense for those boards. So, this framework also has a Do-It-Yourself (let's say simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the uclass itself provides no systematic mechanism for identifying the peripheral device, applying pinctrl settings, etc. They must be done in each low-level driver. In return, you can save much memory footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
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e0bb89b1 |
| 21-Aug-2015 |
Bin Meng <bmeng.cn@gmail.com> |
drivers: kconfig: Sort driver menu in alphabetical order
Sort different types of drivers in alphabetical order.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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99385b6b |
| 21-Aug-2015 |
Bin Meng <bmeng.cn@gmail.com> |
drivers: kconfig: Move PHYS_TO_BUS to "Device Drivers" menu
Right now PHYS_TO_BUS shows in the Kconfig main menu, move it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@ch
drivers: kconfig: Move PHYS_TO_BUS to "Device Drivers" menu
Right now PHYS_TO_BUS shows in the Kconfig main menu, move it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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| #
776d2ef0 |
| 21-Aug-2015 |
Bin Meng <bmeng.cn@gmail.com> |
drivers: kconfig: Move "Generic Driver Options" menu to the top
Make "Generic Driver Options" menu show on the top in the Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass
drivers: kconfig: Move "Generic Driver Options" menu to the top
Make "Generic Driver Options" menu show on the top in the Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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| #
f26c8a8e |
| 23-Jun-2015 |
Simon Glass <sjg@chromium.org> |
dm: Add a clock uclass
Clocks are an important feature of platforms and have become increasing complex with time. Most modern SoCs have multiple PLLs and dozens of clock dividers which distribute cl
dm: Add a clock uclass
Clocks are an important feature of platforms and have become increasing complex with time. Most modern SoCs have multiple PLLs and dozens of clock dividers which distribute clocks to on-chip peripherals.
Some SoC implementations have a clock API which is private to that SoC family, e.g. Tegra and Exynos. This is useful but it would be better to have a common API that can be understood and used throughout U-Boot.
Add a simple clock API as a starting point. It supports querying and setting the rate of a clock. Each clock is a device. To reduce memory and processing overhead the concept of peripheral clocks is provided. These do not need to be explicit devices - it is possible to write a driver that can adjust the I2C clock (for example) without an explicit I2C clock device. This can dramatically reduce the number of devices (and associated overhead) in a complex SoC.
Clocks are referenced by a number, and it is expected that SoCs will define that numbering themselves via an enum.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
6c51df68 |
| 23-Jun-2015 |
Simon Glass <sjg@chromium.org> |
dm: Add support for RAM drivers
Add support for a driver which sets up DRAM and can return information about the amount of RAM available. This is a first step towards moving RAM init to driver model
dm: Add support for RAM drivers
Add support for a driver which sets up DRAM and can return information about the amount of RAM available. This is a first step towards moving RAM init to driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
5917112c |
| 23-Jun-2015 |
Simon Glass <sjg@chromium.org> |
dm: Add support for LEDs
Add a simple uclass for LEDs, so that these can be controlled by the device tree and activated when needed. LEDs are referred to by their label.
This implementation require
dm: Add support for LEDs
Add a simple uclass for LEDs, so that these can be controlled by the device tree and activated when needed. LEDs are referred to by their label.
This implementation requires a driver for each type of LED (e.g GPIO, I2C).
Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
1254ff97 |
| 10-Jul-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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| #
6f43ba70 |
| 07-Jul-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
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| #
c9bb942e |
| 22-Jun-2015 |
Joe Hershberger <joe.hershberger@ni.com> |
Move default y configs out of arch/board Kconfig
Some archs/boards specify their own default by pre-defining the config which causes the Kconfig system to mix up the order of the configs in the defc
Move default y configs out of arch/board Kconfig
Some archs/boards specify their own default by pre-defining the config which causes the Kconfig system to mix up the order of the configs in the defconfigs... This will cause merge pain if allowed to proliferate.
Remove the configs that behave this way from the archs.
A few configs still remain, but that is because they only exist as defaults and do not have a proper Kconfig entry. Those appear to be:
SPIFLASH DISPLAY_BOARDINFO
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> [trini: rastaban, am43xx_evm_usbhost_boot, am43xx_evm_ethboot updates, drop DM_USB from MSI_Primo81 as USB_MUSB_SUNXI isn't converted yet to DM] Signed-off-by: Tom Rini <trini@konsulko.com>
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