Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze

mkimage: Report information about fpga

Add FIT_FPGA_PROP that user can identify an optional
entry for fpga.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chrom

mkimage: Report information about fpga

Add FIT_FPGA_PROP that user can identify an optional
entry for fpga.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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Merge branch 'master' of git://git.denx.de/u-boot-x86

x86: doc: Add porting hints for ACPI with Windows

Windows might cache system information and only detect ACPI changes
if you modify the ACPI table versions.

Signed-off-by: Bin Meng <bmeng.cn@gmail.

x86: doc: Add porting hints for ACPI with Windows

Windows might cache system information and only detect ACPI changes
if you modify the ACPI table versions.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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x86: doc: Mention Ubuntu/Windows installation and boot support

As of now, U-Boot can support installing and booting Ubuntu/Windows
with the help of SeaBIOS. Update the documentation.

Signed-off-by:

x86: doc: Mention Ubuntu/Windows installation and boot support

As of now, U-Boot can support installing and booting Ubuntu/Windows
with the help of SeaBIOS. Update the documentation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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x86: doc: Update information about IGD with SeaBIOS

Document how to make SeaBIOS load and run the VGA ROM of Intel
IGD device when loaded by U-Boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Rev

x86: doc: Update information about IGD with SeaBIOS

Document how to make SeaBIOS load and run the VGA ROM of Intel
IGD device when loaded by U-Boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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x86: minnowmax: Adjust U-Boot environment address in SPI flash

Currently U-Boot environment address is at offset 0x7fe00 of a 8MB
SPI flash. When creating a partial u-boot.rom image without flash
de

x86: minnowmax: Adjust U-Boot environment address in SPI flash

Currently U-Boot environment address is at offset 0x7fe00 of a 8MB
SPI flash. When creating a partial u-boot.rom image without flash
descriptor and ME firmware, U-Boot actually occupies the last 1MB
of the flash, and reprograming U-Boot causes previous environment
settings get lost which is not convenient during testing.

Adjust the environment address to 0x6ef000 instead (before the MRC
cache data region in the flash).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

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x86: doc: Document ACPI support

Remove ACPI from the TODO list and add a new section to document
current ACPI support in U-Boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glas

x86: doc: Document ACPI support

Remove ACPI from the TODO list and add a new section to document
current ACPI support in U-Boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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x86: doc: Minor update for accuracy

This updates the doc for the following places:
- Mention CRB for Bayley Bay
- Mention Congatec QEVAL 2.0 & conga-QA3/E3845
- Limit part of the QEMU paragraphs to

x86: doc: Minor update for accuracy

This updates the doc for the following places:
- Mention CRB for Bayley Bay
- Mention Congatec QEVAL 2.0 & conga-QA3/E3845
- Limit part of the QEMU paragraphs to 80 cols
- Correct some typos (drive, it's, Ubuntu)
- Add description for "console=ttyS0,115200"
- Remove CONFIG_BOOTDELAY description which is already
in x86-common.h

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

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x86: irq: Enable SCI on IRQ9

By default SCI is disabled after power on. ACTL is the register to
enable SCI and route it to PIC/APIC. To support both ACPI in PIC
mode and APIC mode, configure SCI to

x86: irq: Enable SCI on IRQ9

By default SCI is disabled after power on. ACTL is the register to
enable SCI and route it to PIC/APIC. To support both ACPI in PIC
mode and APIC mode, configure SCI to use IRQ9.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>

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drivers: spi: add spi support for QCA/Atheros ath79 SOCs

This patch add a compatible spi driver for ath79 series SOC.

Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Thomas Chou <thoma

drivers: spi: add spi support for QCA/Atheros ath79 SOCs

This patch add a compatible spi driver for ath79 series SOC.

Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

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drivers: serial: add serial driver for ar933x SOC

This patch add support for ar933x serial.

Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-

drivers: serial: add serial driver for ar933x SOC

This patch add support for ar933x serial.

Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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Fix various typos, scattered over the code.

Spelling corrections for (among other things):

* environment
* override
* variable
* ftd (should be "fdt", for flattened device tree)
* embedded
* FTDI
*

Fix various typos, scattered over the code.

Spelling corrections for (among other things):

* environment
* override
* variable
* ftd (should be "fdt", for flattened device tree)
* embedded
* FTDI
* emulation
* controller

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Change my mailaddress

I'll switch my mails to my own server, so drop all gmail references.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

mkimage: fix argument parsing on BSD systems

The getopt(3) optstring '-' is a GNU extension which is not available on BSD
systems like OS X.

Remove this dependency by implementing argument parsing

mkimage: fix argument parsing on BSD systems

The getopt(3) optstring '-' is a GNU extension which is not available on BSD
systems like OS X.

Remove this dependency by implementing argument parsing in another way. This
will also change the lately introduced '-b' switch behaviour.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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Merge branch 'master' of git://git.denx.de/u-boot-samsung

doc: Updated README.ext4

Clean up the ext4 README file.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>

doc: driver-model: Update dm tests run using test.py

Since all the tests are implemented in pytest infrastructure,
So update the dm tests with the same instead of ./test/dm/test-dm.sh

Cc: Tom Rini

doc: driver-model: Update dm tests run using test.py

Since all the tests are implemented in pytest infrastructure,
So update the dm tests with the same instead of ./test/dm/test-dm.sh

Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>

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odroid: Update README with correct firmware link and XU4 support

The firmware from link [1] only works with U-Boot image that is no
bigger than 328KiB. Using it with the default mainline U-Boot tod

odroid: Update README with correct firmware link and XU4 support

The firmware from link [1] only works with U-Boot image that is no
bigger than 328KiB. Using it with the default mainline U-Boot today
which is already around 500KiB is just not working. Correct the link
to be hardkernel_1mb_uboot one [2], so that users can get mainline
U-Boot work out of box.

While at it, the README is updated to include XU4 support, like DTB file
name.

[1] https://github.com/hardkernel/u-boot/tree/odroidxu3-v2012.07/sd_fuse/hardkernel
[2] https://github.com/hardkernel/u-boot/tree/odroidxu3-v2012.07/sd_fuse/hardkernel_1mb_uboot

Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

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i2c: Describe Cadence I2C devicetree bindings

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

armv8: LS2080A: Consolidate LS2080A and LS2085A

LS2080A is the primary SoC, and LS2085A is a personality with AIOP
and DPAA DDR. The RDB and QDS boards support both personality. By
detecting the SVR

armv8: LS2080A: Consolidate LS2080A and LS2085A

LS2080A is the primary SoC, and LS2085A is a personality with AIOP
and DPAA DDR. The RDB and QDS boards support both personality. By
detecting the SVR at runtime, a single image per board can support
both SoCs. It gives users flexibility to swtich SoC without the need
to reprogram the board.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

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Add myself as Snapdragon and SPMI maintainer

- Update MAINTAINERS
- Update git-mailrc

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

gpio: Add support for Qualcomm PM8916 gpios

This driver supports GPIOs present on PM8916 PMIC.
There are 2 device drivers inside:
- GPIO driver (4 "generic" GPIOs)
- Keypad driver that presents itse

gpio: Add support for Qualcomm PM8916 gpios

This driver supports GPIOs present on PM8916 PMIC.
There are 2 device drivers inside:
- GPIO driver (4 "generic" GPIOs)
- Keypad driver that presents itself as GPIO with 2 inputs (power and reset)

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

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pmic: Add support for Qualcomm PM8916 PMIC

This PMIC is connected on SPMI bus so needs SPMI support enabled.

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: Simon Glas

pmic: Add support for Qualcomm PM8916 PMIC

This PMIC is connected on SPMI bus so needs SPMI support enabled.

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

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drivers: spmi: Add support for Qualcomm SPMI bus driver

Support SPMI arbiter on Qualcomm Snapdragon devices.

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: Simon Glas

drivers: spmi: Add support for Qualcomm SPMI bus driver

Support SPMI arbiter on Qualcomm Snapdragon devices.

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

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