MAINTAINERS: socfpga: update email address for Dinh NguyenWith the acquisition of Altera by Intel, my Altera email may be goingaway soon. Update the contact to a more reliable address.Signed-off
MAINTAINERS: socfpga: update email address for Dinh NguyenWith the acquisition of Altera by Intel, my Altera email may be goingaway soon. Update the contact to a more reliable address.Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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arm: socfpga: de0-nano-soc: Adding handoff for SDRAM ctrlcfg.extratime1Adding new handoff for SDRAM ctrcfg.extratime1 which isrequired for stable LPDDR2 operation. Since the board isusing DDR3, t
arm: socfpga: de0-nano-soc: Adding handoff for SDRAM ctrlcfg.extratime1Adding new handoff for SDRAM ctrcfg.extratime1 which isrequired for stable LPDDR2 operation. Since the board isusing DDR3, the handoff is set to default value 0.Signed-off-by: Chin Liang See <clsee@altera.com>Cc: Marek Vasut <marex@denx.de>Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
arm: socfpga: Drop the board boilerplateDrop all the common board code, since it is not completely useless.Signed-off-by: Marek Vasut <marex@denx.de>Cc: Chin Liang See <clsee@altera.com>Cc: Din
arm: socfpga: Drop the board boilerplateDrop all the common board code, since it is not completely useless.Signed-off-by: Marek Vasut <marex@denx.de>Cc: Chin Liang See <clsee@altera.com>Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
arm: socfpga: de0_nano: Remove Micrel PHY configurationThe Micrel PHY configuration is now done from OF, so hard-codingthe configuration into the board file is no longer necessary.Signed-off-by:
arm: socfpga: de0_nano: Remove Micrel PHY configurationThe Micrel PHY configuration is now done from OF, so hard-codingthe configuration into the board file is no longer necessary.Signed-off-by: Marek Vasut <marex@denx.de>Cc: Joe Hershberger <joe.hershberger@ni.com>Cc: Chin Liang See <clsee@altera.com>Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
arm: socfpga: Add support for the Terasic DE-0 Atlas boardAdd support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneVbased board. The board can boot from SD/MMC. Ethernet is also suppo
arm: socfpga: Add support for the Terasic DE-0 Atlas boardAdd support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneVbased board. The board can boot from SD/MMC. Ethernet is also supported.Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>