| #
b0fe93ed |
| 26-Mar-2009 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Use common LSDMR defines from asm/fsl_lbc.h
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| #
ef29884b |
| 25-Jan-2009 |
Ben Warren <biggerbadderben@gmail.com> |
Merge git://git.denx.de/u-boot into u-boot
|
| #
8f86a363 |
| 24-Jan-2009 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
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| #
5f91ef6a |
| 02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards
Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead
of _IO_BASE so we are more explicit.
Signed-off-by: Kumar Gala <galak
85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards
Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead
of _IO_BASE so we are more explicit.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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|
| #
10795f42 |
| 02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards
Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead
of _MEM_BASE so we are more explicit.
Signed-off-by: K
85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards
Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead
of _MEM_BASE so we are more explicit.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
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|
| #
be4880eb |
| 22-Jan-2009 |
Kim Phillips <kim.phillips@freescale.com> |
Merge branch 'master' into next
|
| #
f85cd469 |
| 30-Dec-2008 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
|
| #
a5d212a2 |
| 03-Dec-2008 |
Trent Piepho <tpiepho@freescale.com> |
mpc8xxx: LCRR[CLKDIV] is sometimes five bits
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.
In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on al
mpc8xxx: LCRR[CLKDIV] is sometimes five bits
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.
In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It
should be safe as the fifth bit was defined as reserved and set to 0.
Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.
Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
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|
| #
cb547320 |
| 17-Dec-2008 |
Haavard Skinnemoen <haavard.skinnemoen@atmel.com> |
Merge branch 'fixes' into cleanups
Conflicts:
board/atmel/atngw100/atngw100.c
board/atmel/atstk1000/atstk1000.c
cpu/at32ap/at32ap700x/gpio.c
include/asm-avr32/arch-at32ap700x/clk.h
include/con
Merge branch 'fixes' into cleanups
Conflicts:
board/atmel/atngw100/atngw100.c
board/atmel/atstk1000/atstk1000.c
cpu/at32ap/at32ap700x/gpio.c
include/asm-avr32/arch-at32ap700x/clk.h
include/configs/atngw100.h
include/configs/atstk1002.h
include/configs/atstk1003.h
include/configs/atstk1004.h
include/configs/atstk1006.h
include/configs/favr-32-ezkit.h
include/configs/hammerhead.h
include/configs/mimc200.h
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|
| #
762bd90c |
| 04-Dec-2008 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
|
| #
9427ccde |
| 01-Dec-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add PORDEVSR_PCI1 define
Add define used to determine if PCI1 interface is in PCI or PCIX mode.
Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1
Signed-off-by: Pet
85xx: Add PORDEVSR_PCI1 define
Add define used to determine if PCI1 interface is in PCI or PCIX mode.
Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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|
| #
a2cd50ed |
| 11-Nov-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add CPU 2 errata workaround to all 8548 boards
All mpc8548-based boards should implement the suggested workaround
to CPU 2 errata. Without the workaround, its possible for the
8548's core to h
85xx: Add CPU 2 errata workaround to all 8548 boards
All mpc8548-based boards should implement the suggested workaround
to CPU 2 errata. Without the workaround, its possible for the
8548's core to hang while executing a msync or mbar 0 instruction
and a snoopable transaction from an I/O master tagged to make
quick forward progress is present.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andy Fleming <afleming@freescale.com>
show more ...
|
| #
9b0ad1b1 |
| 28-Oct-2008 |
Dave Liu <daveliu@freescale.com> |
85xx: remove the unused ddr_enable_ecc in the board file
The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we d
85xx: remove the unused ddr_enable_ecc in the board file
The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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|
| #
33211469 |
| 10-Nov-2008 |
Jon Loeliger <jdl@freescale.com> |
Merge commit 'wd/master'
|
| #
3cbd8231 |
| 02-Nov-2008 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
| #
f8030519 |
| 27-Oct-2008 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
|
| #
2dba0dea |
| 21-Oct-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert all fsl_pci_init users to new APIs
Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS,
MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows()
and ft_fsl_p
85xx: Convert all fsl_pci_init users to new APIs
Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS,
MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows()
and ft_fsl_pci_setup().
With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
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|
| #
f61f1e15 |
| 21-Oct-2008 |
Stefan Roese <sr@denx.de> |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
|
| #
50bd0057 |
| 21-Oct-2008 |
Markus Klotzbuecher <mk@denx.de> |
Merge git://git.denx.de/u-boot into x1
Conflicts:
drivers/usb/usb_ohci.c
|
| #
f82642e3 |
| 18-Oct-2008 |
Wolfgang Denk <wd@denx.de> |
Merge 'next' branch
Conflicts:
board/freescale/mpc8536ds/mpc8536ds.c
include/configs/mgcoge.h
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
| #
6d0f6bcf |
| 16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
| #
0ba6bfef |
| 27-Aug-2008 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
|
| #
e31d2c1e |
| 18-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
FSL DDR: Convert MPC8548CDS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| #
794a5924 |
| 10-Jul-2008 |
Markus Klotzbuecher <mk@denx.de> |
Merge branch 'master' of git://www.denx.de/git/u-boot
|
| #
9973e3c6 |
| 09-Jun-2008 |
Becky Bruce <becky.bruce@freescale.com> |
Change initdram() return type to phys_size_t
This patch changes the return type of initdram() from long int to phys_size_t.
This is required for a couple of reasons: long int limits the amount of dr
Change initdram() return type to phys_size_t
This patch changes the return type of initdram() from long int to phys_size_t.
This is required for a couple of reasons: long int limits the amount of dram
to 2GB, and u-boot in general is moving over to phys_size_t to represent the
size of physical memory. phys_size_t is defined as an unsigned long on almost
all current platforms.
This patch *only* changes the return type of the initdram function (in
include/common.h, as well as in each board's implementation of initdram). It
does not actually modify the code inside the function on any of the platforms;
platforms which wish to support more than 2GB of DRAM will need to modify
their initdram() function code.
Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
MPC8641HPCN.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
show more ...
|