85xx: convert MPC8544 DS over to use new LAW init code

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

MPC8544DS: fix board Makefile for silent build (with -s)

Signed-off-by: Wolfgang Denk <wd@denx.de>

Fix linker scripts: add NOLOAD atribute to .bss/.sbss sections

With recent toolchain versions, some boards would not build because
or errors like this one (here for ocotea board when building with
E

Fix linker scripts: add NOLOAD atribute to .bss/.sbss sections

With recent toolchain versions, some boards would not build because
or errors like this one (here for ocotea board when building with
ELDK 4.2 beta):
ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab]

For many boards, the .bss section is big enough that it wraps around
at the end of the address space (0xFFFFFFFF), so the problem will not
be visible unless you use a 64 bit tool chain for development. On
some boards however, changes to the code size (due to different
optimizations) we bail out with section overlaps like above.

The fix is to add the NOLOAD attribute to the .bss and .sbss
sections, telling the linker that .bss does not consume any space in
the image.

Signed-off-by: Wolfgang Denk <wd@denx.de>

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Reworked FSL Book-E TLB macros to be more readable

The old macros made it difficult to know what WIMGE and perm bits
were set for a TLB entry. Actually use the bit masks for these items
since they

Reworked FSL Book-E TLB macros to be more readable

The old macros made it difficult to know what WIMGE and perm bits
were set for a TLB entry. Actually use the bit masks for these items
since they are only a single bit.

Also moved the macros into mmu.h out of e500.h since they aren't specific
to e500.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Use standard LAWAR_TRGT_IF_* defines for LAW setup on 85xx

We already had defines for LAWAR_TRGT_IF_* that we should use
rather than creating new ones. Also, added some missing defines for
PCIE tar

Use standard LAWAR_TRGT_IF_* defines for LAW setup on 85xx

We already had defines for LAWAR_TRGT_IF_* that we should use
rather than creating new ones. Also, added some missing defines for
PCIE targets.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Stop using immap_t on 85xx

In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_*_ADDR as the base of the registers
instead of getting it via &immap.

S

Stop using immap_t on 85xx

In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_*_ADDR as the base of the registers
instead of getting it via &immap.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Stop using immap_t for guts offset on 85xx

In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_GUTS_ADDR as the base of the guts registers
instead of g

Stop using immap_t for guts offset on 85xx

In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_GUTS_ADDR as the base of the guts registers
instead of getting it via &immap->im_gur.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Update MPC8544DS to use libfdt

Updated the MPC8544DS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.

Signed-off-by: Kumar Gala <ga

Update MPC8544DS to use libfdt

Updated the MPC8544DS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Fix compiler warnings for PPC systems. Update CHANGELOG.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Fix ULI RTC support on MPC8544 DS

The RTC on the M1575 ULI chipset requires a dummy read before
we are able to talk to the RTC. We accomplish this by adding a
second memory region to the PHB the UL

Fix ULI RTC support on MPC8544 DS

The RTC on the M1575 ULI chipset requires a dummy read before
we are able to talk to the RTC. We accomplish this by adding a
second memory region to the PHB the ULI is on and read from it.

The second region is added to maintain compatiabilty with Linux's
view of the PCI memory map.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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ft_board_setup update 85xx/86xx of pci/pcie bus-range property.

pcie is now differentiated from pci. Add 8641 bus-range updates.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>

support board vendor-common makefiles

if a board/$(VENDOR)/common/Makefile exists, build it.

also add the first such case, board/freescale/common/Makefile, to
handle building board-shared EEPROM, P

support board vendor-common makefiles

if a board/$(VENDOR)/common/Makefile exists, build it.

also add the first such case, board/freescale/common/Makefile, to
handle building board-shared EEPROM, PIXIS, and MDS-PIB code, as
dictated by board configuration.

thusly get rid of alternate build dir errors such as:

FATAL: can't create /work/wd/tmp/u-boot-ppc/board/freescale/mpc8360emds/../common/pq-mds-pib.o: No such file or directory

by putting the common/ mkdir command in its proper place (the common
Makefile). Common bits from existing individual board Makefiles have
been removed.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

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Update MPC8544 DS PCI memory map

The PCIe bus that the ULI M1575 is connected to has no possible way of
needing more than the fixed amount of IO & Memory space needed by the ULI.

So make it use far

Update MPC8544 DS PCI memory map

The PCIe bus that the ULI M1575 is connected to has no possible way of
needing more than the fixed amount of IO & Memory space needed by the ULI.

So make it use far less IO & memory space and have it use the shared LAW. This
free's up a LAW for PCIe1 IO space. Also reduce the amount of IO space needed
by each bus.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Fix up some fdt issues on 8544DS

It looks like we had a merge issue that duplicated a bit of code
in ft_board_setup. Also, we need to set CONFIG_HAS_ETH0 to get
the MAC address properly set in the

Fix up some fdt issues on 8544DS

It looks like we had a merge issue that duplicated a bit of code
in ft_board_setup. Also, we need to set CONFIG_HAS_ETH0 to get
the MAC address properly set in the device tree on boot for TSEC1

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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8544ds PCIE support

PCI1 LAW mapping should use CFG_PCI1_MEM_PHY and not _BASE address.

Enable LBC and ECM errors and clear error registers.

Add tftpflash env var to get uboot from tftp server and

8544ds PCIE support

PCI1 LAW mapping should use CFG_PCI1_MEM_PHY and not _BASE address.

Enable LBC and ECM errors and clear error registers.

Add tftpflash env var to get uboot from tftp server and flash it.

Add pci/pcie convenience env vars to display register space:
"run pcie3regs" to see all pcie3 ccsr registers
"run pcie3cfg" to see all cfg registers
Whitespace cleanup and MPC8544DS.h

Enable CONFIG_INTERRUPTS.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>

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8544ds: Fix Makefile after moving pixis to board/freescale.

The OBJTREE != SRCTREE build scenario was broken.
This fixes it.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by:

8544ds: Fix Makefile after moving pixis to board/freescale.

The OBJTREE != SRCTREE build scenario was broken.
This fixes it.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>

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Coding stylke cleanup; update CHANGELOG.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Add MPC8544DS basic port board files.

Add board port under new board/freescale directory
structure and reuse existing PIXIS FPGA support there.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.c

Add MPC8544DS basic port board files.

Add board port under new board/freescale directory
structure and reuse existing PIXIS FPGA support there.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>

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