| f2d9a5da | 17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
powerpc 83xx/85xx: Merge lbc upmconfig code
Each platform had its own version of the upmconfig, despite the
init process being identical. Now that we have a spot for common
lbc code, create a commo
powerpc 83xx/85xx: Merge lbc upmconfig code
Each platform had its own version of the upmconfig, despite the
init process being identical. Now that we have a spot for common
lbc code, create a common upmconfig() there.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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|
| 199e262e | 17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx: Add reginfo command
The new command dumps the TLBCAM, the LAWs, and the BR/OR regs.
Add CONFIG_CMD_REGINFO to the config for all MPC85xx parts.
Signed-off-by: Becky Bruce <beckyb@kernel.cr
mpc85xx: Add reginfo command
The new command dumps the TLBCAM, the LAWs, and the BR/OR regs.
Add CONFIG_CMD_REGINFO to the config for all MPC85xx parts.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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|
| 70e02bca | 17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx: Add print_tlbcam() function
This dumps out the contents of TLB1 on 85xx-based systems.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crash
mpc85xx: Add print_tlbcam() function
This dumps out the contents of TLB1 on 85xx-based systems.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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|
| 4e63df30 | 17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx: tlb.c cleanups
Extract the operation to read a tlb into a function - we will need
this later to print out the tlbs, and there's no point in duplicating
the code. Create a TSIZE_TO_BYTES ma
mpc85xx: tlb.c cleanups
Extract the operation to read a tlb into a function - we will need
this later to print out the tlbs, and there's no point in duplicating
the code. Create a TSIZE_TO_BYTES macro to deal with the conversion
from the MAS field to an actual size instead of duplicating this in code.
There are a few misc other minor cleanups.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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|
| f51cdaf1 | 17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
83xx/85xx/86xx: LBC register cleanup
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers. Merge
this into a single spot.
To do th
83xx/85xx/86xx: LBC register cleanup
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers. Merge
this into a single spot.
To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.
In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.
I have done a successful ppc build all and tested a board or two from
each processor family.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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|
| 8f3a7fa4 | 10-Jun-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/8xxx: Add is_core_disabled to remove disabled cores from dtb
If we explicitly disabled a core remove it from the dtb we pass on to
the kernel.
Signed-off-by: Kumar Gala <galak@kernel.crashi
powerpc/8xxx: Add is_core_disabled to remove disabled cores from dtb
If we explicitly disabled a core remove it from the dtb we pass on to
the kernel.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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|
| 11beefa3 | 09-Jun-2010 |
Kumar Gala <galak@kernel.crashing.org> |
mpc8xxx: Remove cpu-handles for cpus we delete
We may have cpu-handles pointing to the cpu nodes we delete. If so we
should delete the handles as well.
Signed-off-by: Kumar Gala <galak@kernel.cras
mpc8xxx: Remove cpu-handles for cpus we delete
We may have cpu-handles pointing to the cpu nodes we delete. If so we
should delete the handles as well.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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|
| 22f292c7 | 01-Jun-2010 |
Kim Phillips <kim.phillips@freescale.com> |
powerpc/8xxx: Add base support for the SEC4
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
| 929a2138 | 01-Jun-2010 |
Kim Phillips <kim.phillips@freescale.com> |
powerpc/8xxx: Distinguish between incompatible SEC h/w types
CONFIG_SYS_FSL_SEC_COMPAT is set to 2 for the SEC 2.x and SEC 3.x.
Parts with newer SEC h/w versions will increment the number to
accomod
powerpc/8xxx: Distinguish between incompatible SEC h/w types
CONFIG_SYS_FSL_SEC_COMPAT is set to 2 for the SEC 2.x and SEC 3.x.
Parts with newer SEC h/w versions will increment the number to
accomodate incompatible code changes.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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|
| 5d0c3b57 | 28-May-2010 |
Kim Phillips <kim.phillips@freescale.com> |
fdt: move fsl specific code from common fdt area to mpc8xxx/fdt.c
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
| 7c619ddc | 28-Jun-2010 |
Ilya Yanok <yanok@emcraft.com> |
mpc8308: support for Freescale MPC8308 cpu
This patch adds basic support for Freescale MPC8308 CPU. Serial ports,
NOR flash and integrated Ethernet controllers are supported.
PCI Express is also sup
mpc8308: support for Freescale MPC8308 cpu
This patch adds basic support for Freescale MPC8308 CPU. Serial ports,
NOR flash and integrated Ethernet controllers are supported.
PCI Express is also supported. eSDHC, NAND and USB may work but aren't
tested (using ULPI PHY requires additional patch).
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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|
| 54841ab5 | 28-Jun-2010 |
Wolfgang Denk <wd@denx.de> |
Make sure that argv[] argument pointers are not modified.
The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
comm
Make sure that argv[] argument pointers are not modified.
The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
commands. Any code that modifies these pointers will cause serious
corruption of the malloc data structures and crash U-Boot, so make
sure the compiler can check that no such modifications are being done
by changing the code into "char * const argv[]".
This modification is the result of debugging a strange crash caused
after adding a new command, which used the following argument
processing code which has been working perfectly fine in all Unix
systems since version 6 - but not so in U-Boot:
int main (int argc, char **argv)
{
while (--argc > 0 && **++argv == '-') {
/* ====> */ while (*++*argv) {
switch (**argv) {
case 'd':
debug++;
break;
...
default:
usage ();
}
}
}
...
}
The line marked "====>" will corrupt the malloc data structures and
usually cause U-Boot to crash when the next command gets executed by
the shell. With the modification, the compiler will prevent this with
an
error: increment of read-only location '*argv'
N.B.: The code above can be trivially rewritten like this:
while (--argc > 0 && **++argv == '-') {
char *arg = *argv;
while (*++arg) {
switch (*arg) {
...
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
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|
| 4978e605 | 27-May-2010 |
Stefan Roese <sr@denx.de> |
ppc4xx: Cleanup Boot/FLASH TLB reassignment for PPC440/460
Background Info:
Some PPC440/460 boards have caches enabled in the Boot/FLASH TLB (via
init.S) to speed up the boot process. In relocate_co
ppc4xx: Cleanup Boot/FLASH TLB reassignment for PPC440/460
Background Info:
Some PPC440/460 boards have caches enabled in the Boot/FLASH TLB (via
init.S) to speed up the boot process. In relocate_code (start.S) the
cache inhibit attribute for this TLB is set to disable cache. This is
needed for the CFI FLASH driver.
This patch now cleans this code up:
- CONFIG_SYS_TLB_FOR_BOOT_FLASH is defined to 0 (default TLB) if not
defined in the top of this file. This way, we can remove an ugly
#ifdef in this code.
- Replace complex "#if defined(CONFIG_440EP) || defined(CONFIG_GR)..."
statement with "#if defined(CONFIG_440)".
- Remove unnecessary cache invalidate calls resulting in faster bootup.
Signed-off-by: Stefan Roese <sr@denx.de>
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|
| e9c020df | 25-May-2010 |
Stefan Roese <sr@denx.de> |
ppc4xx: DDR2: Complete RDSS configuration on non-SPD based boards
As described in item #10 of the SDRAM initialization (chapter 22.2.9
of the PPC460EX/EXr/GT users manual), RDSS may need to be adjus
ppc4xx: DDR2: Complete RDSS configuration on non-SPD based boards
As described in item #10 of the SDRAM initialization (chapter 22.2.9
of the PPC460EX/EXr/GT users manual), RDSS may need to be adjusted. The
code for this is now factored out and executed for non-SPD based boards
as well.
Signed-off-by: Stefan Roese <sr@denx.de>
show more ...
|
| 066003b2 | 25-May-2010 |
Stefan Roese <sr@denx.de> |
ppc4xx: Enable overwriting of default scan window for IBM DDR2 controller
This patch makes it possible to overwrite the default auto-calibration
scan window (SDRAM_WRDTR.[WDTR], SDRAM_CLKTR.[CKTR] v
ppc4xx: Enable overwriting of default scan window for IBM DDR2 controller
This patch makes it possible to overwrite the default auto-calibration
scan window (SDRAM_WRDTR.[WDTR], SDRAM_CLKTR.[CKTR] values) with
board specific values. The parameters of the weak default function are
corrected as well. This way we don't need the casts any more.
This feature will be used by an upcoming PPC460GT board port.
Signed-off-by: Stefan Roese <sr@denx.de>
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|
| db643773 | 21-May-2010 |
Stefan Roese <sr@denx.de> |
ppc4xx: Enable PCIe support without PCI support on PPC440/460
By not defining CONFIG_SYS_PCI_MASTER_INIT and CONFIG_SYS_PCI_TARGET_INIT,
PCI support (host and adapter) will not be enabled. But it's
ppc4xx: Enable PCIe support without PCI support on PPC440/460
By not defining CONFIG_SYS_PCI_MASTER_INIT and CONFIG_SYS_PCI_TARGET_INIT,
PCI support (host and adapter) will not be enabled. But it's still
possible to use the U-Boot PCI infrastructure for the PCIe ports.
This configuration option is needed for a new 460GT board, which uses
PCIe but has PCI disabled.
Signed-off-by: Stefan Roese <sr@denx.de>
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|
| fe7cca71 | 19-May-2010 |
Stefan Roese <sr@denx.de> |
ppc4xx: Enable booting with Option E on 460EX/EXr/GT
This patch enables booting with option E on the PPC460EX/EXr/GT.
When booting with Option E, the PLL is in bypass, CPR0_PLLC[ENG]=0.
The Software
ppc4xx: Enable booting with Option E on 460EX/EXr/GT
This patch enables booting with option E on the PPC460EX/EXr/GT.
When booting with Option E, the PLL is in bypass, CPR0_PLLC[ENG]=0.
The Software Boot Configuration Procedure is needed to engage the
PLL and perform a chip reset.
Signed-off-by: Stefan Roese <sr@denx.de>
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|
| 0a9463e9 | 29-Jun-2010 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' into next |
| 4ccd5510 | 28-Jun-2010 |
Wolfgang Denk <wd@denx.de> |
MPC512x: workaround data corruption for unaligned local bus accesses
Commit 460c2ce3 "MPC5200: workaround data corruption for unaligned
local bus accesses" fixed the problem for MPC5200 only, but MP
MPC512x: workaround data corruption for unaligned local bus accesses
Commit 460c2ce3 "MPC5200: workaround data corruption for unaligned
local bus accesses" fixed the problem for MPC5200 only, but MPC512x is
affected as well, so apply the same fix here, too.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
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|
| 953b7e62 | 13-Jun-2010 |
Wolfgang Denk <wd@denx.de> |
Remove AmigaOneG3SE board
The AmigaOneG3SE board has been orphaned or a very long time, and
broken for more than 12 releases resp. more than 3 years. As nobody
seems to be interested any more in th
Remove AmigaOneG3SE board
The AmigaOneG3SE board has been orphaned or a very long time, and
broken for more than 12 releases resp. more than 3 years. As nobody
seems to be interested any more in this stuff we may as well ged rid
of it, especially as it clutters many areas of the code so it is a
continuous pain for all kinds of ongoing work.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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|
| ee80fa7b | 13-Jun-2010 |
Wolfgang Denk <wd@denx.de> |
Get rid of bogus CONFIG_SYS_BUS_HZ and CONFIG_SYS_CONFIG_BUS_CLK definitions
CONFIG_SYS_BUS_HZ has not really been used anywhere except to be
redined as CONFIG_SYS_BUS_CLK; in addition, the mpc7448h
Get rid of bogus CONFIG_SYS_BUS_HZ and CONFIG_SYS_CONFIG_BUS_CLK definitions
CONFIG_SYS_BUS_HZ has not really been used anywhere except to be
redined as CONFIG_SYS_BUS_CLK; in addition, the mpc7448hpc2 had the
bogus CONFIG_SYS_CONFIG_BUS_CLK setting which duplicated the
funtionality. Change all this to use CONFIG_SYS_BUS_CLK consistently.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Frank Gottschling <fgottschling@eltec.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Cc: Eran Man <eran@nbase.co.il>
Cc: Stefan Roese <sr@denx.de>
Cc: Nye Liu <nyet@zumanetworks.com>
Cc: Roy Zang <tie-fei.zang@freescale.com>
show more ...
|
| f35f3968 | 23-Jun-2010 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' into next |
| 460c2ce3 | 21-Jun-2010 |
Wolfgang Denk <wd@denx.de> |
MPC5200: workaround data corruption for unaligned local bus accesses
The MPC5200 has a nasty problem that will cause silent data corruption
when performing unaligned 16 or 32 byte accesses when read
MPC5200: workaround data corruption for unaligned local bus accesses
The MPC5200 has a nasty problem that will cause silent data corruption
when performing unaligned 16 or 32 byte accesses when reading from the
local bus - typically this affects reading from flash. The problem can
be easily shown:
=> md fc0c0000 10
fc0c0000: 323e4337 01626f6f 74636d64 3d72756e 2>C7.bootcmd=run
fc0c0010: 206e6574 5f6e6673 00626f6f 7464656c net_nfs.bootdel
fc0c0020: 61793d35 00626175 64726174 653d3131 ay=5.baudrate=11
fc0c0030: 35323030 00707265 626f6f74 3d656368 5200.preboot=ech
=> md fc0c0001 10
fc0c0001: 65636801 00000074 0000003d 00000020 ech....t...=...
fc0c0011: 0000005f 00000000 00000074 00000061 ..._.......t...a
fc0c0021: 00000000 00000064 00000065 00000035 .......d...e...5
fc0c0031: 00000000 00000062 0000003d 0000006f .......b...=...o
=> md.w fc0c0001 10
fc0c0001: 0000 3701 0000 6f74 0000 643d 0000 6e20 ..7...ot..d=..n
fc0c0011: 0000 745f 0000 7300 0000 6f74 0000 6c61 ..t_..s...ot..la
This commit implements a workaround at least for the most blatant
problem: using memcpy() from NOR flash. We rename the assembler
routine into __memcpy() and provide a wrapper, which will use a
byte-wise copy loop for unaligned source or target addresses when
reading from NOR flash, and branch to the optimized __memcpy()
in all other cases, thus minimizing the performance impact.
Tested on lite5200b and TQM5200S.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
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|
| 10543820 | 01-May-2010 |
Anatolij Gustschin <agust@denx.de> |
video: cfb_console: add weak default video_set_lut()
Do not enforce drivers to provide empty video_set_lut()
if they do not implement indexed color (8 bpp) frame
buffer support. Add default function
video: cfb_console: add weak default video_set_lut()
Do not enforce drivers to provide empty video_set_lut()
if they do not implement indexed color (8 bpp) frame
buffer support. Add default function to the cfb_console
driver and remove empty video_set_lut() functions.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
show more ...
|
| 45b728cd | 26-May-2010 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx |