ARM: uniphier: refactor SBC init code

Merge sbc-admulti.c and sbc-savepin.c into a single file to avoid
code duplication.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: refactor MEMCONF init code

Currently, memconf-sld3.c and memconf-pxs2.c duplicate the code.

There are 3 patterns in terms of MEMCONF init:
- DRAM 2 channels: LD4, sLD8, Pro4, Pro5,

ARM: uniphier: refactor MEMCONF init code

Currently, memconf-sld3.c and memconf-pxs2.c duplicate the code.

There are 3 patterns in terms of MEMCONF init:
- DRAM 2 channels: LD4, sLD8, Pro4, Pro5, LD11
- DRAM 3 channels: sLD3
- DRAM 3 channels (Ch2 is disable by MEMCONF[21]): Pxs2, LD20

All of them can be moved into a single file by a little more
refactoring.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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ARM: uniphier: split out UMC clock enable

The clock enable bits for UMC are more SoC-specific than for
the other hardware blocks. Separate the UMC clocks and the other
clocks for better code reuse

ARM: uniphier: split out UMC clock enable

The clock enable bits for UMC are more SoC-specific than for
the other hardware blocks. Separate the UMC clocks and the other
clocks for better code reuse across SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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ARM: uniphier: remove unneeded argument of uniphier_ld20_pll_init()

At first, we thought the LD20 PLL setting would be board dependent,
but this argument turned out unneeded after all.

Signed-off-b

ARM: uniphier: remove unneeded argument of uniphier_ld20_pll_init()

At first, we thought the LD20 PLL setting would be board dependent,
but this argument turned out unneeded after all.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Merge branch 'master' of git://git.denx.de/u-boot-uniphier

ARM: uniphier: update DRAM init code for LD20 SoC (3rd)

- Constify UMC setting data arrays
- Merge data arrays *_d0 and *_d1.
- Add PHY parameters for LD20 C1 board

Signed-off-by: Masahiro Ya

ARM: uniphier: update DRAM init code for LD20 SoC (3rd)

- Constify UMC setting data arrays
- Merge data arrays *_d0 and *_d1.
- Add PHY parameters for LD20 C1 board

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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ARM: uniphier: remove unused board attribute macros

After SoC evaluation, they turned out unnecessary.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Merge branch 'master' of git://git.denx.de/u-boot-uniphier

ARM: uniphier: add PLL init code for LD11 SoC

- Initialize PLLs (SPL initializes only DPLL to save the precious
SPL memory footprint)
- Adjust CPLL/MPLL to the final tape-out frequency
- Set t

ARM: uniphier: add PLL init code for LD11 SoC

- Initialize PLLs (SPL initializes only DPLL to save the precious
SPL memory footprint)
- Adjust CPLL/MPLL to the final tape-out frequency
- Set the Cortex-A53 clock to the maximum frequency since it is
running at 500MHz (SPLL/4) on startup

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Merge branch 'master' of git://git.denx.de/u-boot-uniphier

ARM: uniphier: add PLL init code for LD20 SoC

Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot
proper. Split the common code into pll-base-ld20.c for easier
re-use.

Signed-off-by: M

ARM: uniphier: add PLL init code for LD20 SoC

Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot
proper. Split the common code into pll-base-ld20.c for easier
re-use.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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ARM: uniphier: move PLL init code to U-Boot proper where possible

The PLL for the DRAM interface must be initialized in SPL, but the
others can be delayed until U-Boot proper. Move them from SPL to

ARM: uniphier: move PLL init code to U-Boot proper where possible

The PLL for the DRAM interface must be initialized in SPL, but the
others can be delayed until U-Boot proper. Move them from SPL to
U-Boot proper to save the precious SPL memory footprint.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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ARM: uniphier: move XIRQ pin-mux settings of LD11/LD20

This is the last code in the mach-uniphier/pinctrl/ directory.
Push the remaining code out to delete the directory entirely.

Signed-off-by: Ma

ARM: uniphier: move XIRQ pin-mux settings of LD11/LD20

This is the last code in the mach-uniphier/pinctrl/ directory.
Push the remaining code out to delete the directory entirely.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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ARM: uniphier: consolidate System Bus pin-mux settings for LD11/LD20

Use the pin-mux data in the pinctrl drivers by directly calling
pinctrl_generic_set_state().

Signed-off-by: Masahiro Yamada <yam

ARM: uniphier: consolidate System Bus pin-mux settings for LD11/LD20

Use the pin-mux data in the pinctrl drivers by directly calling
pinctrl_generic_set_state().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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ARM: uniphier: consolidate NAND pin-mux settings

The NAND subsystem has not supported the Driver Model yet, but the
NAND pin-mux data are already in the pinctrl drivers. Use them by
calling pinctrl

ARM: uniphier: consolidate NAND pin-mux settings

The NAND subsystem has not supported the Driver Model yet, but the
NAND pin-mux data are already in the pinctrl drivers. Use them by
calling pinctrl_generic_set_state() directly.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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ARM: uniphier: remove ad-hoc pin-mux code for sLD3

These settings are nicely cared by the pinctrl driver now. Remove.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: introduce flags to adjust DRAM timing for LD20/LD21

Unfortunately, this SoC needs per-board adjustment between clock
and address/command lines. This flag will be passed to the DRAM
i

ARM: uniphier: introduce flags to adjust DRAM timing for LD20/LD21

Unfortunately, this SoC needs per-board adjustment between clock
and address/command lines. This flag will be passed to the DRAM
init function and used for compensating the difference of DRAM
timing parameters.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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ARM: uniphier: merge board init functions into board_init()

Currently, the UniPhier platform calls several init functions in the
following order:

[1] spl_board_init()
[2] board_early_init_f()

ARM: uniphier: merge board init functions into board_init()

Currently, the UniPhier platform calls several init functions in the
following order:

[1] spl_board_init()
[2] board_early_init_f()
[3] board_init()
[4] board_early_init_r()
[5] board_late_init()

The serial console is not ready at the point of [2], so we want to
avoid using [2] from the view point of debuggability. Fortunately,
all of the initialization in [2] can be delayed until [3]. I see no
good reason to split into [3] and [4]. So, merge [2] through [4].

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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ARM: uniphier: add PH1-LD21 board data

This has the same silicon die as PH1-LD20, but includes DRAM chips
in its package.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: introduce flags to uniphier_board_data structure

I need to add more board attributes, so the "flags" member will be
handier than separate boolean ones.

Signed-off-by: Masahiro Yamada

ARM: uniphier: introduce flags to uniphier_board_data structure

I need to add more board attributes, so the "flags" member will be
handier than separate boolean ones.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

show more ...

Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot-uniphier

ARM: uniphier: add PH1-LD11 SoC support

This is a low-cost ARMv8 SoC from Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Merge branch 'master' of git://git.denx.de/u-boot

Merge branch 'master' of git://git.denx.de/u-boot-uniphier