usbplug: rv1126: Support SPI Flash

Change-Id: I9596da2a2a147a4fd6068fde69e1a3bc08ef9b1e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

rockchip: rv11xx: reset sdmmc0 to prevent CMD pin power leak

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ica7d24a1670d8fb30c2f382e683d6aacd205db15

rockchip: rv1126: Print the detail info for PD

This patch print the detail info when failed to enable
PD to help us find the root cause quickly.

Suggest to supply for VDD_NPU / VDD_VEPU even though

rockchip: rv1126: Print the detail info for PD

This patch print the detail info when failed to enable
PD to help us find the root cause quickly.

Suggest to supply for VDD_NPU / VDD_VEPU even though they
are not used.

e.g.

U-Boot SPL board init
PMU_PWR_DOWN_ST: 0x00000000
PMU_BUS_IDLE_ST: 0x00040200
Failed to enable PD_NPU, please check VDD_NPU is supplied
Failed to enable PD_VEPU, please check VDD_VEPU is supplied

Change-Id: I66609fef04bc61e54fcd67692da71d8b851479a5
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

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rockchip: rv1126: update spl_fit_standalone_release() api

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I76857d348757812a22dd1bb541e4e9ac7f92e337

rockchip: rv1126: fix mcu does not work probabilistically

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I2c40923e092bb3afd27b35575282398c45b6b53a

Revert "rockchip: rv1126: change priority of isp\ispp\cpu\vepu\sdmmc"

This reverts commit 1e46fe7d682203981f9fe04070d6d510d396a8fd.

This patch breaks much more products, such as UVC + NN, Weston, M

Revert "rockchip: rv1126: change priority of isp\ispp\cpu\vepu\sdmmc"

This reverts commit 1e46fe7d682203981f9fe04070d6d510d396a8fd.

This patch breaks much more products, such as UVC + NN, Weston, MPP.

e.g. log info:

mpp_task_timeout_work:328: task f3a00bb0 processing time out!
mpp_vepu2 ffb90000.vepu: resetting...
Unhandled fault: external abort on non-linefetch (0x008) at 0xd090c1b4

and thus make problems QoS-related hard to be analysed.

QoS was initialized in SPL and can be changed from kernel dtsi depends
on different products.

So, we revert this patch and make QoS changed from product dtsi, such
as: rv1126-ipc.dtsi, rv1126-ai-cam.dtsi...

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I512776fc92a88d210f3a08d5a4693969ffc1325a

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rockchip: rv1126: Keep GPIO0_D6 in default state when SFC is not used

At the beginning, this is set to de-assert the wp# pin(GPIO0_D6) for
spi flash. In fact, this is redundant for EMMC devices.

Ch

rockchip: rv1126: Keep GPIO0_D6 in default state when SFC is not used

At the beginning, this is set to de-assert the wp# pin(GPIO0_D6) for
spi flash. In fact, this is redundant for EMMC devices.

Change-Id: Ide1b79145340f6d57b604d6a5c1fb385928cbc3e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

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rockchip: rv1126: change priority of isp\ispp\cpu\vepu\sdmmc

In 4K+AI case, with old Qos Setting, it is easy to lose frame.
Consider NPU is not real time device, and it cost high DDR
bandwidth, we n

rockchip: rv1126: change priority of isp\ispp\cpu\vepu\sdmmc

In 4K+AI case, with old Qos Setting, it is easy to lose frame.
Consider NPU is not real time device, and it cost high DDR
bandwidth, we need to lower npu Qos priority and bump up isp
related device Qos priority. To get this goal, we do following
modify:
A7_PRIORITY_REG: 0101->0202
VEPU_RD0_PRIORITY_REG: 0101->0202
VEPU_RD1_PRIORITY_REG: 0101->0202
VEPU_WR_PRIORITY_REG: 0101->0202
ISPP_M0_PRIORITY_REG: 0101->0202
ISPP_M1_PRIORITY_REG: 0101->0202
ISP_PRIORITY_REG: 0101->0202
CIF_LITE_PRIORITY_REG: 0202->0303
CIF_PRIORITY_REG: 0202->0303
SDMMC_PRIORITY_REG: 0303->0202

and disable ISP dynamic priority:
ISP_PRIORITY_EX_REG: 1->0

Signed-off-by: jkand.huang <jkand.huang@rock-chips.com>
Change-Id: I8b68e76d972bd7e96d8c183efd2ed8d8fcc2d9bc

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rockchip: rv1126: fix typo

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ia2987d5edc63edd57fc79e3b025d3bf9242d71d4

rockchip: Add dm ramdisk compatibility support

Don't rely on CONFIG_DM_RAMDISK since it can be a default
configuration after disk/part_rkram.c was introduced.

Use dm_ramdisk_is_enabled() to confirm

rockchip: Add dm ramdisk compatibility support

Don't rely on CONFIG_DM_RAMDISK since it can be a default
configuration after disk/part_rkram.c was introduced.

Use dm_ramdisk_is_enabled() to confirm again.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I0488a6d2bddb706b89f195a8174eaf248b873c89

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rockchip: rv1126: Add Space indentation before '#'

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I8b7f549d308a1eb9a6a8f00bd4e7cdf4a1575b11

rockchip: rv1126: Pull GPIO0_D6 down for spiflash

Change-Id: Id0d6c9b78b45b839c49c7951f5bc6c80be5b8f52
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

rockchip: rv1126: init the i2c0 iomux

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I0d9854f3d22eaa42fb3a196cc58d429339532f1e

rockchip: rv1126: make #if...#else...#endif more clearly

Add Space indentation before '#'.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I7ded69adb328513b97f2ffb36329d8584cd5d2cd

rv1126: add iomux config for sd card boot

When the devices without firmware boot from the SD card,
the iomux of the storage interface is not configured,
so the firmware cannot be upgraded to the sto

rv1126: add iomux config for sd card boot

When the devices without firmware boot from the SD card,
the iomux of the storage interface is not configured,
so the firmware cannot be upgraded to the storage.
It needs to be configured by uboot.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: If3f4a0a37e37b2fc9e0f4d7e5869dbf156649505

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rockchip: rv1126: Fix ram boot fail

The OTP_S access is not allowed from the non-secure world.
so, remove it for ramboot which have already done in trust.

ram boot flow:

usb boot -> trust/op-tee -

rockchip: rv1126: Fix ram boot fail

The OTP_S access is not allowed from the non-secure world.
so, remove it for ramboot which have already done in trust.

ram boot flow:

usb boot -> trust/op-tee -> uboot -> kernel -> rootfs

normal boot flow:

spl boot -> trust/op-tee -> uboot -> kernel -> rootfs

Fixes: 1ac424cf0325 ("rockchip: rv1126: Increase otp tRWH timing for stable read")
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I76ef84cb79ca29837cae01120296523804a75ff8

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rockchip: rv1126: hold a few time for mcu to capture the boot address

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: If30b429577e715d2851eaab1c0fa6a84f0ad8850

rockchip: tpl: add arch_cpu_init()

The arch_cpu_init() should be called for cpu early init
for tpl.

Change-Id: I3aad0f284089d8523710a2d24daab44995fa148d
Signed-off-by: Zhihuan He <huan.he@rock-chip

rockchip: tpl: add arch_cpu_init()

The arch_cpu_init() should be called for cpu early init
for tpl.

Change-Id: I3aad0f284089d8523710a2d24daab44995fa148d
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

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rockchip: rv1126: Increase otp tRWH timing for stable read

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I42d57e6a9eaeb30e24b755821c7672ea9ffce56d

configs: rv1126: use make_fit_optee.sh as fit generator

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I31237cbcefcd62a0abbe7a549f46ad41f646ac55

rockchip: rv1126: fit: clean coding style

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ibfba9e70d3d5bcae8bd6850ab546edc736f56ba4

rockchip: rv1126: init QoS for ramboot

There is not SPL for ramboot, let's init QoS for it.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ib6221122c44702cb4f287bad721316751478be71

rockchip: rv1126: Set BOOT_WATCHDOG flag if reset by WDT

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ia3d437c33ae9a7d3f666df70c484e1e6b28a90e5

rockchip: rv1126: fix typo

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: If26223219d3f0e3d6ca37b6bc0c740411a87fe01

rockchip: rv1126: mux clocks to none-cpll

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Ida1561569814d6a139818820940012ce7b9f856b