rockchip: rk3568: Add rk3566pro support

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: I96c6ebf71c50f723779a7cb9b02f709be801d745

rockchip: rk3568: set SATA FBSCP and PORTS_IMPL for kernel drivers

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I2fd25b781047b3b6490beee785fa0b7228eee792

cmd: ddr_tool: let ddr_tool can test 4GB+ DRAM space

ddr_tool can test all DRAM space

Signed-off-by: CanYang He <hcy@rock-chips.com>
Change-Id: I87219fe6bb0ac5eddf6b9b6eafdaa787514f759a

rockchip: rk3568: support fit_standalone_release

support fit_standalone_release for riscv

Change-Id: I3352f307cea74b977df1ee1f0b3ec5dc9deea725
Signed-off-by: Hongming Zou <hongming.zou@rock-chips.c

rockchip: rk3568: support fit_standalone_release

support fit_standalone_release for riscv

Change-Id: I3352f307cea74b977df1ee1f0b3ec5dc9deea725
Signed-off-by: Hongming Zou <hongming.zou@rock-chips.com>

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rockchip: rk3568: Support CONFIG_ROCKCHIP_EMMC/SFC_IOMUX

Change-Id: Ib2f8d641a38da6a374da0d698f340a7f948dd8a8
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

Revert "rockchip: rk3568: disable eDP phy to save power"

This reverts commit 046cd380542c12e6b63524aee8d5613e86510c0b.

Change-Id: I3d49e2c08897c91be9b0c6001e8c7e2492adb394
Signed-off-by: Wyon bi <b

Revert "rockchip: rk3568: disable eDP phy to save power"

This reverts commit 046cd380542c12e6b63524aee8d5613e86510c0b.

Change-Id: I3d49e2c08897c91be9b0c6001e8c7e2492adb394
Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com>

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rockchip: rk3568: add support initialize DMC FSP

Add support initialize DMC frequency set point for rk3568,
and set CONFIG_ROCKCHIP_DMC_FSP=y in defconfig if need enable it.

Signed-off-by: YouMin C

rockchip: rk3568: add support initialize DMC FSP

Add support initialize DMC frequency set point for rk3568,
and set CONFIG_ROCKCHIP_DMC_FSP=y in defconfig if need enable it.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: Iad1d0c4a4543a1c2d4302d0a6852da35d32eb26d

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rockchip: rk3568: add CLK_SCMI build control

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iadeeef76cfd75d344b68fdaa832fe27da26ffaf7

rockchip: rk3568: update spl_fit_standalone_release() api

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ia19f3c5c4d81ef58cc8da544bf307c077284574e

rockchip: rk3568: add set_armclk_rate

Support ARM high frequency for fast boot.

Change-Id: If22946894c456853815af2c72996f63cfa350ec5
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

rockchip: rk3568: Modify fspi pins property

Set all data pins level 2

Change-Id: Ifbaca47c54a54c9003fb2206fb2ee12426efc671
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

arm: mach-rockchip: rk3568: remove phy ref clock confit to 24Mhz

The combo phy using default 25Mhz ref clock config and already support
De-assert reset, here need to remove the config code.

Signed-

arm: mach-rockchip: rk3568: remove phy ref clock confit to 24Mhz

The combo phy using default 25Mhz ref clock config and already support
De-assert reset, here need to remove the config code.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ief026dacf256f12b613ae90827b2991aa173c0af

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rockchip: support sata device boot

The loader stage does not support SATA, and the boot device
can only be other storage. Therefore, it is necessary to
initialize the SATA device before judging the

rockchip: support sata device boot

The loader stage does not support SATA, and the boot device
can only be other storage. Therefore, it is necessary to
initialize the SATA device before judging the initialization
of atag boot device.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I31a215d6e56480a4f42b04efb735ad101dea537c

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arm: mach-rockchip: fix fdt_stringlist_search for disabled status

Change-Id: Ie762b7cb96a67b5e660ebe290a91efc1d7cd417b
Signed-off-by: David Wu <david.wu@rock-chips.com>

arm: rockchip: rk3568: Add the compatible with gmac

Change-Id: I364519a77c38d4f7219646a4ea86c1dc75df8362
Signed-off-by: David Wu <david.wu@rock-chips.com>

rockchip: rk3568: use API rockchip_get_cpu_version()

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Idaf41f8c280535f6807cf1202acde26a3f17add5

rockchip: rk3568: support usbplug

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: If2c56d1db774f79689cfbe87bcae7cfcadacae82

rockchip: rk3568: add AArch32 build support

SPL and TPL is still in AArch64 mode.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I4768903d1dbdd06359eb196607b67fb128dea644

rockchip: rk3568: set usb2 phy0 and phy1 in suspend mode

This patch set the USB 2.0 PHY0 port0 and PHY1 port0 and
port1 in suspend mode to save power. And set the USB 2.0
PHY0 port0 for OTG interfac

rockchip: rk3568: set usb2 phy0 and phy1 in suspend mode

This patch set the USB 2.0 PHY0 port0 and PHY1 port0 and
port1 in suspend mode to save power. And set the USB 2.0
PHY0 port0 for OTG interface still in normal mode.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I684e3bf8ce7934402e745ea7cfe110b987f5d9db

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rockchip: rk3568: Enable FSPI secure

Change-Id: Id46debc74bfac7060244079582b06b35817b51cd
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

rockchip: rk3568: Map PCIe MMIO regions for CPU

Change-Id: Ieb5ce1ae68e26beba9b1e73548c5db630deb1487
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

rockchip: rk3568: assert reset the pipephys to save power

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Ie2df9df2a7312debf215276450476537f5c29bad

rockchip: rk356x: setting ebc priority to 0x3

Enable all power domain except npu and gpu.

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I3757b8770b6d5a2a96b9d0945bbe536b6d387741

rockchip: rk3568: fix uart iomux error.

Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Change-Id: Ib1683c8ef40127b4fb5b0feb18778b85da47fe03

Revert "rockchip: rk3568: remove TPL code"

This reverts commit d77dbb6e1cf17678b428f8b44763177c6b5fcc50.

Reason: if we remove TPL code, there will be different compile
path for SPL to initial platf

Revert "rockchip: rk3568: remove TPL code"

This reverts commit d77dbb6e1cf17678b428f8b44763177c6b5fcc50.

Reason: if we remove TPL code, there will be different compile
path for SPL to initial platform, which takes some unknonw issue
in kernel. So let's bring back TPL.

Change-Id: Iee1ab45d0a622425b616b22f8fbcdb7b28f057f7
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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