| 22d6ac49 | 12-Jul-2016 |
Ladislav Michl <ladis@linux-mips.org> |
armv7: armv7: introduce set_gpmc_cs0
Allow boards to runtime detect flash type.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org> |
| 0568dd06 | 12-Jul-2016 |
Ladislav Michl <ladis@linux-mips.org> |
armv7: make gpmc_cfg const
Signed-off-by: Ladislav Michl <ladis@linux-mips.org> [trini: Adapt am33xx, duovero, omap_zoom1] Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Tom Rini <trin
armv7: make gpmc_cfg const
Signed-off-by: Ladislav Michl <ladis@linux-mips.org> [trini: Adapt am33xx, duovero, omap_zoom1] Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
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| b1509e3a | 12-Jul-2016 |
Ladislav Michl <ladis@linux-mips.org> |
armv7: add reset timeout to identify_nand_chip
identify_nand_chip hangs forever in loop when NAND is not present. As IGEPv2 comes either with NAND or OneNAND flash, add reset timeout to let function
armv7: add reset timeout to identify_nand_chip
identify_nand_chip hangs forever in loop when NAND is not present. As IGEPv2 comes either with NAND or OneNAND flash, add reset timeout to let function fail gracefully allowing caller to know NAND is not present. On NAND equipped board, reset succeeds on first read, so 1000 loops seems to be safe timeout.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
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| 9f03247e | 22-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze |
| 23ffd36a | 14-Jul-2016 |
Michal Simek <michal.simek@xilinx.com> |
ARM64: zynqmp: Remove get_uart_clk()
ZynqMP will use reading clock freq directly from DT.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
| 9f84da8d | 21-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-tegra |
| 95d52733 | 21-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Revert "stm32: Change USART port to USART6 for stm32f746 discovery board"
Per Vikas' request, the problem this commit is supposed to be solving is something he doesn't see and further this introduce
Revert "stm32: Change USART port to USART6 for stm32f746 discovery board"
Per Vikas' request, the problem this commit is supposed to be solving is something he doesn't see and further this introduces additional hardware requirements.
This reverts commit 4b2fd720a7b2f78c42d1565edf4c67f378c65440.
Signed-off-by: Tom Rini <trini@konsulko.com>
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| 49626ea8 | 18-Jul-2016 |
Stephen Warren <swarren@nvidia.com> |
ARM: tegra: add IVC protocol implementation
IVC (Inter-VM Communication) protocol is a Tegra-specific IPC (Inter Processor Communication) framework. Within the context of U-Boot, it is typically use
ARM: tegra: add IVC protocol implementation
IVC (Inter-VM Communication) protocol is a Tegra-specific IPC (Inter Processor Communication) framework. Within the context of U-Boot, it is typically used for communication between the main CPU and various auxiliary processors. In particular, it will be used to communicate with the BPMP (Boot and Power Management Processor) on Tegra186 in order to manipulate clocks and reset signals.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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| 66669fcf | 19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c |
| 45684ae3 | 28-Jun-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
ARMv8/PSCI: Fixup the device tree for PSCI
Set the enable-method in the cpu node to PSCI, and create device node for PSCI, when PSCI was enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
ARMv8/PSCI: Fixup the device tree for PSCI
Set the enable-method in the cpu node to PSCI, and create device node for PSCI, when PSCI was enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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| f1dd4cad | 28-Jun-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
ARMv8/layerscape: Add FSL PPA support
The FSL Primary Protected Application (PPA) is a software component loaded during boot which runs in TrustZone and remains resident after boot.
Use the secure
ARMv8/layerscape: Add FSL PPA support
The FSL Primary Protected Application (PPA) is a software component loaded during boot which runs in TrustZone and remains resident after boot.
Use the secure firmware framework to integrate FSL PPA into U-Boot.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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| b45db3b5 | 28-Jun-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
ARMv8: add the secure monitor firmware framework
This framework is introduced for ARMv8 secure monitor mode firmware. The main functions of the framework are, on EL3, verify the firmware, load it to
ARMv8: add the secure monitor firmware framework
This framework is introduced for ARMv8 secure monitor mode firmware. The main functions of the framework are, on EL3, verify the firmware, load it to the secure memory and jump into it, and while it returned to U-Boot, do some necessary setups at the 'target exception level' that is determined by the respective secure firmware.
So far, the framework support only FIT format image, and need to define the name of which config node should be used in 'configurations' and the name of property for the raw secure firmware image in that config. The FIT image should be stored in Byte accessing memory, such as NOR Flash, or else it should be copied to main memory to use this framework.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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| 5ad5823d | 24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Convert to use common MMU framework
Drop platform code to create static MMU tables. Use common framework to create MMU tables on the run. Tested on LS2080ARDB with secure and non-
armv8: layerscape: Convert to use common MMU framework
Drop platform code to create static MMU tables. Use common framework to create MMU tables on the run. Tested on LS2080ARDB with secure and non-secure ram scenarios.
Signed-off-by: York Sun <york.sun@nxp.com>
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| 62a3b7dd | 15-Jul-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Various, unrelated tree-wide typo fixes.
Fix a number of typos, including:
* "compatble" -> "compatible" * "eanbeld" -> "enabled" * "envrionment" -> "environment" * "FTD" ->
Various, unrelated tree-wide typo fixes.
Fix a number of typos, including:
* "compatble" -> "compatible" * "eanbeld" -> "enabled" * "envrionment" -> "environment" * "FTD" -> "FDT" (for "flattened device tree") * "ommitted" -> "omitted" * "overriden" -> "overridden" * "partiton" -> "partition" * "propogate" -> "propagate" * "resourse" -> "resource" * "rest in piece" -> "rest in peace" * "suport" -> "support" * "varible" -> "variable"
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
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| cd4b0c5f | 24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping
Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping.
armv8: mmu: Add support of non-identical mapping
Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping.
Signed-off-by: York Sun <york.sun@nxp.com>
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| 252cdb46 | 24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: house cleaning
Make setup_pgtages() and get_tcr() available for platform code to customize MMU tables. Remove unintentional call of create_table().
Signed-off-by: York Sun <york.sun@nxp
armv8: mmu: house cleaning
Make setup_pgtages() and get_tcr() available for platform code to customize MMU tables. Remove unintentional call of create_table().
Signed-off-by: York Sun <york.sun@nxp.com>
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| 50e93b95 | 24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: Add tlb_allocated to arch global data
When secure ram is used, MMU tables have to be put into secure ram. To use common MMU code, gd->arch.tlb_addr will be used to host TLB entry pointer. To
armv8: Add tlb_allocated to arch global data
When secure ram is used, MMU tables have to be put into secure ram. To use common MMU code, gd->arch.tlb_addr will be used to host TLB entry pointer. To save allocated memory for later use, tlb_allocated variable is added to global data structure.
Signed-off-by: York Sun <york.sun@nxp.com>
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| e61a7534 | 24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: Move secure_ram variable out of generic global data
Secure_ram variable was put in generic global data. But only ARMv8 uses this variable. Move it to ARM specific data structure.
Signed-off-
armv8: Move secure_ram variable out of generic global data
Secure_ram variable was put in generic global data. But only ARMv8 uses this variable. Move it to ARM specific data structure.
Signed-off-by: York Sun <york.sun@nxp.com>
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| 1f9ef0dc | 15-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of http://git.denx.de/u-boot-sunxi |
| b7073965 | 19-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Make psci_get_cpu_stack_top local to armv7/psci.S
Now that we have a secure data section for storing variables, there should be no need for platform code to get the stack address.
Make p
ARM: PSCI: Make psci_get_cpu_stack_top local to armv7/psci.S
Now that we have a secure data section for storing variables, there should be no need for platform code to get the stack address.
Make psci_get_cpu_stack_top a local function, as it should only be used in armv7/psci.S and only by psci_stack_setup.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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| 45c334e6 | 05-Jul-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Add helper functions to access per-CPU target PC storage
Now that we have a data section, add helper functions to save and fetch per-CPU target PC.
Signed-off-by: Chen-Yu Tsai <wens@csie
ARM: PSCI: Add helper functions to access per-CPU target PC storage
Now that we have a data section, add helper functions to save and fetch per-CPU target PC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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| a5aa7ff3 | 05-Jul-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: Add secure section for initialized data
The secure monitor may need to store global or static values within the secure section of memory, such as target PC or CPU power status.
Signed-off-by:
ARM: Add secure section for initialized data
The secure monitor may need to store global or static values within the secure section of memory, such as target PC or CPU power status.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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| afc1f65f | 19-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: Move __secure definition to common asm/secure.h
sunxi and i.mx7 both define the __secure modifier to put functions in the secure section. Move this to a common place.
Signed-off-by: Chen-Yu Ts
ARM: Move __secure definition to common asm/secure.h
sunxi and i.mx7 both define the __secure modifier to put functions in the secure section. Move this to a common place.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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| 980d6a55 | 19-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: Add an empty secure stack section
Until now we've been using memory beyond psci_text_end as stack space for the secure monitor or PSCI implementation, even if space was not allocated for it.
T
ARM: Add an empty secure stack section
Until now we've been using memory beyond psci_text_end as stack space for the secure monitor or PSCI implementation, even if space was not allocated for it.
This was partially fixed in ("ARM: allocate extra space for PSCI stack in secure section during link phase"). However, calculating stack space from psci_text_end in one place, while allocating the space in another is error prone.
This patch adds a separate empty secure stack section, with space for CONFIG_ARMV7_PSCI_NR_CPUS stacks, each 1 KB. There's also __secure_stack_start and __secure_stack_end symbols. The linker script handles calculating the correct VMAs for the stack section. For platforms that relocate/copy the secure monitor before using it, the space is not allocated in the executable, saving space.
For platforms that do not define CONFIG_ARMV7_PSCI_NR_CPUS, a whole page of stack space for 4 CPUs is allocated, matching the previous behavior.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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| ef36d9ae | 09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source
Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to
sunxi: Use BROM stored boot_media value to determine our boot-source
Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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