UPSTREAM: armv8: mmu: add space around operator

Add space around operator "+", make it
match the coding style.

Change-Id: I5cb1e3cea056db89d7ac0c16c233228d39bf6675
Signed-off-by: Andy Yan <andy.yan

UPSTREAM: armv8: mmu: add space around operator

Add space around operator "+", make it
match the coding style.

Change-Id: I5cb1e3cea056db89d7ac0c16c233228d39bf6675
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 347e30e1720ea6c0231f81d278b076a39280a314)

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UPSTREAM: armv8: mmu: remove unused macro definition

Macro VA_BITS and PTE_BLOCK_BITS are not used
in the code, so remove them.

Change-Id: I5a6b900c8d1d145f28d1604c9b614226c20159d5
Signed-off-by: A

UPSTREAM: armv8: mmu: remove unused macro definition

Macro VA_BITS and PTE_BLOCK_BITS are not used
in the code, so remove them.

Change-Id: I5a6b900c8d1d145f28d1604c9b614226c20159d5
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 4f84cb980fdc25d7735fe114021b4a84ea601b9f)

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rockchip: sdram-common: add api to pass dram info to trust os

Trust OS decode this info like this:
https://github.com/ARM-software/arm-trusted-firmware/blob/master/plat/rockchip/common/drivers/param

rockchip: sdram-common: add api to pass dram info to trust os

Trust OS decode this info like this:
https://github.com/ARM-software/arm-trusted-firmware/blob/master/plat/rockchip/common/drivers/parameter/ddr_parameter.c#L19
We have to set a available value, or else we get error info from
Trust OS like this:
"ERROR: over or zero region, nr=3145987, max=10"

Change-Id: I8adbf0332e8b981cda089177e4c62a9f7d326581
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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rockchip: add CRC32 image verify driver

This CRC32 driver is from: remotes/origin/rkdevelop.
RK format images is packed by mkknlimg tool, it adds the
CRC32 checksum which is not standard into image

rockchip: add CRC32 image verify driver

This CRC32 driver is from: remotes/origin/rkdevelop.
RK format images is packed by mkknlimg tool, it adds the
CRC32 checksum which is not standard into image header,
so this CRC32 function is only used for rockchip platforms.

Change-Id: Ia52c6efa9dede148b1cb448691380f2d3184cd5e
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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rockchip: remove blk and parameter

We use blk_desc instead of interface from BLOCK_API, and move parameter
into disk/ as a standard partition format.

Change-Id: I6923ef1c23fa6ba1d614dfca079599e87c1

rockchip: remove blk and parameter

We use blk_desc instead of interface from BLOCK_API, and move parameter
into disk/ as a standard partition format.

Change-Id: I6923ef1c23fa6ba1d614dfca079599e87c123ccc
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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rockchip: resource: support gpt via block api

- support both gpt and rkparameter
- using blk_desc for read/write instead of rkblk api
- add a rockchip_get_resource_file() API for those image alread

rockchip: resource: support gpt via block api

- support both gpt and rkparameter
- using blk_desc for read/write instead of rkblk api
- add a rockchip_get_resource_file() API for those image alread in RAM;
- try to get resource from AOSP boot.img/recovery.img first instead of
RESOURCE partition.

Change-Id: If7eb53723821b48e26a392bb18a3114faf35748a
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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rockchip: add rockchip smccc support

It supports rockchip platforms individual conversation
between U-Boot and ATF via ARM SMCCC.

Change-Id: I75077219f409e075bd3d0b312b2d85c205d6a96f
Signed-off-by:

rockchip: add rockchip smccc support

It supports rockchip platforms individual conversation
between U-Boot and ATF via ARM SMCCC.

Change-Id: I75077219f409e075bd3d0b312b2d85c205d6a96f
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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rockchip: rk322x: speed up the emmc and the cpu.

increase the cpu frequence to 816M, and enable mmc ddr mode
for emmc.

Change-Id: I93d6b3c625c73d5e75accfb26559930dd299e0e9
Signed-off-by: Wenping Zh

rockchip: rk322x: speed up the emmc and the cpu.

increase the cpu frequence to 816M, and enable mmc ddr mode
for emmc.

Change-Id: I93d6b3c625c73d5e75accfb26559930dd299e0e9
Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>

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rockchip: add rockchip_get_boot_mode function

Change-Id: Ie1cc9353f05456ad3965260cb0f72bfb2d8a775b
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

rockchip: update boot0 hook

armv7 SPL: TAG(overwrite 'b 1f')+'b reset' + ARM_VECTORS
armv7 U-Boot: ARM_VECTORS
armv8 SPL: TAG(overwrite 'b 1f')+'b reset' + Reserved_iram(rk3399)
armv8 U-Boot: 'b res

rockchip: update boot0 hook

armv7 SPL: TAG(overwrite 'b 1f')+'b reset' + ARM_VECTORS
armv7 U-Boot: ARM_VECTORS
armv8 SPL: TAG(overwrite 'b 1f')+'b reset' + Reserved_iram(rk3399)
armv8 U-Boot: 'b reset'

Change-Id: I0ebb3e57d138c02e8781e50dbe775925cd0d71e0
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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arm: armv7: introduce cpu suspend and resume support

Just like linux, it supports cpu save and restore context
during enter and exit low power mode. With this patch, cpu
is able to suspend with core

arm: armv7: introduce cpu suspend and resume support

Just like linux, it supports cpu save and restore context
during enter and exit low power mode. With this patch, cpu
is able to suspend with core power off.

Workflow for trap into ATF for system suspend:
cpu_suspend
-> cpu_do_suspend
-> arch specific fn: int (*fn)(unsigned long)
-> psci_system_suspend(deliver 'cpu_resume()' address to ATF)
-> ATF system suspend
<- ATF system resume
<- cpu_resume
<- cpu_do_resume
next instruction

Notice: If needed, you should remember to save and restore GIC by yourself.

Change-Id: I5cb6fb6ac5b6a7f4ec4a975b0fc38250b000b28e
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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FROMLIST: rockchip: add support for enter to bootrom download mode

Rockchip bootrom will enter download mode if it returns from
spl/tpl with a non-zero value and couldn't find a valid image
in the b

FROMLIST: rockchip: add support for enter to bootrom download mode

Rockchip bootrom will enter download mode if it returns from
spl/tpl with a non-zero value and couldn't find a valid image
in the backup partition.
This patch provide a method to instruct the system to back to
bootrom download mode by checking the BROM_DOWNLOAD_FLAG register.
As the bootrom download function relys on some modules such as
interrupts, so we need to back to bootrom as early as possbile
before the tpl/spl code override the interrupt configurations.

Change-Id: Ib07315127573f1cc38e158f69679ba4e27857cf2
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

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FROMLIST: rockchip: make boot_mode related codes reused across all platforms

setup_boot_mode function use the same logic but different
mode register address across all the rockchip platforms,
so it'

FROMLIST: rockchip: make boot_mode related codes reused across all platforms

setup_boot_mode function use the same logic but different
mode register address across all the rockchip platforms,
so it's better to make this function reused across all the
platforms, and let the mode register address setting from
the config file.

Also add support for rk312x soc which is a little
special: the bootrom download flag is stored in
a grf register but the other boot mode flags are
stored in anohter pmugrf register.

Change-Id: I2e6a0ba870626adb837975c08094250d47767dac
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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UPSTREAM: rockchip: back-to-bootrom: allow passing a cmd to the bootrom

The BROM supports forcing it to enter download-mode, if an appropriate
result/cmd-word is returned to it. There already is a

UPSTREAM: rockchip: back-to-bootrom: allow passing a cmd to the bootrom

The BROM supports forcing it to enter download-mode, if an appropriate
result/cmd-word is returned to it. There already is a series to
support this in review, so this prepares the (newly C-version) of the
back-to-bootrom code to accept a cmd to passed on to the BROM.

All the existing call-sites are adjusted to match the changed function
signature.

Also sync the support to rk3036 / rk3228

Change-Id: I1ea9bc12d6d84a75c043754b0eba7b8959e81d69
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

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UPSTREAM: rockchip: back-to-bootrom: replace assembly-implementation with C-code

The back-to-bootrom implementation for Rockchip has always relied on
the stack-pointer being valid on entry, so there

UPSTREAM: rockchip: back-to-bootrom: replace assembly-implementation with C-code

The back-to-bootrom implementation for Rockchip has always relied on
the stack-pointer being valid on entry, so there was little reason to
have this as an assembly implementation.

This provides a new C-only implementation of save_boot_params and
back_to_bootrom (relying on setjmp/longjmp) and removes the older
assembly-only implementation.

Change-Id: Ic20320dbbb71744386107686120475943442cdd7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

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UPSTREAM: arm: provide a PCS-compliant setjmp implementation

The previous setjmp-implementation (as a static inline function that
contained an 'asm volatile' sequence) was extremely fragile: (some
v

UPSTREAM: arm: provide a PCS-compliant setjmp implementation

The previous setjmp-implementation (as a static inline function that
contained an 'asm volatile' sequence) was extremely fragile: (some
versions of) GCC optimised the set of registers. One critical example
was the removal of 'r9' from the clobber list, if -ffixed-reg9 was
supplied.

To increase robustness and ensure PCS-compliant behaviour, the setjmp
and longjmp implementation are now in assembly and closely match what
one would expect to find in a libc implementation.

Change-Id: I9403d28218f03cdf84b1e8cbd4d3d4eef790e9b9
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

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UPSTREAM: arm: make save_boot_params_ret prototype visible for AArch64

The save_boot_params_ret() prototype (for those of us, that have a
valid SP on entry and can implement save_boot_params() in C)

UPSTREAM: arm: make save_boot_params_ret prototype visible for AArch64

The save_boot_params_ret() prototype (for those of us, that have a
valid SP on entry and can implement save_boot_params() in C), was
previously only defined for !defined(CONFIG_ARM64).

This moves the declaration to a common block to ensure the prototype
is available to everyone that might need it.

Change-Id: Ic4c217ba9a3e6ded2106c75fec315351c925d639
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

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UPSTREAM: rockchip: boot0 hook: support early return for RK3188/RK3066-style BROM

Some Rockchip BROM versions (e.g. the RK3188 and RK3066) first read 1KB data
from NAND into SRAM and executes it. Th

UPSTREAM: rockchip: boot0 hook: support early return for RK3188/RK3066-style BROM

Some Rockchip BROM versions (e.g. the RK3188 and RK3066) first read 1KB data
from NAND into SRAM and executes it. Then, following a return to bootrom, the
BROM loads additional code to SRAM (not overwriting the first block read) and
reenters at the same address as the first time.

To support booting either a TPL (on the RK3066) or SPL (on the RK3188) using
this model of having to count entries, this commit adds code to the boot0
hook to track the number of entries and handle them accordingly.

Change-Id: Ib7c0e9fc517ff7c040ba948ea4a570538d623760
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

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UPSTREAM: bcm281xx: boot0 hook: adjust to unified boot0 semantics

This updates the BCM281xx boot0-hook to the updated boot0 semantics
by emitting _start and the vector table before the boot0 hook (a

UPSTREAM: bcm281xx: boot0 hook: adjust to unified boot0 semantics

This updates the BCM281xx boot0-hook to the updated boot0 semantics
by emitting _start and the vector table before the boot0 hook (as
was the case before).

Change-Id: Ia176a1b26c2275500855e699010ed73443c7b251
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

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UPSTREAM: bcm235xx: boot0 hook: adjust to unified boot0 semantics

This updates the BCM235xx boot0-hook to the updated boot0 semantics
by emitting _start and the vector table before the boot0 hook (a

UPSTREAM: bcm235xx: boot0 hook: adjust to unified boot0 semantics

This updates the BCM235xx boot0-hook to the updated boot0 semantics
by emitting _start and the vector table before the boot0 hook (as
was the case before).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Version-changes: 5
- ran 'whitespace-cleanup'

Change-Id: I415c48016ce1aa5592a180f16f6f4d83227e9d38
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

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FROMLIST: rockchip: boot0: align to 0x20 for armv7 '_start'

The '_start' is using as vector table base address, and will write
to VBAR register, so it needs to be aligned to 0x20 for armv7.

Signed-

FROMLIST: rockchip: boot0: align to 0x20 for armv7 '_start'

The '_start' is using as vector table base address, and will write
to VBAR register, so it needs to be aligned to 0x20 for armv7.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[Updated to current code base:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Change-Id: If3c151e7071f8d9556827bb05cfd38892b1c17f3
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

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FROMLIST: arm: boot0 hook: move boot0 hook before '_start'

The boot0 hook on ARM does not insert its payload before the vector
table. This is both a mismatch with thec comment above it and
contradic

FROMLIST: arm: boot0 hook: move boot0 hook before '_start'

The boot0 hook on ARM does not insert its payload before the vector
table. This is both a mismatch with thec comment above it and
contradict usage of the boot0 hook on ARM64.

To fix this (and unify the semantics for ARM and ARM64), we change the
boot0-hook semantics on ARM to match those on ARM64:
(1) if a boot0-hook is present it is inserted at the start of
the image
(2) if a boot0-hook is present, emitting the ARM vector table
(and the _start) symbol are suppressed in vectors.S and
the boot0-hook has full control over where and when it
wants to emit these

Change-Id: Ibd3b7c18a6a32f90372d315659f68511d92ca648
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

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rockchip: rk3066: add clock driver for rk3066 soc

Add clock driver for rk3066 platform.

Change-Id: I15527fb77c3b9a46a25df2ff51f4a78cf3808ea0
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>

rockchip: rk3066: add clock driver for rk3066 soc

Add clock driver for rk3066 platform.

Change-Id: I15527fb77c3b9a46a25df2ff51f4a78cf3808ea0
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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rockchip: rk3066: add rk3066 pinctrl driver

Add driver supporting pin multiplexing on rk3066 platform.

Change-Id: Ibb8edea574939e646f1e3a09165d3ecfa1a283b6
Signed-off-by: Paweł Jarosz <paweljarosz3

rockchip: rk3066: add rk3066 pinctrl driver

Add driver supporting pin multiplexing on rk3066 platform.

Change-Id: Ibb8edea574939e646f1e3a09165d3ecfa1a283b6
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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rockchip: rk3066: add grf header file

grf is needed by various drivers for rk3066 soc.

Change-Id: Id605feb6491eab73c2db9a0acba6e096e519e4ba
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
A

rockchip: rk3066: add grf header file

grf is needed by various drivers for rk3066 soc.

Change-Id: Id605feb6491eab73c2db9a0acba6e096e519e4ba
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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