| ce7a7f5e | 25-Sep-2013 |
Eric Nelson <eric.nelson@boundarydevices.com> |
i.MX6DQ/DLS: Add pad MX6_PAD_GPIO_1__USB_OTG_ID
This patch adds the pad to i.MX6DQ and changes the i.MX6DLS
declaration to match the Linux kernel declaration.
Signed-off-by: Eric Nelson <eric.nelso
i.MX6DQ/DLS: Add pad MX6_PAD_GPIO_1__USB_OTG_ID
This patch adds the pad to i.MX6DQ and changes the i.MX6DLS
declaration to match the Linux kernel declaration.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
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| 3668ce3c | 11-Sep-2013 |
Bo Shen <voice.shen@atmel.com> |
ARM: atmel: add RNDIS gadget support
Add RNDIS gadget support to test atmel usba udc driver
Signed-off-by: Bo Shen <voice.shen@atmel.com> |
| ee7e9a3e | 11-Sep-2013 |
Bo Shen <voice.shen@atmel.com> |
ARM: atmel: correct UDPHS name
Correct the UDPHS name from UDHPS
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Marek Vasut <marex@denx.de> |
| 9e40493f | 11-Sep-2013 |
Bo Shen <voice.shen@atmel.com> |
USB: gadget: add atmel usba udc driver
Add atmel usba udc driver support, porting from Linux kernel
The original code in Linux Kernel information is as following
commit e01ee9f509a927158f670408b41
USB: gadget: add atmel usba udc driver
Add atmel usba udc driver support, porting from Linux kernel
The original code in Linux Kernel information is as following
commit e01ee9f509a927158f670408b41127d4166db1c7
Author: Jingoo Han <jg1.han@samsung.com>
Date: Tue Jul 30 17:00:51 2013 +0900
usb: gadget: use dev_get_platdata()
Use the wrapper function for retrieving the platform data instead of
accessing dev->platform_data directly.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
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| 5fb5b155 | 11-Sep-2013 |
Dani Krishna Mohan <krishna.md@samsung.com> |
Sound: I2S: Replacing I2S1 with I2S0 channel.
This patch makes required changes to make use
of I2S0 channel instead of I2S1 channel on exynos5250.
Signed-off-by: Dani Krishna Mohan <krishna.md@sams
Sound: I2S: Replacing I2S1 with I2S0 channel.
This patch makes required changes to make use
of I2S0 channel instead of I2S1 channel on exynos5250.
Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
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| 3dd22a37 | 11-Sep-2013 |
Dani Krishna Mohan <krishna.md@samsung.com> |
ARM: Added I2S0 clocks for audio
This patch makes the necessary changes for making use of
I2S0 channel instead of I2S1 channel on smdk board. This
changes are done to maintain the uniformity to use
ARM: Added I2S0 clocks for audio
This patch makes the necessary changes for making use of
I2S0 channel instead of I2S1 channel on smdk board. This
changes are done to maintain the uniformity to use I2S0 channel.
Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
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| fe1378a9 | 21-Sep-2013 |
Jeroen Hofstee <jeroen@myspectrum.nl> |
ARM: use r9 for gd
To be more EABI compliant and as a preparation for building
with clang, use the platform-specific r9 register for gd
instead of r8.
note: The FIQ is not updated since it is not u
ARM: use r9 for gd
To be more EABI compliant and as a preparation for building
with clang, use the platform-specific r9 register for gd
instead of r8.
note: The FIQ is not updated since it is not used in u-boot,
and under discussion for the time being.
The following checkpatch warning is ignored:
WARNING: Use of volatile is usually wrong: see
Documentation/volatile-considered-harmful.txt
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
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| e22cc0cf | 23-Aug-2013 |
Lokesh Vutla <lokeshvutla@ti.com> |
ARM: OMAP5: Avoid writing into LDO SRAM bits
Writing magic bits into LDO SRAM was suggested only for OMAP5432
ES1.0. Now these are no longer applicable. Moreover these bits should
not be overwritten
ARM: OMAP5: Avoid writing into LDO SRAM bits
Writing magic bits into LDO SRAM was suggested only for OMAP5432
ES1.0. Now these are no longer applicable. Moreover these bits should
not be overwritten as they are loaded from EFUSE. So avoid
writing into these registers.
Boot tested on OMAP5432 ES2.0
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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| 52f7d844 | 14-Aug-2013 |
Steve Kipisz <s-kipisz2@ti.com> |
am335x:Handle worst case scenario for Errata 1.0.24
In Errata 1.0.24, if the board is running at OPP50 and has a warm reset,
the boot ROM sets the frequencies for OPP100. This patch attempts to
drop
am335x:Handle worst case scenario for Errata 1.0.24
In Errata 1.0.24, if the board is running at OPP50 and has a warm reset,
the boot ROM sets the frequencies for OPP100. This patch attempts to
drop the frequencies back to OPP50 as soon as possible in the SPL. Then
later the voltages and frequencies up set higher.
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
[trini: Adapt to current framework]
Signed-off-by: Tom Rini <trini@ti.com>
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| 9721027a | 30-Aug-2013 |
Tom Rini <trini@ti.com> |
am335x_evm: am33xx_spl_board_init function and scale core frequency
Add a am33xx_spl_board_init (and enable the PMICs) that we may see,
depending on the board we are running on. In all cases, we se
am335x_evm: am33xx_spl_board_init function and scale core frequency
Add a am33xx_spl_board_init (and enable the PMICs) that we may see,
depending on the board we are running on. In all cases, we see if we
can rely on the efuse_sma register to tell us the maximum speed. In the
case of Beaglebone White, we need to make sure we are on AC power, and
are on later than rev A1, and then we can ramp up to the PG1.0 maximum
of 720Mhz. In the case of Beaglebone Black, we are either on PG2.0 that
supports 1GHz or PG2.1. As PG2.0 may or may not have efuse_sma set, we
cannot rely on this probe. In the case of the GP EVM, EVM SK and IDK we
need to rely on the efuse_sma if we are on PG2.1, and the defaults for
PG1.0/2.0.
Signed-off-by: Tom Rini <trini@ti.com>
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| e654ddf7 | 13-Sep-2013 |
Eric Nelson <eric.nelson@boundarydevices.com> |
i.MX6DL/S: add drive-strength back to pads DISP0_DAT2/DAT10
This patch fixes a regression introduced by commit 87d720e0.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Otavi
i.MX6DL/S: add drive-strength back to pads DISP0_DAT2/DAT10
This patch fixes a regression introduced by commit 87d720e0.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
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| 31f07964 | 13-Sep-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
mx6slevk: Add Ethernet support
mx6slevk has a SMSC8720 connected in RMII mode.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
| b4c927b3 | 11-Sep-2013 |
Markus Niebel <Markus.Niebel@tqs.de> |
ARM: arch-mx6: fix PLL2_PFD2_FREQ
according to the manual frequency of PLL2 PFD2 is 396.000.000
instead of 400.000.000
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Acked-by: Stefano Babic <s
ARM: arch-mx6: fix PLL2_PFD2_FREQ
according to the manual frequency of PLL2 PFD2 is 396.000.000
instead of 400.000.000
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Acked-by: Stefano Babic <sbabic@denx.de>
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| 5287946c | 30-Aug-2013 |
Tom Rini <trini@ti.com> |
am33xx: Add the efuse_sma CONTROL_MODULE register
Starting with PG2.1 we have a register in the CONTROL_MODULE that is set
with the package type and maximum supported frequency. Add this, and
the r
am33xx: Add the efuse_sma CONTROL_MODULE register
Starting with PG2.1 we have a register in the CONTROL_MODULE that is set
with the package type and maximum supported frequency. Add this, and
the relevant mask/values.
Signed-off-by: Tom Rini <trini@ti.com>
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| 6a0d803c | 30-Aug-2013 |
Tom Rini <trini@ti.com> |
am33xx: Add am33xx_spl_board_init function, call
We need to allow for a further call-out in spl_board_init. Call this
am33xx_spl_board_init and add a __weak version. This function may be
used to s
am33xx: Add am33xx_spl_board_init function, call
We need to allow for a further call-out in spl_board_init. Call this
am33xx_spl_board_init and add a __weak version. This function may be
used to scale the MPU frequency up, depending on board needs.
Signed-off-by: Tom Rini <trini@ti.com>
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| 9346d543 | 17-Sep-2013 |
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> |
arm: omap5: echi: Add GPL-2.0+ SPDX-License-Identifier
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> |
| aeef2b09 | 19-Aug-2013 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
ARM: s3c44b0: remove remainders of dead board
Because commit 5dc5f36 removed B2 board support,
arch/arm/cpu/s3c44b0/* and arch/arm/include/asm/arch-s3c44b0/*
are not necessary anymore.
Signed-off-b
ARM: s3c44b0: remove remainders of dead board
Because commit 5dc5f36 removed B2 board support,
arch/arm/cpu/s3c44b0/* and arch/arm/include/asm/arch-s3c44b0/*
are not necessary anymore.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Andrea Scian <andrea.scian@dave-tech.it>
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| 771f74c3 | 29-Jul-2013 |
Kuo-Jung Su <dantesu@faraday-tech.com> |
arm: dma_alloc_coherent: malloc() -> memalign()
Even though the MMU/D-cache is off, some DMA engines still
expect strict address alignment.
For example, the incoming Faraday FTMAC110 & FTGMAC100 et
arm: dma_alloc_coherent: malloc() -> memalign()
Even though the MMU/D-cache is off, some DMA engines still
expect strict address alignment.
For example, the incoming Faraday FTMAC110 & FTGMAC100 ethernet
controllers expect the tx/rx descriptors should always be aligned
to 16-bytes boundary.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Albert ARIBAUD <albert.u.boot@aribaud.net>
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| c4a7ece0 | 13-Sep-2013 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
MAINTAINERS
boards.cfg
Signed-off-by: Stefano Babic <sbabic@denx.de> |
| 5480ac32 | 11-Sep-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Conflicts:
tools/Makefile |
| 73249070 | 03-Sep-2013 |
Przemyslaw Marczak <p.marczak@samsung.com> |
arm:mmc:goni/exynos: Fix wrong mmc base register devices offset.
On s5pc1xx mmc devices offset is multiply of 0x100000,
wrong value was 0x10000. Register offset always points
to mmc 0 before this ch
arm:mmc:goni/exynos: Fix wrong mmc base register devices offset.
On s5pc1xx mmc devices offset is multiply of 0x100000,
wrong value was 0x10000. Register offset always points
to mmc 0 before this change.
Add macro definition of mmc dev register offset to s5pc1xx and
exynos mmc.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung at samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| e24278af | 06-Sep-2013 |
trem <tremyfr@yahoo.fr> |
mx27: add missing constant for mx27
Add some missing constant (chip select, ...)
Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Signed-off-by: Eric Jarrige <eric.jarrige@armadeus.org>
Acked-by:
mx27: add missing constant for mx27
Add some missing constant (chip select, ...)
Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Signed-off-by: Eric Jarrige <eric.jarrige@armadeus.org>
Acked-by: Stefano Babic <sbabic@denx.de>
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| 7b8657e2 | 31-Aug-2013 |
Marek Vasut <marex@denx.de> |
ARM: mxs: Receive r0 and r1 passed from BootROM
Make sure value in register r0 and r1 is preserved and passed to
the board_init_ll() and mxs_common_spl_init() where it can be
processed further. The
ARM: mxs: Receive r0 and r1 passed from BootROM
Make sure value in register r0 and r1 is preserved and passed to
the board_init_ll() and mxs_common_spl_init() where it can be
processed further. The value in r0 can be configured during the
BootStream generation to arbitary value, r1 contains pointer to
return value from CALL'd function.
This patch also clears the value in r0 before returning to BootROM
to make sure the BootROM is not confused by this value.
Finally, this patch cleans up some comments in the start.S file.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
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| 68e1747f | 07-Aug-2013 |
Chin Liang See <clsee@altera.com> |
socfpga: Creating driver for Reset Manager
Consolidating reset code into reset_manager.c. Also
separating reset configuration for virtual target and
real hardware Cyclone V development kit
Signed-o
socfpga: Creating driver for Reset Manager
Consolidating reset code into reset_manager.c. Also
separating reset configuration for virtual target and
real hardware Cyclone V development kit
Signed-off-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
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| 19d829fa | 05-Sep-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Conflicts:
drivers/serial/serial.c
The conflict above was a trivial case of adding one init
function in each branch, and manually resolved
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Conflicts:
drivers/serial/serial.c
The conflict above was a trivial case of adding one init
function in each branch, and manually resolved in merge.
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