| 0a04fb50 | 09-Dec-2020 |
Elaine Zhang <zhangqing@rock-chips.com> |
clk: rockchip: rk3568: support rkvdec clk setting
Change-Id: Ic63b3c8ecbefcdf551d646ebb40521e6b521610b Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> |
| f6d27794 | 01-Dec-2020 |
zhangqing <zhangqing@rock-chips.com> |
clk: rockchip: rk3568: support more clk setting
support cpll_xxx settings.
Change-Id: I2735f6abe0fb02828b7ace76b58a60757199cab8 Signed-off-by: zhangqing <zhangqing@rock-chips.com> |
| ffc35703 | 25-Nov-2020 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
spl: support boot from rknand device
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Change-Id: I168ec42ec1ac4bc1e8b640fba22357cde4a26aac |
| fdd74c32 | 12-Nov-2020 |
Elaine Zhang <zhangqing@rock-chips.com> |
clk: rockchip: rk3568: support ebc clk setting/getting rate
Change-Id: Iecac8e56b2b5615b54c8969767053b6282fe6fb8 Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> |
| b85730d9 | 16-Nov-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Fix mask bits for gmac src clks
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Change-Id: I7f81a3e7586dcb85511502d3a329ac1cba7ccc8a |
| 8ec8d58e | 09-Nov-2020 |
Zhihuan He <huan.he@rock-chips.com> |
drivers: ram: rockchip: add rk3308 sdram driver
Change-Id: I96160af2095ba21b440c6d3789349d8cbc4fea75 Signed-off-by: Zhihuan He <huan.he@rock-chips.com> |
| b86c816c | 09-Nov-2020 |
Zhihuan He <huan.he@rock-chips.com> |
drivers: ram: rockchip: rv1108: clean up the code
Change-Id: I3446805fd9c320ddd49b9cb12df82943057ed9ee Signed-off-by: Zhihuan He <huan.he@rock-chips.com> |
| 7e26af38 | 22-Oct-2020 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: add rk3568 SoC support
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I2e163b93d4ec5a60f1ff9c589626d3ccd994f854 |
| 417bebc4 | 14-Sep-2020 |
Elaine Zhang <zhangqing@rock-chips.com> |
clk: rockchip: rk3568: Add clock driver
Add basic clock for rk3568 which including cpu, bus, mmc, i2c, pwm, gmac ...clocks init.
Change-Id: I4119f10897d06befa4a39198b3724dc515d416e3 Signed-off-by:
clk: rockchip: rk3568: Add clock driver
Add basic clock for rk3568 which including cpu, bus, mmc, i2c, pwm, gmac ...clocks init.
Change-Id: I4119f10897d06befa4a39198b3724dc515d416e3 Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
show more ...
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| a964d8e5 | 29-Sep-2020 |
Ziyuan Xu <xzy.xu@rock-chips.com> |
clk: rockchip: rv1126: mux partial clocks to GPLL for tb
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Change-Id: I33d2396d0de5bb5fc81990a1ae10e4c80f45e5cd |
| 446ef41c | 21-Aug-2020 |
Joseph Chen <chenjh@rock-chips.com> |
clk: rockchip: rv1126: always support decompress clock get/set
The SPL without thunder-boot or U-Boot needs it.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: Ie2d8b59e35fbc2056cfbc9
clk: rockchip: rv1126: always support decompress clock get/set
The SPL without thunder-boot or U-Boot needs it.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: Ie2d8b59e35fbc2056cfbc910dae94419afcbfc09
show more ...
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| 403d8d4c | 09-Jun-2020 |
Elaine Zhang <zhangqing@rock-chips.com> |
clk: rockchip: rk322x: add support to set and get spi clock
Change-Id: I361aa06aa795d2c041d2bdad9ee5ff6982d554fc Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> |
| 7f619f26 | 09-Jun-2020 |
Elaine Zhang <zhangqing@rock-chips.com> |
clk: rockchip: rk3128: add support to set and get spi clock
Change-Id: I4ac874ba0542474baf18491f986f401c831a5ad4 Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> |
| df77e7a3 | 09-Jun-2020 |
Elaine Zhang <zhangqing@rock-chips.com> |
clk: rockchip: rk3036: add support to set and get spi clock
Change-Id: I24db5f250fa89845b62005950d520600434adb99 Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> |
| db5be31c | 09-Jun-2020 |
Elaine Zhang <zhangqing@rock-chips.com> |
clk: rockchip: rv1108: add support to set and get spi clock
Change-Id: I96891a4adb53bbb84e27cc0ac5eddf3c613c1baa Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> |
| 70fee8b3 | 23-Jul-2020 |
Tang Yun ping <typ@rock-chips.com> |
rv1126: ddr: update drv odt table
Change-Id: Ic20957d02c36fe2d167c1a63b5e016535a181baf Signed-off-by: Tang Yun ping <typ@rock-chips.com> |
| f520bb22 | 22-May-2020 |
YouMin Chen <cym@rock-chips.com> |
drivers: ram: rockchip: add rv1126 sdram init code
Change-Id: I0c7ce7f274c396d077a4ae2fe29e382a8e295274 Signed-off-by: YouMin Chen <cym@rock-chips.com> |
| 78efceb6 | 25-May-2020 |
YouMin Chen <cym@rock-chips.com> |
rockchip: ram: add dram_spec_timing.h
Change-Id: I4691d46584b78ed47390ea39a90e449e4c9d0bed Signed-off-by: YouMin Chen <cym@rock-chips.com> |
| 9b31f80a | 22-May-2020 |
YouMin Chen <cym@rock-chips.com> |
driver: ram: rockchip: add sdram_head_info_v2
Change-Id: I5715dbfb296fbc684cbd0f22270d3d3bc922bab1 Signed-off-by: YouMin Chen <cym@rock-chips.com> |
| 9442a4b3 | 22-May-2020 |
YouMin Chen <cym@rock-chips.com> |
driver: ram: rockchip: update the driver of sdram_pctl_px30
Change-Id: I586065b41a22bbee266fa234e6513ef1dac5b37b Signed-off-by: YouMin Chen <cym@rock-chips.com> |
| 0e032871 | 22-May-2020 |
YouMin Chen <cym@rock-chips.com> |
rockchip: rv1126: add the struct of rv1126_pmugrf
Change-Id: Idb6610023e52e3aa640b665f5a08ff142a660c6c Signed-off-by: YouMin Chen <cym@rock-chips.com> |
| 747423ed | 02-Jun-2020 |
Jason Zhu <jason.zhu@rock-chips.com> |
rockchip: spl: bring up to kernel when CONFIG_ROCKCHIP_BOOT_MODE_REG is 0
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com> Change-Id: I3f576fa0527a42ebede6ec252586cf681974fa97 |
| d0999afb | 23-Apr-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rk3308: add support to set and get sfc clock
Change-Id: I322471da6e50b0bad328dde015d0d7d0466cc3a9 Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> |
| d1aef94b | 27-May-2020 |
Jianqun Xu <jay.xu@rock-chips.com> |
gpio/rockchip: rk_gpio support v2 gpio controller
The v2 gpio controller add write enable bit for some register, such as data register, data direction register and so on.
This patch support v2 gpio
gpio/rockchip: rk_gpio support v2 gpio controller
The v2 gpio controller add write enable bit for some register, such as data register, data direction register and so on.
This patch support v2 gpio controller by redefine the read and write operation functions.
Change-Id: I2adbcca06a37c48e6f494b89833cd034ba0dae29 Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
show more ...
|
| 5410c5c2 | 16-Apr-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Add clock init for isp and vop
Change-Id: I1c4a1267e90f84f6f7777a35e0ad5824b6eff2d1 Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> |