| a08b1921 | 05-Feb-2016 |
Alison Wang <b18965@freescale.com> |
armv7: ls102xa: Move smmu and stream id initialization into the common soc code
The initialization for smmu and stream id is moved into the common soc
code.
Signed-off-by: Alison Wang <alison.wang@
armv7: ls102xa: Move smmu and stream id initialization into the common soc code
The initialization for smmu and stream id is moved into the common soc
code.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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| bbc8e053 | 02-Feb-2016 |
Mingkai Hu <mingkai.hu@nxp.com> |
armv8/ls1043a: Implement workaround for erratum A009660
Memory controller performance is not optimal with default internal
target queue register value, write required value for optimal DDR
performan
armv8/ls1043a: Implement workaround for erratum A009660
Memory controller performance is not optimal with default internal
target queue register value, write required value for optimal DDR
performance.
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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| 3e0a0fbb | 29-Jan-2016 |
Shengzhou Liu <Shengzhou.Liu@nxp.com> |
armv8/ls1043a: enable workaround for errarum A009942
DDR erratum A-009942 applies to LS1043A.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com> |
| 52dd704b | 23-Feb-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of http://git.denx.de/u-boot-sunxi |
| dc44fd8a | 09-Feb-2016 |
Jelle van der Waa <jelle@vdwaa.nl> |
sunxi: H3: Add support for the host usb-phys
Add support for phy 1-3.
Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
[hdegoede@redhat.com: use setclrbits_le32 instead of read-modify-write]
Signe
sunxi: H3: Add support for the host usb-phys
Add support for phy 1-3.
Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
[hdegoede@redhat.com: use setclrbits_le32 instead of read-modify-write]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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| e832a142 | 04-Feb-2016 |
Michal Simek <michal.simek@xilinx.com> |
ARM: zynq: Remove unused SPI base addresses
Remove unused macros. Adresses are taken from DT.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Revi
ARM: zynq: Remove unused SPI base addresses
Remove unused macros. Adresses are taken from DT.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
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| 595af9db | 21-Feb-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx |
| 83703a1c | 28-Jan-2016 |
Peng Fan <peng.fan@nxp.com> |
imx: mx7: implement functions to boot auxiliary core
Implement arch_auxiliary_core_up and arch_auxiliary_core_check_up.
arch_auxiliary_core_check_up is used to check whether M4 is running
or not. a
imx: mx7: implement functions to boot auxiliary core
Implement arch_auxiliary_core_up and arch_auxiliary_core_check_up.
arch_auxiliary_core_check_up is used to check whether M4 is running
or not. arch_auxiliary_core_up is to boot M4 core, the m4 core will
use the pc and stack which is set in arch_auxiliary_core_up to set R15
and R13 register and boot.
Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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| 0623d375 | 28-Jan-2016 |
Peng Fan <peng.fan@nxp.com> |
imx: mx6: implement functions to boot auxiliary core
Implement arch_auxiliary_core_up and arch_auxiliary_core_check_up.
arch_auxiliary_core_check_up is used to check whether M4 is running
or not. a
imx: mx6: implement functions to boot auxiliary core
Implement arch_auxiliary_core_up and arch_auxiliary_core_check_up.
arch_auxiliary_core_check_up is used to check whether M4 is running
or not. arch_auxiliary_core_up is to boot M4 core, the m4 core will
use the pc and stack which is set in arch_auxiliary_core_up to set R15
and R13 register and boot.
Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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| af013592 | 28-Jan-2016 |
Peng Fan <peng.fan@nxp.com> |
imx: mx7d: Add RDC support
Add the peripherals/masters definitions and registers base addresses
for mx7d RDC.
Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com> |
| d08607e1 | 28-Jan-2016 |
Peng Fan <peng.fan@nxp.com> |
imx: mx6sx Add RDC mappings of masters and peripherals
Add the definitions for the RDC mappings for i.MX6 SoloX.
Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com> |
| de09c43b | 28-Jan-2016 |
Peng Fan <peng.fan@nxp.com> |
imx: imx-common: introduce Resource Domain Controller support
Introduce Resource Domain Controller support for i.MX.
Now i.MX6SX and i.MX7D supports this feature to assign masters
and peripherals to
imx: imx-common: introduce Resource Domain Controller support
Introduce Resource Domain Controller support for i.MX.
Now i.MX6SX and i.MX7D supports this feature to assign masters
and peripherals to different domains.
Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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|
| 613e0106 | 28-Jan-2016 |
Peng Fan <peng.fan@nxp.com> |
imx: mx6: introduce rdc regs
Introudce rdc regs structure and rdc sema reg structure for i.MX6.
For now, to i.MX6, only i.MX6SX supports this.
Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Pe
imx: mx6: introduce rdc regs
Introudce rdc regs structure and rdc sema reg structure for i.MX6.
For now, to i.MX6, only i.MX6SX supports this.
Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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| f91e65a7 | 02-Feb-2016 |
Ulises Cardenas <raul.casas@nxp.com> |
imx: Refactoring CAAM Job Ring structure and Secure Memory for imx7
Refactored data structure for CAAM's job ring and Secure Memory
to support i.MX7.
The new memory map use macros to resolve SM's o
imx: Refactoring CAAM Job Ring structure and Secure Memory for imx7
Refactored data structure for CAAM's job ring and Secure Memory
to support i.MX7.
The new memory map use macros to resolve SM's offset by version.
This will solve the versioning issue caused by the new version of
secure memory of i.MX7
Signed-off-by: Ulises Cardenas <raul.casas@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
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|
| e007633b | 30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: video: Clean up the old LCD/PWM driver code
Remove the old PWM code. Remove calls to CONFIG_LCD functions now that we
are using driver model for video.
Signed-off-by: Simon Glass <sjg@chromi
tegra: video: Clean up the old LCD/PWM driver code
Remove the old PWM code. Remove calls to CONFIG_LCD functions now that we
are using driver model for video.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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| bfda0377 | 30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: video: Move LCD enums into the driver
There is no need to have these in a separate file as they are not
referenced from anywhere else.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by:
tegra: video: Move LCD enums into the driver
There is no need to have these in a separate file as they are not
referenced from anywhere else.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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|
| 9e6866d3 | 30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: video: Convert tegra20 LCD driver to driver model
Move this driver over to use driver model. This involves rearranging the
code somewhat. The effect is that everything is run from the probe()
tegra: video: Convert tegra20 LCD driver to driver model
Move this driver over to use driver model. This involves rearranging the
code somewhat. The effect is that everything is run from the probe() method.
Boards which use this are fixed up, but only seaboard is tested.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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|
| ce0c474a | 30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: video: Merge the two config structures together
We have a structure for the display panel and another for the controller.
There is some overlap between them. Merge them to simplify the driver
tegra: video: Merge the two config structures together
We have a structure for the display panel and another for the controller.
There is some overlap between them. Merge them to simplify the driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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| 71cafc3f | 30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: video: Merge the display driver into one file
At present we have code in arch/arm and code in drivers/video. Move it all
into drivers/video since it is a display driver and our current approa
tegra: video: Merge the display driver into one file
At present we have code in arch/arm and code in drivers/video. Move it all
into drivers/video since it is a display driver and our current approach is
to put all driver code in drivers/.
Make a few functions static now that they are not used outside the file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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|
| 4dd81158 | 30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: lcd: Merge tegra124-lcd.c into display.c
There isn't a lot of benefit of have two separate files. With driver model
the code needs to be in the same driver, so it's better to have it in the
s
tegra: lcd: Merge tegra124-lcd.c into display.c
There isn't a lot of benefit of have two separate files. With driver model
the code needs to be in the same driver, so it's better to have it in the
same file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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| 7429b962 | 30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: pwm: Add a driver for the tegra PWM
This PWM supports four channels. The driver always uses the 32KHz clock,
and adjusts the duty cycle accordingly.
Signed-off-by: Simon Glass <sjg@chromium.
tegra: pwm: Add a driver for the tegra PWM
This PWM supports four channels. The driver always uses the 32KHz clock,
and adjusts the duty cycle accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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| 823ecd72 | 14-Feb-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-uniphier |
| 494456bc | 02-Feb-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
spl: define BOOT_DEVICE_USB
This enum is referenced from common/spl/spl.c.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
| 78cb965a | 17-Nov-2015 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
zynqmp: nand: Add Nand driver support for zynqmp
Add nand driver support for zynqmp. The Nand
controller used in ZynqMP is Arasan Nand Flash
controller.
Signed-off-by: Siva Durga Prasad Paladugu <s
zynqmp: nand: Add Nand driver support for zynqmp
Add nand driver support for zynqmp. The Nand
controller used in ZynqMP is Arasan Nand Flash
controller.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
[scottwood: Fix checkpatch warning]
Signed-off-by: Scott Wood <oss@buserror.net>
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| dffceb4b | 27-Jan-2016 |
Vikas Manocha <vikas.manocha@st.com> |
serial: serial_stm32: move clock config from driver to board
This patch removes the uart clock enable from serial driver & move it in the
board code.
Signed-off-by: Vikas Manocha <vikas.manocha@st.
serial: serial_stm32: move clock config from driver to board
This patch removes the uart clock enable from serial driver & move it in the
board code.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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|