MX35: Add soc_boot_mode and soc_boot_device to MX35

The functions are required to use the generic
SPL Framework.

Signed-off-by: Stefano Babic <sbabic@denx.de>

MX35: add LOW_LEVEL_SRAM_STACK to use SPL_FRAMEWORK

Signed-off-by: Stefano Babic <sbabic@denx.de>

Merge remote-tracking branch 'u-boot-ti/master'

am33xx/ddr_defs.h: rename DDR2/DDR3 defines to their actual part numbers

So other parts can be added.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>

am33xx: support board specific ddr settings

Move the hardcoded ddr2/ddr3 settings for the ti boards to board code,
so other boards can use different types/timings.

Signed-off-by: Peter Korsgaard <p

am33xx: support board specific ddr settings

Move the hardcoded ddr2/ddr3 settings for the ti boards to board code,
so other boards can use different types/timings.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
[trini: Make apply with rtc32k_enable() in the file]
Signed-off-by: Tom Rini <trini@ti.com>

show more ...

am33xx: move generic parts of pinmux handling out from board/ti/am335x

So they are available for other boards.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>

am33xx: move ti i2c baseboard header handling to board/ti/am335x/

The i2c header is specific to ti(-derived) boards, and not generic for all
am335x boards.

Signed-off-by: Peter Korsgaard <peter.kor

am33xx: move ti i2c baseboard header handling to board/ti/am335x/

The i2c header is specific to ti(-derived) boards, and not generic for all
am335x boards.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
[trini: Make re-apply with rtc32k_enable() applied]
Signed-off-by: Tom Rini <trini@ti.com>

show more ...

am33xx: Add SPI SPL as an option

Add the required config.mk logic for this SoC as well as the BOOT_DEVICE
define. Finally, enable the options on the am335x_evm.

Signed-off-by: Tom Rini <trini@ti.c

am33xx: Add SPI SPL as an option

Add the required config.mk logic for this SoC as well as the BOOT_DEVICE
define. Finally, enable the options on the am335x_evm.

Signed-off-by: Tom Rini <trini@ti.com>

show more ...

VIDEO: add macro to set LCD size for DSS driver

Signed-off-by: Stefano Babic <sbabic@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>

am335x: Enable RTC 32K OSC clock

In order to support low power state, you must source kernel system
timers to persistent clock, available across suspend/resume. In case of
AM335x device, the only s

am335x: Enable RTC 32K OSC clock

In order to support low power state, you must source kernel system
timers to persistent clock, available across suspend/resume. In case of
AM335x device, the only source we have is, RTC32K, available in
wakeup/always-on domain. Having said that, during validation it has
been observed that, RTC clock need couple of seconds delay to stabilize
the RTC OSC clock; and such a huge delay is not acceptable in kernel
especially during early init and also it will impact quick/fast boot
use-cases.

So, RTC32k OSC enable dependency has been shifted to
SPL/first-bootloader.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>

show more ...

arm: Change global data baudrate to int

This does not need to be a long, so change it.

Also adjust bi_baudrate to be unsigned.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini

arm: Change global data baudrate to int

This does not need to be a long, so change it.

Also adjust bi_baudrate to be unsigned.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>

show more ...

mx5: lowlevel_init.S: Fix PLL settings for mx53

Currently PLL2 is not explicitely configured for mx53 and it runs at 333MHz.

Since PLL2 is the parent clock for DDR2, IPU, VPU, we should set it at 4

mx5: lowlevel_init.S: Fix PLL settings for mx53

Currently PLL2 is not explicitely configured for mx53 and it runs at 333MHz.

Since PLL2 is the parent clock for DDR2, IPU, VPU, we should set it at 400MHz
instead.

Without doing so, it is not possible to use a 2.6.35 FSL kernel and display HDMI
at 1080p because the IPU clock cannot reach the requested frequency.

Set PLL2 to 400MHz, so that 1080p can be played and the DDR2 can run at its
maximum frequency.

Also, setup the other PLL's as done in FSL U-boot and re-arrange the code a little
bit to allow easier comparison with the original clock setup from FSL U-boot.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

show more ...

mx25: Clean up imx-regs.h

Clean up i.MX25 imx-regs.h:
- Update mx31 imx-regs.h filename.
- Test for __KERNEL_STRICT_NAMES just in case.
- Define internal RAM size.

Signed-off-by: Benoît Thébaude

mx25: Clean up imx-regs.h

Clean up i.MX25 imx-regs.h:
- Update mx31 imx-regs.h filename.
- Test for __KERNEL_STRICT_NAMES just in case.
- Define internal RAM size.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>

show more ...

i.MX6: add HDMI transmitter register declarations from kernel WIP.

Original source from Pengutronix HDMI driver work:

http://git.pengutronix.de/?p=imx/linux-2.6.git;a=commitdiff;h=72c31cd67ac880bd

i.MX6: add HDMI transmitter register declarations from kernel WIP.

Original source from Pengutronix HDMI driver work:

http://git.pengutronix.de/?p=imx/linux-2.6.git;a=commitdiff;h=72c31cd67ac880bd90785af86f8e46f8ea7b3bb0

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>

show more ...

i.MX6: set drive strength for parallel RGB pads

Default drive strength is disabled and won't function.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>

i.MX: iomux: input pad array can be const

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>

mx6qsabreauto: Pass the board revision to the kernel

The kernel from Freescale expects that the bootloader passes the board revision.

Read the board revision and pass it via get_board_rev().

Witho

mx6qsabreauto: Pass the board revision to the kernel

The kernel from Freescale expects that the bootloader passes the board revision.

Read the board revision and pass it via get_board_rev().

Without passing the board revision the kernel does not operate properly as the
initialization of peripherals are different in revA versus revB boards.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

show more ...

mx35: Fix eSDHC clocks

Each eSDHC instance has a dedicated clock.

gd->sdhc_clk must also be set accordingly. This is good for the case only a
single SDHC instance is used (initialization made with

mx35: Fix eSDHC clocks

Each eSDHC instance has a dedicated clock.

gd->sdhc_clk must also be set accordingly. This is good for the case only a
single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A
future patch will fix the multi-instance use case (initialization made directly
with fsl_esdhc_initialize()).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>

show more ...

mx35: Clean up lowlevel_init

Clean up mx35 lowlevel_init:
- Indent with tabs.
- Fix comments.
- Use defined values instead of literal constants.
- Use defined macros instead of duplicating code.

mx35: Clean up lowlevel_init

Clean up mx35 lowlevel_init:
- Indent with tabs.
- Fix comments.
- Use defined values instead of literal constants.
- Use defined macros instead of duplicating code.
- Use macro parameters with default values instead of #define'd configs.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>

show more ...

mx25: Clean up lowlevel_init

Clean up mx25 lowlevel_init:
- Add comments.
- Do not use write32 repeatedly with the same value in order not to increase
code size.
- Make register values configu

mx25: Clean up lowlevel_init

Clean up mx25 lowlevel_init:
- Add comments.
- Do not use write32 repeatedly with the same value in order not to increase
code size.
- Make register values configurable.
- Use macro parameters with default values instead of literal constants.
- Use defined macros instead of duplicating code.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
Cc: Matthias Weisser <weisserm@arcor.de>

show more ...

mx31: Fix PDR0_CSI_PODF

The CSI PODF bit-field used by the previous code for the i.MX31 CCM PDR0
register is actually composed of two bit-fields: one pre-divider and one
post-divider. This patch fix

mx31: Fix PDR0_CSI_PODF

The CSI PODF bit-field used by the previous code for the i.MX31 CCM PDR0
register is actually composed of two bit-fields: one pre-divider and one
post-divider. This patch fixes the CCM access macros and the code using them
accordingly.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>

show more ...

mx35: Define MAX and AIPS registers

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>

mx31: Add more CCM access macros

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>

mx25: Clean up clocks API

Use the standard mxc_get_clock() instead of exporting internal functions and
using literal constant values.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.co

mx25: Clean up clocks API

Use the standard mxc_get_clock() instead of exporting internal functions and
using literal constant values.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>

show more ...

mx25 clocks: Fix MXC_FEC_CLK

mxc_get_clock(MXC_FEC_CLK) should return the IPG clock, not the AHB clock.

Also, imx_get_fecclk() was correct but reimplemented the calculation of the IPG
clock, so rem

mx25 clocks: Fix MXC_FEC_CLK

mxc_get_clock(MXC_FEC_CLK) should return the IPG clock, not the AHB clock.

Also, imx_get_fecclk() was correct but reimplemented the calculation of the IPG
clock, so remove the duplicated code.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>

show more ...