| #
6eae68e4 |
| 07-Mar-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
cosmetic: README: add some entries to Directory Hierarchy
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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| #
7e3d473b |
| 07-Mar-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
mips: xburst: remove remainders of dead board
Commit 54e458de deleted qi_lb60 board support because of the incompatible license issue.
There is no board with XBurst CPU.
Signed-off-by: Masahiro Ya
mips: xburst: remove remainders of dead board
Commit 54e458de deleted qi_lb60 board support because of the incompatible license issue.
There is no board with XBurst CPU.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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| #
999d7d32 |
| 04-Apr-2014 |
Karicheri, Muralidharan <m-karicheri2@ti.com> |
NAND: DaVinci: allow forced disable of subpage writes
This patch introduces a configurable mechanism to disable subpage writes in the DaVinci NAND driver.
Signed-off-by: Vitaly Andrianov <vitalya@t
NAND: DaVinci: allow forced disable of subpage writes
This patch introduces a configurable mechanism to disable subpage writes in the DaVinci NAND driver.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Tom Rini <trini@ti.com>
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| #
9607faf2 |
| 28-Mar-2014 |
Tom Rini <trini@ti.com> |
README: Add CONFIG_SPL_OS_BOOT to README
Signed-off-by: Tom Rini <trini@ti.com>
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| #
6dd3b566 |
| 28-Mar-2014 |
Tom Rini <trini@ti.com> |
mtd: Add a CONFIG_SPL_MTD_SUPPORT for a more full NAND subsystem in SPL
This mainly converts the am335x_spl_bch driver to the "normal" format which means a slight change to nand_info within the driv
mtd: Add a CONFIG_SPL_MTD_SUPPORT for a more full NAND subsystem in SPL
This mainly converts the am335x_spl_bch driver to the "normal" format which means a slight change to nand_info within the driver.
Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Tom Rini <trini@ti.com>
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| #
0f507779 |
| 17-Apr-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'next'
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| #
519fdde9 |
| 08-Apr-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile include/configs/trats.h include/configs/trats2.h include/mmc.h
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| #
284bb60e |
| 07-Apr-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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| #
b7588e3b |
| 02-Apr-2014 |
Nitin Garg <nitin.garg@freescale.com> |
ARM: Add workaround for Cortex-A9 errata 761320
Full cache line writes to the same memory region from at least two processors might deadlock the processor. Exists on r1, r2, r3 revisions.
Signed-of
ARM: Add workaround for Cortex-A9 errata 761320
Full cache line writes to the same memory region from at least two processors might deadlock the processor. Exists on r1, r2, r3 revisions.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
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| #
f71cbfe3 |
| 02-Apr-2014 |
Nitin Garg <nitin.garg@freescale.com> |
ARM: Add workaround for Cortex-A9 errata 794072
A short loop including a DMB instruction might cause a denial of service on another processor which executes a CP15 broadcast operation. Exists on r1,
ARM: Add workaround for Cortex-A9 errata 794072
A short loop including a DMB instruction might cause a denial of service on another processor which executes a CP15 broadcast operation. Exists on r1, r2, r3, r4 revisions.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
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| #
1cad23c5 |
| 04-Apr-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm into master
Conflicts: arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
Signed-off-by: Stefano Babic
Merge branch 'master' of git://git.denx.de/u-boot-arm into master
Conflicts: arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
Signed-off-by: Stefano Babic <sbabic@denx.de>
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| #
89c8230d |
| 02-Apr-2014 |
Przemyslaw Marczak <p.marczak@samsung.com> |
new commands: uuid and guid - generate random unique identifier
Those commands basis on implementation of random UUID generator version 4 which is described in RFC4122. The same algorithm is used fo
new commands: uuid and guid - generate random unique identifier
Those commands basis on implementation of random UUID generator version 4 which is described in RFC4122. The same algorithm is used for generation both ids but string representation is different as below.
char: 0 9 14 19 24 36 xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx UUID: be be be be be GUID: le le le be be
Commands usage: - uuid [<varname>] - guid [<varname>]
The result is saved in environment as a "varname" variable if argument is given, if not then it is printed.
New config: - CONFIG_CMD_UUID
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: trini@ti.com
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| #
81b196be |
| 28-Mar-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-usb
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| #
001a8319 |
| 18-Mar-2014 |
Heiko Schocher <hs@denx.de> |
usb: dfu: introduce dfuMANIFEST state
on nand flash using ubi, after the download of the new image into the flash, the "rest" of the nand sectors get erased while flushing the medium. With current u
usb: dfu: introduce dfuMANIFEST state
on nand flash using ubi, after the download of the new image into the flash, the "rest" of the nand sectors get erased while flushing the medium. With current u-boot version dfu-util may show:
Starting download: [##################################################] finished! state(7) = dfuMANIFEST, status(0) = No error condition is present unable to read DFU status
as get_status is not answered while erasing sectors, if erasing needs some time.
So do the following changes to prevent this:
- introduce dfuManifest state According to dfu specification ( http://www.usb.org/developers/devclass_docs/usbdfu10.pdf ) section 7: "the device enters the dfuMANIFEST-SYNC state and awaits the solicitation of the status report by the host. Upon receipt of the anticipated DFU_GETSTATUS, the device enters the dfuMANIFEST state, where it completes its reprogramming operations."
- when stepping into dfuManifest state, sending a PollTimeout DFU_MANIFEST_POLL_TIMEOUT in ms, to the host, so the host (dfu-util) waits the PollTimeout before sending a get_status again.
Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
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| #
b401b73d |
| 05-Mar-2014 |
Marek Vasut <marex@denx.de> |
aes: Add 'aes' command to access AES-128-CBC
Add simple 'aes' command, which allows using the AES-128-CBC encryption and decryption functions from U-Boot command line.
Signed-off-by: Marek Vasut <m
aes: Add 'aes' command to access AES-128-CBC
Add simple 'aes' command, which allows using the AES-128-CBC encryption and decryption functions from U-Boot command line.
Signed-off-by: Marek Vasut <marex@denx.de>
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| #
1ad6364e |
| 05-Mar-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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| #
4d1fd7f1 |
| 27-Feb-2014 |
York Sun <yorksun@freescale.com> |
Add 64-bit data support for memory commands
Add 64-bit data for memory commands, such as md, mw, mm, cmp. The new size ".q " is introduced.
For 64-bit architecture, 64-bit data is enabled by defaul
Add 64-bit data support for memory commands
Add 64-bit data for memory commands, such as md, mw, mm, cmp. The new size ".q " is introduced.
For 64-bit architecture, 64-bit data is enabled by default, by detecting compiler __LP64__. It is optional for other architectures.
Signed-off-by: York Sun <yorksun@freescale.com>
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| #
eeb72e67 |
| 26-Feb-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts: arch/arm/cpu/armv7/config.mk board/ti/am43xx/mux.c include/configs/am43xx_evm.h
Signed-off-by: Tom Rini <trini@ti.com>
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| #
1551df35 |
| 25-Feb-2014 |
Tom Rini <trini@ti.com> |
arm: Switch to -mno-unaligned-access when supported by the compiler
When we tell the compiler to optimize for ARMv7 (and ARMv6 for that matter) it assumes a default of SCTRL.A being cleared and unal
arm: Switch to -mno-unaligned-access when supported by the compiler
When we tell the compiler to optimize for ARMv7 (and ARMv6 for that matter) it assumes a default of SCTRL.A being cleared and unaligned accesses being allowed and fast at the hardware level. We set this bit and must pass along -mno-unaligned-access so that the compiler will still breakdown accesses and not trigger a data abort.
To better help understand the requirements of the project with respect to unaligned memory access, the Documentation/unaligned-memory-access.txt file has been added as doc/README.unaligned-memory-access.txt and is taken from the v3.14-rc1 tag of the kernel.
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Mans Rullgard <mans@mansr.com> Signed-off-by: Tom Rini <trini@ti.com>
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| #
b60eff31 |
| 22-Feb-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
arm: remove unneeded symbol offsets and _TEXT_BASE
Remove the last uses of symbol offsets in ARM U-Boot. Remove some needless uses of _TEXT_BASE. Remove all _TEXT_BASE definitions.
Signed-off-by: A
arm: remove unneeded symbol offsets and _TEXT_BASE
Remove the last uses of symbol offsets in ARM U-Boot. Remove some needless uses of _TEXT_BASE. Remove all _TEXT_BASE definitions.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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| #
6b1e1254 |
| 10-Feb-2014 |
York Sun <yorksun@freescale.com> |
driver/ddr: Add 256 byte interleaving support
Freescale LayerScape SoCs support controller interleaving on 256 byte size. This interleaving is mandoratory.
Signed-off-by: York Sun <yorksun@freescal
driver/ddr: Add 256 byte interleaving support
Freescale LayerScape SoCs support controller interleaving on 256 byte size. This interleaving is mandoratory.
Signed-off-by: York Sun <yorksun@freescale.com>
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| #
6b9e309a |
| 10-Feb-2014 |
York Sun <yorksun@freescale.com> |
Driver/ddr: Add support of different DDR base address
DDR base address has been the same from the view of core and DDR controllers. This has changed for Freescale ARM-based SoCs. Controllers setup D
Driver/ddr: Add support of different DDR base address
DDR base address has been the same from the view of core and DDR controllers. This has changed for Freescale ARM-based SoCs. Controllers setup DDR memory in a contiguous space and cores view it at separated locations.
Signed-off-by: York Sun <yorksun@freescale.com>
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| #
4e5b1bd0 |
| 10-Feb-2014 |
York Sun <yorksun@freescale.com> |
driver/ddr: Change Freescale ARM DDR driver to support both big and little endian
Initially it was believed the DDR controller on Freescale ARM would have big endian. But some platform will have lit
driver/ddr: Change Freescale ARM DDR driver to support both big and little endian
Initially it was believed the DDR controller on Freescale ARM would have big endian. But some platform will have little endian.
Signed-off-by: York Sun <yorksun@freescale.com>
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| #
1530f6f5 |
| 21-Feb-2014 |
Tom Rini <trini@ti.com> |
fs/fdos: Remove
We have an unused FAT implementation in fs/fdos, remove.
Signed-off-by: Tom Rini <trini@ti.com>
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| #
6853e6aa |
| 20-Feb-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|